6970888 panic BAD TRAP: type=d (#gp General protection) due to incorrect use of x86_featureset onnv_147
authorKuriakose Kuruvilla <kuriakose.kuruvilla@oracle.com>
Mon, 16 Aug 2010 22:47:01 -0700
changeset 13148 67d1861e02c1
parent 13147 9f04f32f7f45
child 13150 88e4597d99f9
child 13168 f23a67c5e7d8
6970888 panic BAD TRAP: type=d (#gp General protection) due to incorrect use of x86_featureset
usr/src/uts/i86pc/ml/cpr_wakecode.s
usr/src/uts/i86pc/ml/mpcore.s
usr/src/uts/i86pc/os/cpuid.c
usr/src/uts/i86pc/os/mlsetup.c
usr/src/uts/i86pc/os/mp_startup.c
usr/src/uts/intel/sys/x86_archext.h
--- a/usr/src/uts/i86pc/ml/cpr_wakecode.s	Mon Aug 16 22:44:31 2010 -0400
+++ b/usr/src/uts/i86pc/ml/cpr_wakecode.s	Mon Aug 16 22:47:01 2010 -0700
@@ -672,7 +672,7 @@
 	 * Before proceeding, enable usage of the page table NX bit if
 	 * that's how the page tables are set up.
 	 */
-	bt      $X86FSET_NX, x86_featureset
+	bt      $X86FSET_NX, x86_featureset(%rip)
 	jnc     1f
 	movl    $MSR_AMD_EFER, %ecx
 	rdmsr
--- a/usr/src/uts/i86pc/ml/mpcore.s	Mon Aug 16 22:44:31 2010 -0400
+++ b/usr/src/uts/i86pc/ml/mpcore.s	Mon Aug 16 22:47:01 2010 -0700
@@ -315,7 +315,7 @@
 	 * Before going any further, enable usage of page table NX bit if 
 	 * that's how our page tables are set up.
 	 */
-	bt	$X86FSET_NX, x86_featureset
+	bt	$X86FSET_NX, x86_featureset(%rip)
 	jnc	1f
 	movl	$MSR_AMD_EFER, %ecx
 	rdmsr
@@ -568,7 +568,7 @@
 	 * Before going any further, enable usage of page table NX bit if 
 	 * that's how our page tables are set up.
 	 */
-	bt	$X86FSET_NX, x86_featureset
+	bt	$X86FSET_NX, x86_featureset(%rip)
 	jnc	1f
 	movl	$MSR_AMD_EFER, %ecx
 	rdmsr
--- a/usr/src/uts/i86pc/os/cpuid.c	Mon Aug 16 22:44:31 2010 -0400
+++ b/usr/src/uts/i86pc/os/cpuid.c	Mon Aug 16 22:47:01 2010 -0700
@@ -48,8 +48,8 @@
 #include <sys/pg.h>
 #include <sys/fp.h>
 #include <sys/controlregs.h>
+#include <sys/bitmap.h>
 #include <sys/auxv_386.h>
-#include <sys/bitmap.h>
 #include <sys/memnode.h>
 #include <sys/pci_cfgspace.h>
 
@@ -118,11 +118,9 @@
 uint_t pentiumpro_bug4046376;
 uint_t pentiumpro_bug4064495;
 
-#define	NUM_X86_FEATURES	35
-void    *x86_featureset;
-ulong_t x86_featureset0[BT_SIZEOFMAP(NUM_X86_FEATURES)];
-
-char *x86_feature_names[NUM_X86_FEATURES] = {
+uchar_t x86_featureset[BT_SIZEOFMAP(NUM_X86_FEATURES)];
+
+static char *x86_feature_names[NUM_X86_FEATURES] = {
 	"lgpg",
 	"tsc",
 	"msr",
@@ -159,18 +157,6 @@
 	"xsave",
 	"avx" };
 
-static void *
-init_x86_featureset(void)
-{
-	return (kmem_zalloc(BT_SIZEOFMAP(NUM_X86_FEATURES), KM_SLEEP));
-}
-
-void
-free_x86_featureset(void *featureset)
-{
-	kmem_free(featureset, BT_SIZEOFMAP(NUM_X86_FEATURES));
-}
-
 boolean_t
 is_x86_feature(void *featureset, uint_t feature)
 {
@@ -868,11 +854,10 @@
 	xsave_bv_all = flags;
 }
 
-void *
-cpuid_pass1(cpu_t *cpu)
+void
+cpuid_pass1(cpu_t *cpu, uchar_t *featureset)
 {
 	uint32_t mask_ecx, mask_edx;
-	void *featureset;
 	struct cpuid_info *cpi;
 	struct cpuid_regs *cp;
 	int xcpuid;
@@ -889,9 +874,6 @@
 	if (cpu->cpu_id == 0) {
 		if (cpu->cpu_m.mcpu_cpi == NULL)
 			cpu->cpu_m.mcpu_cpi = &cpuid_info0;
-		featureset = x86_featureset0;
-	} else {
-		featureset = init_x86_featureset();
 	}
 
 	add_x86_feature(featureset, X86FSET_CPUID);
@@ -1588,7 +1570,6 @@
 
 pass1_done:
 	cpi->cpi_pass = 1;
-	return (featureset);
 }
 
 /*
--- a/usr/src/uts/i86pc/os/mlsetup.c	Mon Aug 16 22:44:31 2010 -0400
+++ b/usr/src/uts/i86pc/os/mlsetup.c	Mon Aug 16 22:47:01 2010 -0700
@@ -185,7 +185,7 @@
 	 * want to set the feature bits to correspond to the feature
 	 * minimum) this value may be altered.
 	 */
-	x86_featureset = cpuid_pass1(cpu[0]);
+	cpuid_pass1(cpu[0], x86_featureset);
 
 #if !defined(__xpv)
 
--- a/usr/src/uts/i86pc/os/mp_startup.c	Mon Aug 16 22:44:31 2010 -0400
+++ b/usr/src/uts/i86pc/os/mp_startup.c	Mon Aug 16 22:47:01 2010 -0700
@@ -1605,7 +1605,7 @@
 mp_startup_common(boolean_t boot)
 {
 	cpu_t *cp = CPU;
-	void *new_x86_featureset;
+	uchar_t new_x86_featureset[BT_SIZEOFMAP(NUM_X86_FEATURES)];
 	extern void cpu_event_init_cpu(cpu_t *);
 
 	/*
@@ -1631,7 +1631,8 @@
 	 */
 	(void) (*ap_mlsetup)();
 
-	new_x86_featureset = cpuid_pass1(cp);
+	bzero(new_x86_featureset, BT_SIZEOFMAP(NUM_X86_FEATURES));
+	cpuid_pass1(cp, new_x86_featureset);
 
 #ifndef __xpv
 	/*
@@ -1688,8 +1689,6 @@
 	    is_x86_feature(new_x86_featureset, X86FSET_MWAIT))
 		panic("unsupported mixed cpu monitor/mwait support detected");
 
-	free_x86_featureset(new_x86_featureset);
-
 	/*
 	 * We could be more sophisticated here, and just mark the CPU
 	 * as "faulted" but at this point we'll opt for the easier
--- a/usr/src/uts/intel/sys/x86_archext.h	Mon Aug 16 22:44:31 2010 -0400
+++ b/usr/src/uts/intel/sys/x86_archext.h	Mon Aug 16 22:47:01 2010 -0700
@@ -585,7 +585,8 @@
 
 #if defined(_KERNEL) || defined(_KMEMUSER)
 
-extern void *x86_featureset;
+#define	NUM_X86_FEATURES	35
+extern uchar_t x86_featureset[];
 
 extern void free_x86_featureset(void *featureset);
 extern boolean_t is_x86_feature(void *featureset, uint_t feature);
@@ -687,7 +688,7 @@
 extern void setx86isalist(void);
 extern void cpuid_alloc_space(struct cpu *);
 extern void cpuid_free_space(struct cpu *);
-extern void *cpuid_pass1(struct cpu *);
+extern void cpuid_pass1(struct cpu *, uchar_t *);
 extern void cpuid_pass2(struct cpu *);
 extern void cpuid_pass3(struct cpu *);
 extern uint_t cpuid_pass4(struct cpu *);