components/gcc3/g++.1
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    35 .    ds -- \(*W-
       
    36 .    ds PI pi
       
    37 .    if (\n(.H=4u)&(1m=24u) .ds -- \(*W\h'-12u'\(*W\h'-12u'-\" diablo 10 pitch
       
    38 .    if (\n(.H=4u)&(1m=20u) .ds -- \(*W\h'-12u'\(*W\h'-8u'-\"  diablo 12 pitch
       
    39 .    ds L" ""
       
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   128 .rm #[ #] #H #V #F C
       
   129 .\" ========================================================================
       
   130 .\"
       
   131 .IX Title "GCC 1"
       
   132 .TH GCC 1 "2004-11-05" "gcc-3.4.3" "GNU"
       
   133 .SH "NAME"
       
   134 gcc \- GNU project C and C++ compiler
       
   135 .SH "SYNOPSIS"
       
   136 .IX Header "SYNOPSIS"
       
   137 gcc [\fB\-c\fR|\fB\-S\fR|\fB\-E\fR] [\fB\-std=\fR\fIstandard\fR]
       
   138     [\fB\-g\fR] [\fB\-pg\fR] [\fB\-O\fR\fIlevel\fR]
       
   139     [\fB\-W\fR\fIwarn\fR...] [\fB\-pedantic\fR]
       
   140     [\fB\-I\fR\fIdir\fR...] [\fB\-L\fR\fIdir\fR...]
       
   141     [\fB\-D\fR\fImacro\fR[=\fIdefn\fR]...] [\fB\-U\fR\fImacro\fR]
       
   142     [\fB\-f\fR\fIoption\fR...] [\fB\-m\fR\fImachine-option\fR...]
       
   143     [\fB\-o\fR \fIoutfile\fR] \fIinfile\fR...
       
   144 .PP
       
   145 Only the most useful options are listed here; see below for the
       
   146 remainder.  \fBg++\fR accepts mostly the same options as \fBgcc\fR.
       
   147 .SH "DESCRIPTION"
       
   148 .IX Header "DESCRIPTION"
       
   149 When you invoke \s-1GCC\s0, it normally does preprocessing, compilation,
       
   150 assembly and linking.  The ``overall options'' allow you to stop this
       
   151 process at an intermediate stage.  For example, the \fB\-c\fR option
       
   152 says not to run the linker.  Then the output consists of object files
       
   153 output by the assembler.
       
   154 .PP
       
   155 Other options are passed on to one stage of processing.  Some options
       
   156 control the preprocessor and others the compiler itself.  Yet other
       
   157 options control the assembler and linker; most of these are not
       
   158 documented here, since you rarely need to use any of them.
       
   159 .PP
       
   160 Most of the command line options that you can use with \s-1GCC\s0 are useful
       
   161 for C programs; when an option is only useful with another language
       
   162 (usually \*(C+), the explanation says so explicitly.  If the description
       
   163 for a particular option does not mention a source language, you can use
       
   164 that option with all supported languages.
       
   165 .PP
       
   166 The \fBgcc\fR program accepts options and file names as operands.  Many
       
   167 options have multi-letter names; therefore multiple single-letter options
       
   168 may \fInot\fR be grouped: \fB\-dr\fR is very different from \fB\-d\ \-r\fR.
       
   169 .PP
       
   170 You can mix options and other arguments.  For the most part, the order
       
   171 you use doesn't matter.  Order does matter when you use several options
       
   172 of the same kind; for example, if you specify \fB\-L\fR more than once,
       
   173 the directories are searched in the order specified.
       
   174 .PP
       
   175 Many options have long names starting with \fB\-f\fR or with
       
   176 \&\fB\-W\fR\-\-\-for example, \fB\-fforce\-mem\fR,
       
   177 \&\fB\-fstrength\-reduce\fR, \fB\-Wformat\fR and so on.  Most of
       
   178 these have both positive and negative forms; the negative form of
       
   179 \&\fB\-ffoo\fR would be \fB\-fno\-foo\fR.  This manual documents
       
   180 only one of these two forms, whichever one is not the default.
       
   181 .SH "OPTIONS"
       
   182 .IX Header "OPTIONS"
       
   183 .Sh "Option Summary"
       
   184 .IX Subsection "Option Summary"
       
   185 Here is a summary of all the options, grouped by type.  Explanations are
       
   186 in the following sections.
       
   187 .IP "\fIOverall Options\fR" 4
       
   188 .IX Item "Overall Options"
       
   189 \&\fB\-c  \-S  \-E  \-o\fR \fIfile\fR  \fB\-pipe  \-pass\-exit\-codes  
       
   190 \&\-x\fR \fIlanguage\fR  \fB\-v  \-###  \-\-help  \-\-target\-help  \-\-version\fR
       
   191 .IP "\fIC Language Options\fR" 4
       
   192 .IX Item "C Language Options"
       
   193 \&\fB\-ansi  \-std=\fR\fIstandard\fR  \fB\-aux\-info\fR \fIfilename\fR 
       
   194 \&\fB\-fno\-asm  \-fno\-builtin  \-fno\-builtin\-\fR\fIfunction\fR 
       
   195 \&\fB\-fhosted  \-ffreestanding  \-fms\-extensions 
       
   196 \&\-trigraphs  \-no\-integrated\-cpp  \-traditional  \-traditional\-cpp 
       
   197 \&\-fallow\-single\-precision  \-fcond\-mismatch 
       
   198 \&\-fsigned\-bitfields  \-fsigned\-char 
       
   199 \&\-funsigned\-bitfields  \-funsigned\-char 
       
   200 \&\-fwritable\-strings\fR
       
   201 .IP "\fI\*(C+ Language Options\fR" 4
       
   202 .IX Item " Language Options"
       
   203 \&\fB\-fabi\-version=\fR\fIn\fR  \fB\-fno\-access\-control  \-fcheck\-new 
       
   204 \&\-fconserve\-space  \-fno\-const\-strings 
       
   205 \&\-fno\-elide\-constructors 
       
   206 \&\-fno\-enforce\-eh\-specs 
       
   207 \&\-ffor\-scope  \-fno\-for\-scope  \-fno\-gnu\-keywords 
       
   208 \&\-fno\-implicit\-templates 
       
   209 \&\-fno\-implicit\-inline\-templates 
       
   210 \&\-fno\-implement\-inlines  \-fms\-extensions 
       
   211 \&\-fno\-nonansi\-builtins  \-fno\-operator\-names 
       
   212 \&\-fno\-optional\-diags  \-fpermissive 
       
   213 \&\-frepo  \-fno\-rtti  \-fstats  \-ftemplate\-depth\-\fR\fIn\fR 
       
   214 \&\fB\-fuse\-cxa\-atexit  \-fno\-weak  \-nostdinc++ 
       
   215 \&\-fno\-default\-inline  \-Wabi  \-Wctor\-dtor\-privacy 
       
   216 \&\-Wnon\-virtual\-dtor  \-Wreorder 
       
   217 \&\-Weffc++  \-Wno\-deprecated 
       
   218 \&\-Wno\-non\-template\-friend  \-Wold\-style\-cast 
       
   219 \&\-Woverloaded\-virtual  \-Wno\-pmf\-conversions 
       
   220 \&\-Wsign\-promo  \-Wsynth\fR
       
   221 .IP "\fIObjective-C Language Options\fR" 4
       
   222 .IX Item "Objective-C Language Options"
       
   223 \&\fB\-fconstant\-string\-class=\fR\fIclass-name\fR 
       
   224 \&\fB\-fgnu\-runtime  \-fnext\-runtime 
       
   225 \&\-fno\-nil\-receivers 
       
   226 \&\-fobjc\-exceptions 
       
   227 \&\-freplace\-objc\-classes 
       
   228 \&\-fzero\-link 
       
   229 \&\-gen\-decls 
       
   230 \&\-Wno\-protocol  \-Wselector \-Wundeclared\-selector\fR
       
   231 .IP "\fILanguage Independent Options\fR" 4
       
   232 .IX Item "Language Independent Options"
       
   233 \&\fB\-fmessage\-length=\fR\fIn\fR  
       
   234 \&\fB\-fdiagnostics\-show\-location=\fR[\fBonce\fR|\fBevery-line\fR]
       
   235 .IP "\fIWarning Options\fR" 4
       
   236 .IX Item "Warning Options"
       
   237 \&\fB\-fsyntax\-only  \-pedantic  \-pedantic\-errors 
       
   238 \&\-w  \-Wextra  \-Wall  \-Waggregate\-return 
       
   239 \&\-Wcast\-align  \-Wcast\-qual  \-Wchar\-subscripts  \-Wcomment 
       
   240 \&\-Wconversion  \-Wno\-deprecated\-declarations 
       
   241 \&\-Wdisabled\-optimization  \-Wno\-div\-by\-zero  \-Wendif\-labels 
       
   242 \&\-Werror  \-Werror\-implicit\-function\-declaration 
       
   243 \&\-Wfloat\-equal  \-Wformat  \-Wformat=2 
       
   244 \&\-Wno\-format\-extra\-args \-Wformat\-nonliteral 
       
   245 \&\-Wformat\-security  \-Wformat\-y2k 
       
   246 \&\-Wimplicit  \-Wimplicit\-function\-declaration  \-Wimplicit\-int 
       
   247 \&\-Wimport  \-Wno\-import  \-Winit\-self  \-Winline 
       
   248 \&\-Wno\-invalid\-offsetof  \-Winvalid\-pch 
       
   249 \&\-Wlarger\-than\-\fR\fIlen\fR  \fB\-Wlong\-long 
       
   250 \&\-Wmain  \-Wmissing\-braces 
       
   251 \&\-Wmissing\-format\-attribute  \-Wmissing\-noreturn 
       
   252 \&\-Wno\-multichar  \-Wnonnull  \-Wpacked  \-Wpadded 
       
   253 \&\-Wparentheses  \-Wpointer\-arith  \-Wredundant\-decls 
       
   254 \&\-Wreturn\-type  \-Wsequence\-point  \-Wshadow 
       
   255 \&\-Wsign\-compare  \-Wstrict\-aliasing 
       
   256 \&\-Wswitch  \-Wswitch\-default  \-Wswitch\-enum 
       
   257 \&\-Wsystem\-headers  \-Wtrigraphs  \-Wundef  \-Wuninitialized 
       
   258 \&\-Wunknown\-pragmas  \-Wunreachable\-code 
       
   259 \&\-Wunused  \-Wunused\-function  \-Wunused\-label  \-Wunused\-parameter 
       
   260 \&\-Wunused\-value  \-Wunused\-variable  \-Wwrite\-strings\fR
       
   261 .IP "\fIC\-only Warning Options\fR" 4
       
   262 .IX Item "C-only Warning Options"
       
   263 \&\fB\-Wbad\-function\-cast  \-Wmissing\-declarations 
       
   264 \&\-Wmissing\-prototypes  \-Wnested\-externs  \-Wold\-style\-definition 
       
   265 \&\-Wstrict\-prototypes  \-Wtraditional 
       
   266 \&\-Wdeclaration\-after\-statement\fR
       
   267 .IP "\fIDebugging Options\fR" 4
       
   268 .IX Item "Debugging Options"
       
   269 \&\fB\-d\fR\fIletters\fR  \fB\-dumpspecs  \-dumpmachine  \-dumpversion 
       
   270 \&\-fdump\-unnumbered  \-fdump\-translation\-unit\fR[\fB\-\fR\fIn\fR] 
       
   271 \&\fB\-fdump\-class\-hierarchy\fR[\fB\-\fR\fIn\fR] 
       
   272 \&\fB\-fdump\-tree\-original\fR[\fB\-\fR\fIn\fR]  
       
   273 \&\fB\-fdump\-tree\-optimized\fR[\fB\-\fR\fIn\fR] 
       
   274 \&\fB\-fdump\-tree\-inlined\fR[\fB\-\fR\fIn\fR] 
       
   275 \&\fB\-feliminate\-dwarf2\-dups \-feliminate\-unused\-debug\-types 
       
   276 \&\-feliminate\-unused\-debug\-symbols \-fmem\-report \-fprofile\-arcs 
       
   277 \&\-frandom\-seed=\fR\fIstring\fR \fB\-fsched\-verbose=\fR\fIn\fR 
       
   278 \&\fB\-ftest\-coverage  \-ftime\-report 
       
   279 \&\-g  \-g\fR\fIlevel\fR  \fB\-gcoff \-gdwarf\-2 
       
   280 \&\-ggdb  \-gstabs  \-gstabs+  \-gvms  \-gxcoff  \-gxcoff+ 
       
   281 \&\-p  \-pg  \-print\-file\-name=\fR\fIlibrary\fR  \fB\-print\-libgcc\-file\-name 
       
   282 \&\-print\-multi\-directory  \-print\-multi\-lib 
       
   283 \&\-print\-prog\-name=\fR\fIprogram\fR  \fB\-print\-search\-dirs  \-Q 
       
   284 \&\-save\-temps  \-time\fR
       
   285 .IP "\fIOptimization Options\fR" 4
       
   286 .IX Item "Optimization Options"
       
   287 \&\fB\-falign\-functions=\fR\fIn\fR  \fB\-falign\-jumps=\fR\fIn\fR 
       
   288 \&\fB\-falign\-labels=\fR\fIn\fR  \fB\-falign\-loops=\fR\fIn\fR  
       
   289 \&\fB\-fbranch\-probabilities \-fprofile\-values \-fvpt \-fbranch\-target\-load\-optimize 
       
   290 \&\-fbranch\-target\-load\-optimize2 \-fcaller\-saves  \-fcprop\-registers 
       
   291 \&\-fcse\-follow\-jumps  \-fcse\-skip\-blocks  \-fdata\-sections 
       
   292 \&\-fdelayed\-branch  \-fdelete\-null\-pointer\-checks 
       
   293 \&\-fexpensive\-optimizations  \-ffast\-math  \-ffloat\-store 
       
   294 \&\-fforce\-addr  \-fforce\-mem  \-ffunction\-sections 
       
   295 \&\-fgcse  \-fgcse\-lm  \-fgcse\-sm  \-fgcse\-las  \-floop\-optimize 
       
   296 \&\-fcrossjumping  \-fif\-conversion  \-fif\-conversion2 
       
   297 \&\-finline\-functions  \-finline\-limit=\fR\fIn\fR  \fB\-fkeep\-inline\-functions 
       
   298 \&\-fkeep\-static\-consts  \-fmerge\-constants  \-fmerge\-all\-constants 
       
   299 \&\-fmove\-all\-movables  \-fnew\-ra  \-fno\-branch\-count\-reg 
       
   300 \&\-fno\-default\-inline  \-fno\-defer\-pop 
       
   301 \&\-fno\-function\-cse  \-fno\-guess\-branch\-probability 
       
   302 \&\-fno\-inline  \-fno\-math\-errno  \-fno\-peephole  \-fno\-peephole2 
       
   303 \&\-funsafe\-math\-optimizations  \-ffinite\-math\-only 
       
   304 \&\-fno\-trapping\-math  \-fno\-zero\-initialized\-in\-bss 
       
   305 \&\-fomit\-frame\-pointer  \-foptimize\-register\-move 
       
   306 \&\-foptimize\-sibling\-calls  \-fprefetch\-loop\-arrays 
       
   307 \&\-fprofile\-generate \-fprofile\-use 
       
   308 \&\-freduce\-all\-givs  \-fregmove  \-frename\-registers 
       
   309 \&\-freorder\-blocks  \-freorder\-functions 
       
   310 \&\-frerun\-cse\-after\-loop  \-frerun\-loop\-opt 
       
   311 \&\-frounding\-math \-fschedule\-insns  \-fschedule\-insns2 
       
   312 \&\-fno\-sched\-interblock  \-fno\-sched\-spec  \-fsched\-spec\-load 
       
   313 \&\-fsched\-spec\-load\-dangerous  
       
   314 \&\-fsched\-stalled\-insns=\fR\fIn\fR \fB\-sched\-stalled\-insns\-dep=\fR\fIn\fR 
       
   315 \&\fB\-fsched2\-use\-superblocks 
       
   316 \&\-fsched2\-use\-traces  \-fsignaling\-nans 
       
   317 \&\-fsingle\-precision\-constant  
       
   318 \&\-fstrength\-reduce  \-fstrict\-aliasing  \-ftracer  \-fthread\-jumps 
       
   319 \&\-funroll\-all\-loops  \-funroll\-loops  \-fpeel\-loops 
       
   320 \&\-funswitch\-loops  \-fold\-unroll\-loops  \-fold\-unroll\-all\-loops 
       
   321 \&\-\-param\fR \fIname\fR\fB=\fR\fIvalue\fR
       
   322 \&\fB\-O  \-O0  \-O1  \-O2  \-O3  \-Os\fR
       
   323 .IP "\fIPreprocessor Options\fR" 4
       
   324 .IX Item "Preprocessor Options"
       
   325 \&\fB\-A\fR\fIquestion\fR\fB=\fR\fIanswer\fR 
       
   326 \&\fB\-A\-\fR\fIquestion\fR[\fB=\fR\fIanswer\fR] 
       
   327 \&\fB\-C  \-dD  \-dI  \-dM  \-dN 
       
   328 \&\-D\fR\fImacro\fR[\fB=\fR\fIdefn\fR]  \fB\-E  \-H 
       
   329 \&\-idirafter\fR \fIdir\fR 
       
   330 \&\fB\-include\fR \fIfile\fR  \fB\-imacros\fR \fIfile\fR 
       
   331 \&\fB\-iprefix\fR \fIfile\fR  \fB\-iwithprefix\fR \fIdir\fR 
       
   332 \&\fB\-iwithprefixbefore\fR \fIdir\fR  \fB\-isystem\fR \fIdir\fR 
       
   333 \&\fB\-M  \-MM  \-MF  \-MG  \-MP  \-MQ  \-MT  \-nostdinc  
       
   334 \&\-P  \-fworking\-directory  \-remap 
       
   335 \&\-trigraphs  \-undef  \-U\fR\fImacro\fR  \fB\-Wp,\fR\fIoption\fR 
       
   336 \&\fB\-Xpreprocessor\fR \fIoption\fR
       
   337 .IP "\fIAssembler Option\fR" 4
       
   338 .IX Item "Assembler Option"
       
   339 \&\fB\-Wa,\fR\fIoption\fR  \fB\-Xassembler\fR \fIoption\fR
       
   340 .IP "\fILinker Options\fR" 4
       
   341 .IX Item "Linker Options"
       
   342 \&\fIobject-file-name\fR  \fB\-l\fR\fIlibrary\fR 
       
   343 \&\fB\-nostartfiles  \-nodefaultlibs  \-nostdlib \-pie 
       
   344 \&\-s  \-static  \-static\-libgcc  \-shared  \-shared\-libgcc  \-symbolic 
       
   345 \&\-Wl,\fR\fIoption\fR  \fB\-Xlinker\fR \fIoption\fR 
       
   346 \&\fB\-u\fR \fIsymbol\fR
       
   347 .IP "\fIDirectory Options\fR" 4
       
   348 .IX Item "Directory Options"
       
   349 \&\fB\-B\fR\fIprefix\fR  \fB\-I\fR\fIdir\fR  \fB\-I\-  \-L\fR\fIdir\fR  \fB\-specs=\fR\fIfile\fR
       
   350 .IP "\fITarget Options\fR" 4
       
   351 .IX Item "Target Options"
       
   352 \&\fB\-V\fR \fIversion\fR  \fB\-b\fR \fImachine\fR
       
   353 .IP "\fIMachine Dependent Options\fR" 4
       
   354 .IX Item "Machine Dependent Options"
       
   355 \&\fIM680x0 Options\fR
       
   356 \&\fB\-m68000  \-m68020  \-m68020\-40  \-m68020\-60  \-m68030  \-m68040 
       
   357 \&\-m68060  \-mcpu32  \-m5200  \-m68881  \-mbitfield  \-mc68000  \-mc68020   
       
   358 \&\-mnobitfield  \-mrtd  \-mshort  \-msoft\-float  \-mpcrel 
       
   359 \&\-malign\-int  \-mstrict\-align  \-msep\-data  \-mno\-sep\-data 
       
   360 \&\-mshared\-library\-id=n  \-mid\-shared\-library  \-mno\-id\-shared\-library\fR
       
   361 .Sp
       
   362 \&\fIM68hc1x Options\fR
       
   363 \&\fB\-m6811  \-m6812  \-m68hc11  \-m68hc12   \-m68hcs12 
       
   364 \&\-mauto\-incdec  \-minmax  \-mlong\-calls  \-mshort 
       
   365 \&\-msoft\-reg\-count=\fR\fIcount\fR
       
   366 .Sp
       
   367 \&\fI\s-1VAX\s0 Options\fR
       
   368 \&\fB\-mg  \-mgnu  \-munix\fR
       
   369 .Sp
       
   370 \&\fI\s-1SPARC\s0 Options\fR
       
   371 \&\fB\-mcpu=\fR\fIcpu-type\fR 
       
   372 \&\fB\-mtune=\fR\fIcpu-type\fR 
       
   373 \&\fB\-mcmodel=\fR\fIcode-model\fR 
       
   374 \&\fB\-m32  \-m64  \-mapp\-regs  \-mno\-app\-regs 
       
   375 \&\-mfaster\-structs  \-mno\-faster\-structs 
       
   376 \&\-mflat  \-mno\-flat  \-mfpu  \-mno\-fpu 
       
   377 \&\-mhard\-float  \-msoft\-float 
       
   378 \&\-mhard\-quad\-float  \-msoft\-quad\-float 
       
   379 \&\-mimpure\-text  \-mno\-impure\-text  \-mlittle\-endian 
       
   380 \&\-mstack\-bias  \-mno\-stack\-bias 
       
   381 \&\-munaligned\-doubles  \-mno\-unaligned\-doubles 
       
   382 \&\-mv8plus  \-mno\-v8plus  \-mvis  \-mno\-vis 
       
   383 \&\-mcypress  \-mf930  \-mf934 
       
   384 \&\-msparclite  \-msupersparc  \-mv8
       
   385 \&\-threads \-pthreads\fR
       
   386 .Sp
       
   387 \&\fI\s-1ARM\s0 Options\fR
       
   388 \&\fB\-mapcs\-frame  \-mno\-apcs\-frame 
       
   389 \&\-mapcs\-26  \-mapcs\-32 
       
   390 \&\-mapcs\-stack\-check  \-mno\-apcs\-stack\-check 
       
   391 \&\-mapcs\-float  \-mno\-apcs\-float 
       
   392 \&\-mapcs\-reentrant  \-mno\-apcs\-reentrant 
       
   393 \&\-msched\-prolog  \-mno\-sched\-prolog 
       
   394 \&\-mlittle\-endian  \-mbig\-endian  \-mwords\-little\-endian 
       
   395 \&\-malignment\-traps  \-mno\-alignment\-traps 
       
   396 \&\-msoft\-float  \-mhard\-float  \-mfpe 
       
   397 \&\-mthumb\-interwork  \-mno\-thumb\-interwork 
       
   398 \&\-mcpu=\fR\fIname\fR  \fB\-march=\fR\fIname\fR  \fB\-mfpe=\fR\fIname\fR  
       
   399 \&\fB\-mstructure\-size\-boundary=\fR\fIn\fR 
       
   400 \&\fB\-mabort\-on\-noreturn 
       
   401 \&\-mlong\-calls  \-mno\-long\-calls 
       
   402 \&\-msingle\-pic\-base  \-mno\-single\-pic\-base 
       
   403 \&\-mpic\-register=\fR\fIreg\fR 
       
   404 \&\fB\-mnop\-fun\-dllimport 
       
   405 \&\-mcirrus\-fix\-invalid\-insns \-mno\-cirrus\-fix\-invalid\-insns 
       
   406 \&\-mpoke\-function\-name 
       
   407 \&\-mthumb  \-marm 
       
   408 \&\-mtpcs\-frame  \-mtpcs\-leaf\-frame 
       
   409 \&\-mcaller\-super\-interworking  \-mcallee\-super\-interworking\fR
       
   410 .Sp
       
   411 \&\fI\s-1MN10300\s0 Options\fR
       
   412 \&\fB\-mmult\-bug  \-mno\-mult\-bug 
       
   413 \&\-mam33  \-mno\-am33 
       
   414 \&\-mam33\-2  \-mno\-am33\-2 
       
   415 \&\-mno\-crt0  \-mrelax\fR
       
   416 .Sp
       
   417 \&\fIM32R/D Options\fR
       
   418 \&\fB\-m32r2 \-m32rx \-m32r 
       
   419 \&\-mdebug 
       
   420 \&\-malign\-loops \-mno\-align\-loops 
       
   421 \&\-missue\-rate=\fR\fInumber\fR 
       
   422 \&\fB\-mbranch\-cost=\fR\fInumber\fR 
       
   423 \&\fB\-mmodel=\fR\fIcode-size-model-type\fR 
       
   424 \&\fB\-msdata=\fR\fIsdata-type\fR 
       
   425 \&\fB\-mno\-flush\-func \-mflush\-func=\fR\fIname\fR 
       
   426 \&\fB\-mno\-flush\-trap \-mflush\-trap=\fR\fInumber\fR 
       
   427 \&\fB\-G\fR \fInum\fR
       
   428 .Sp
       
   429 \&\fI\s-1RS/6000\s0 and PowerPC Options\fR
       
   430 \&\fB\-mcpu=\fR\fIcpu-type\fR 
       
   431 \&\fB\-mtune=\fR\fIcpu-type\fR 
       
   432 \&\fB\-mpower  \-mno\-power  \-mpower2  \-mno\-power2 
       
   433 \&\-mpowerpc  \-mpowerpc64  \-mno\-powerpc 
       
   434 \&\-maltivec  \-mno\-altivec 
       
   435 \&\-mpowerpc\-gpopt  \-mno\-powerpc\-gpopt 
       
   436 \&\-mpowerpc\-gfxopt  \-mno\-powerpc\-gfxopt 
       
   437 \&\-mnew\-mnemonics  \-mold\-mnemonics 
       
   438 \&\-mfull\-toc   \-mminimal\-toc  \-mno\-fp\-in\-toc  \-mno\-sum\-in\-toc 
       
   439 \&\-m64  \-m32  \-mxl\-call  \-mno\-xl\-call  \-mpe 
       
   440 \&\-malign\-power  \-malign\-natural 
       
   441 \&\-msoft\-float  \-mhard\-float  \-mmultiple  \-mno\-multiple 
       
   442 \&\-mstring  \-mno\-string  \-mupdate  \-mno\-update 
       
   443 \&\-mfused\-madd  \-mno\-fused\-madd  \-mbit\-align  \-mno\-bit\-align 
       
   444 \&\-mstrict\-align  \-mno\-strict\-align  \-mrelocatable 
       
   445 \&\-mno\-relocatable  \-mrelocatable\-lib  \-mno\-relocatable\-lib 
       
   446 \&\-mtoc  \-mno\-toc  \-mlittle  \-mlittle\-endian  \-mbig  \-mbig\-endian 
       
   447 \&\-mdynamic\-no\-pic 
       
   448 \&\-mprioritize\-restricted\-insns=\fR\fIpriority\fR 
       
   449 \&\fB\-msched\-costly\-dep=\fR\fIdependence_type\fR 
       
   450 \&\fB\-minsert\-sched\-nops=\fR\fIscheme\fR 
       
   451 \&\fB\-mcall\-sysv  \-mcall\-netbsd 
       
   452 \&\-maix\-struct\-return  \-msvr4\-struct\-return 
       
   453 \&\-mabi=altivec  \-mabi=no\-altivec 
       
   454 \&\-mabi=spe  \-mabi=no\-spe 
       
   455 \&\-misel=yes  \-misel=no 
       
   456 \&\-mspe=yes  \-mspe=no 
       
   457 \&\-mfloat\-gprs=yes  \-mfloat\-gprs=no 
       
   458 \&\-mprototype  \-mno\-prototype 
       
   459 \&\-msim  \-mmvme  \-mads  \-myellowknife  \-memb  \-msdata 
       
   460 \&\-msdata=\fR\fIopt\fR  \fB\-mvxworks  \-mwindiss  \-G\fR \fInum\fR  \fB\-pthread\fR
       
   461 .Sp
       
   462 \&\fIDarwin Options\fR
       
   463 \&\fB\-all_load  \-allowable_client  \-arch  \-arch_errors_fatal 
       
   464 \&\-arch_only  \-bind_at_load  \-bundle  \-bundle_loader 
       
   465 \&\-client_name  \-compatibility_version  \-current_version 
       
   466 \&\-dependency\-file  \-dylib_file  \-dylinker_install_name 
       
   467 \&\-dynamic  \-dynamiclib  \-exported_symbols_list 
       
   468 \&\-filelist  \-flat_namespace  \-force_cpusubtype_ALL 
       
   469 \&\-force_flat_namespace  \-headerpad_max_install_names 
       
   470 \&\-image_base  \-init  \-install_name  \-keep_private_externs 
       
   471 \&\-multi_module  \-multiply_defined  \-multiply_defined_unused 
       
   472 \&\-noall_load  \-nofixprebinding \-nomultidefs  \-noprebind  \-noseglinkedit 
       
   473 \&\-pagezero_size  \-prebind  \-prebind_all_twolevel_modules 
       
   474 \&\-private_bundle  \-read_only_relocs  \-sectalign 
       
   475 \&\-sectobjectsymbols  \-whyload  \-seg1addr 
       
   476 \&\-sectcreate  \-sectobjectsymbols  \-sectorder 
       
   477 \&\-seg_addr_table  \-seg_addr_table_filename  \-seglinkedit 
       
   478 \&\-segprot  \-segs_read_only_addr  \-segs_read_write_addr 
       
   479 \&\-single_module  \-static  \-sub_library  \-sub_umbrella 
       
   480 \&\-twolevel_namespace  \-umbrella  \-undefined 
       
   481 \&\-unexported_symbols_list  \-weak_reference_mismatches 
       
   482 \&\-whatsloaded\fR
       
   483 .Sp
       
   484 \&\fI\s-1MIPS\s0 Options\fR
       
   485 \&\fB\-EL  \-EB  \-march=\fR\fIarch\fR  \fB\-mtune=\fR\fIarch\fR 
       
   486 \&\fB\-mips1  \-mips2  \-mips3  \-mips4  \-mips32  \-mips32r2  \-mips64 
       
   487 \&\-mips16  \-mno\-mips16  \-mabi=\fR\fIabi\fR  \fB\-mabicalls  \-mno\-abicalls 
       
   488 \&\-mxgot  \-mno\-xgot  \-membedded\-pic  \-mno\-embedded\-pic 
       
   489 \&\-mgp32  \-mgp64  \-mfp32  \-mfp64  \-mhard\-float  \-msoft\-float 
       
   490 \&\-msingle\-float  \-mdouble\-float  \-mint64  \-mlong64  \-mlong32 
       
   491 \&\-G\fR\fInum\fR  \fB\-membedded\-data  \-mno\-embedded\-data 
       
   492 \&\-muninit\-const\-in\-rodata  \-mno\-uninit\-const\-in\-rodata 
       
   493 \&\-msplit\-addresses  \-mno\-split\-addresses  
       
   494 \&\-mexplicit\-relocs  \-mno\-explicit\-relocs  
       
   495 \&\-mrnames  \-mno\-rnames 
       
   496 \&\-mcheck\-zero\-division  \-mno\-check\-zero\-division 
       
   497 \&\-mmemcpy  \-mno\-memcpy  \-mlong\-calls  \-mno\-long\-calls 
       
   498 \&\-mmad  \-mno\-mad  \-mfused\-madd  \-mno\-fused\-madd  \-nocpp 
       
   499 \&\-mfix\-sb1  \-mno\-fix\-sb1  \-mflush\-func=\fR\fIfunc\fR 
       
   500 \&\fB\-mno\-flush\-func  \-mbranch\-likely  \-mno\-branch\-likely\fR
       
   501 .Sp
       
   502 \&\fIi386 and x86\-64 Options\fR
       
   503 \&\fB\-mtune=\fR\fIcpu-type\fR  \fB\-march=\fR\fIcpu-type\fR 
       
   504 \&\fB\-mfpmath=\fR\fIunit\fR 
       
   505 \&\fB\-masm=\fR\fIdialect\fR  \fB\-mno\-fancy\-math\-387 
       
   506 \&\-mno\-fp\-ret\-in\-387  \-msoft\-float  \-msvr3\-shlib 
       
   507 \&\-mno\-wide\-multiply  \-mrtd  \-malign\-double 
       
   508 \&\-mpreferred\-stack\-boundary=\fR\fInum\fR 
       
   509 \&\fB\-mmmx  \-msse  \-msse2 \-msse3 \-m3dnow 
       
   510 \&\-mthreads  \-mno\-align\-stringops  \-minline\-all\-stringops 
       
   511 \&\-mpush\-args  \-maccumulate\-outgoing\-args  \-m128bit\-long\-double 
       
   512 \&\-m96bit\-long\-double  \-mregparm=\fR\fInum\fR  \fB\-momit\-leaf\-frame\-pointer 
       
   513 \&\-mno\-red\-zone \-mno\-tls\-direct\-seg\-refs 
       
   514 \&\-mcmodel=\fR\fIcode-model\fR 
       
   515 \&\fB\-m32  \-m64\fR
       
   516 .Sp
       
   517 \&\fI\s-1HPPA\s0 Options\fR
       
   518 \&\fB\-march=\fR\fIarchitecture-type\fR 
       
   519 \&\fB\-mbig\-switch  \-mdisable\-fpregs  \-mdisable\-indexing 
       
   520 \&\-mfast\-indirect\-calls  \-mgas  \-mgnu\-ld   \-mhp\-ld 
       
   521 \&\-mjump\-in\-delay \-mlinker\-opt \-mlong\-calls 
       
   522 \&\-mlong\-load\-store  \-mno\-big\-switch  \-mno\-disable\-fpregs 
       
   523 \&\-mno\-disable\-indexing  \-mno\-fast\-indirect\-calls  \-mno\-gas 
       
   524 \&\-mno\-jump\-in\-delay  \-mno\-long\-load\-store 
       
   525 \&\-mno\-portable\-runtime  \-mno\-soft\-float 
       
   526 \&\-mno\-space\-regs  \-msoft\-float  \-mpa\-risc\-1\-0 
       
   527 \&\-mpa\-risc\-1\-1  \-mpa\-risc\-2\-0  \-mportable\-runtime 
       
   528 \&\-mschedule=\fR\fIcpu-type\fR  \fB\-mspace\-regs  \-msio  \-mwsio 
       
   529 \&\-nolibdld  \-static  \-threads\fR
       
   530 .Sp
       
   531 \&\fIIntel 960 Options\fR
       
   532 \&\fB\-m\fR\fIcpu-type\fR  \fB\-masm\-compat  \-mclean\-linkage 
       
   533 \&\-mcode\-align  \-mcomplex\-addr  \-mleaf\-procedures 
       
   534 \&\-mic\-compat  \-mic2.0\-compat  \-mic3.0\-compat 
       
   535 \&\-mintel\-asm  \-mno\-clean\-linkage  \-mno\-code\-align 
       
   536 \&\-mno\-complex\-addr  \-mno\-leaf\-procedures 
       
   537 \&\-mno\-old\-align  \-mno\-strict\-align  \-mno\-tail\-call 
       
   538 \&\-mnumerics  \-mold\-align  \-msoft\-float  \-mstrict\-align 
       
   539 \&\-mtail\-call\fR
       
   540 .Sp
       
   541 \&\fI\s-1DEC\s0 Alpha Options\fR
       
   542 \&\fB\-mno\-fp\-regs  \-msoft\-float  \-malpha\-as  \-mgas 
       
   543 \&\-mieee  \-mieee\-with\-inexact  \-mieee\-conformant 
       
   544 \&\-mfp\-trap\-mode=\fR\fImode\fR  \fB\-mfp\-rounding\-mode=\fR\fImode\fR 
       
   545 \&\fB\-mtrap\-precision=\fR\fImode\fR  \fB\-mbuild\-constants 
       
   546 \&\-mcpu=\fR\fIcpu-type\fR  \fB\-mtune=\fR\fIcpu-type\fR 
       
   547 \&\fB\-mbwx  \-mmax  \-mfix  \-mcix 
       
   548 \&\-mfloat\-vax  \-mfloat\-ieee 
       
   549 \&\-mexplicit\-relocs  \-msmall\-data  \-mlarge\-data 
       
   550 \&\-msmall\-text  \-mlarge\-text 
       
   551 \&\-mmemory\-latency=\fR\fItime\fR
       
   552 .Sp
       
   553 \&\fI\s-1DEC\s0 Alpha/VMS Options\fR
       
   554 \&\fB\-mvms\-return\-codes\fR
       
   555 .Sp
       
   556 \&\fIH8/300 Options\fR
       
   557 \&\fB\-mrelax  \-mh  \-ms  \-mn  \-mint32  \-malign\-300\fR
       
   558 .Sp
       
   559 \&\fI\s-1SH\s0 Options\fR
       
   560 \&\fB\-m1  \-m2  \-m2e  \-m3  \-m3e 
       
   561 \&\-m4\-nofpu  \-m4\-single\-only  \-m4\-single  \-m4 
       
   562 \&\-m5\-64media  \-m5\-64media\-nofpu 
       
   563 \&\-m5\-32media  \-m5\-32media\-nofpu 
       
   564 \&\-m5\-compact  \-m5\-compact\-nofpu 
       
   565 \&\-mb  \-ml  \-mdalign  \-mrelax 
       
   566 \&\-mbigtable  \-mfmovd  \-mhitachi  \-mnomacsave 
       
   567 \&\-mieee  \-misize  \-mpadstruct  \-mspace 
       
   568 \&\-mprefergot  \-musermode\fR
       
   569 .Sp
       
   570 \&\fISystem V Options\fR
       
   571 \&\fB\-Qy  \-Qn  \-YP,\fR\fIpaths\fR  \fB\-Ym,\fR\fIdir\fR
       
   572 .Sp
       
   573 \&\fI\s-1ARC\s0 Options\fR
       
   574 \&\fB\-EB  \-EL 
       
   575 \&\-mmangle\-cpu  \-mcpu=\fR\fIcpu\fR  \fB\-mtext=\fR\fItext-section\fR 
       
   576 \&\fB\-mdata=\fR\fIdata-section\fR  \fB\-mrodata=\fR\fIreadonly-data-section\fR
       
   577 .Sp
       
   578 \&\fITMS320C3x/C4x Options\fR
       
   579 \&\fB\-mcpu=\fR\fIcpu\fR  \fB\-mbig  \-msmall  \-mregparm  \-mmemparm 
       
   580 \&\-mfast\-fix  \-mmpyi  \-mbk  \-mti  \-mdp\-isr\-reload 
       
   581 \&\-mrpts=\fR\fIcount\fR  \fB\-mrptb  \-mdb  \-mloop\-unsigned 
       
   582 \&\-mparallel\-insns  \-mparallel\-mpy  \-mpreserve\-float\fR
       
   583 .Sp
       
   584 \&\fIV850 Options\fR
       
   585 \&\fB\-mlong\-calls  \-mno\-long\-calls  \-mep  \-mno\-ep 
       
   586 \&\-mprolog\-function  \-mno\-prolog\-function  \-mspace 
       
   587 \&\-mtda=\fR\fIn\fR  \fB\-msda=\fR\fIn\fR  \fB\-mzda=\fR\fIn\fR 
       
   588 \&\fB\-mapp\-regs  \-mno\-app\-regs 
       
   589 \&\-mdisable\-callt  \-mno\-disable\-callt 
       
   590 \&\-mv850e1 
       
   591 \&\-mv850e 
       
   592 \&\-mv850  \-mbig\-switch\fR
       
   593 .Sp
       
   594 \&\fI\s-1NS32K\s0 Options\fR
       
   595 \&\fB\-m32032  \-m32332  \-m32532  \-m32081  \-m32381 
       
   596 \&\-mmult\-add  \-mnomult\-add  \-msoft\-float  \-mrtd  \-mnortd 
       
   597 \&\-mregparam  \-mnoregparam  \-msb  \-mnosb 
       
   598 \&\-mbitfield  \-mnobitfield  \-mhimem  \-mnohimem\fR
       
   599 .Sp
       
   600 \&\fI\s-1AVR\s0 Options\fR
       
   601 \&\fB\-mmcu=\fR\fImcu\fR  \fB\-msize  \-minit\-stack=\fR\fIn\fR  \fB\-mno\-interrupts 
       
   602 \&\-mcall\-prologues  \-mno\-tablejump  \-mtiny\-stack\fR
       
   603 .Sp
       
   604 \&\fIMCore Options\fR
       
   605 \&\fB\-mhardlit  \-mno\-hardlit  \-mdiv  \-mno\-div  \-mrelax\-immediates 
       
   606 \&\-mno\-relax\-immediates  \-mwide\-bitfields  \-mno\-wide\-bitfields 
       
   607 \&\-m4byte\-functions  \-mno\-4byte\-functions  \-mcallgraph\-data 
       
   608 \&\-mno\-callgraph\-data  \-mslow\-bytes  \-mno\-slow\-bytes  \-mno\-lsim 
       
   609 \&\-mlittle\-endian  \-mbig\-endian  \-m210  \-m340  \-mstack\-increment\fR
       
   610 .Sp
       
   611 \&\fI\s-1MMIX\s0 Options\fR
       
   612 \&\fB\-mlibfuncs  \-mno\-libfuncs  \-mepsilon  \-mno\-epsilon  \-mabi=gnu 
       
   613 \&\-mabi=mmixware  \-mzero\-extend  \-mknuthdiv  \-mtoplevel\-symbols 
       
   614 \&\-melf  \-mbranch\-predict  \-mno\-branch\-predict  \-mbase\-addresses 
       
   615 \&\-mno\-base\-addresses  \-msingle\-exit  \-mno\-single\-exit\fR
       
   616 .Sp
       
   617 \&\fI\s-1IA\-64\s0 Options\fR
       
   618 \&\fB\-mbig\-endian  \-mlittle\-endian  \-mgnu\-as  \-mgnu\-ld  \-mno\-pic 
       
   619 \&\-mvolatile\-asm\-stop  \-mb\-step  \-mregister\-names  \-mno\-sdata 
       
   620 \&\-mconstant\-gp  \-mauto\-pic  \-minline\-float\-divide\-min\-latency 
       
   621 \&\-minline\-float\-divide\-max\-throughput 
       
   622 \&\-minline\-int\-divide\-min\-latency 
       
   623 \&\-minline\-int\-divide\-max\-throughput  \-mno\-dwarf2\-asm 
       
   624 \&\-mfixed\-range=\fR\fIregister-range\fR
       
   625 .Sp
       
   626 \&\fID30V Options\fR
       
   627 \&\fB\-mextmem  \-mextmemory  \-monchip  \-mno\-asm\-optimize 
       
   628 \&\-masm\-optimize  \-mbranch\-cost=\fR\fIn\fR  \fB\-mcond\-exec=\fR\fIn\fR
       
   629 .Sp
       
   630 \&\fIS/390 and zSeries Options\fR
       
   631 \&\fB\-mtune=\fR\fIcpu-type\fR  \fB\-march=\fR\fIcpu-type\fR 
       
   632 \&\fB\-mhard\-float  \-msoft\-float  \-mbackchain  \-mno\-backchain 
       
   633 \&\-msmall\-exec  \-mno\-small\-exec  \-mmvcle \-mno\-mvcle 
       
   634 \&\-m64  \-m31  \-mdebug  \-mno\-debug  \-mesa  \-mzarch  \-mfused\-madd  \-mno\-fused\-madd\fR
       
   635 .Sp
       
   636 \&\fI\s-1CRIS\s0 Options\fR
       
   637 \&\fB\-mcpu=\fR\fIcpu\fR  \fB\-march=\fR\fIcpu\fR  \fB\-mtune=\fR\fIcpu\fR 
       
   638 \&\fB\-mmax\-stack\-frame=\fR\fIn\fR  \fB\-melinux\-stacksize=\fR\fIn\fR 
       
   639 \&\fB\-metrax4  \-metrax100  \-mpdebug  \-mcc\-init  \-mno\-side\-effects 
       
   640 \&\-mstack\-align  \-mdata\-align  \-mconst\-align 
       
   641 \&\-m32\-bit  \-m16\-bit  \-m8\-bit  \-mno\-prologue\-epilogue  \-mno\-gotplt 
       
   642 \&\-melf  \-maout  \-melinux  \-mlinux  \-sim  \-sim2 
       
   643 \&\-mmul\-bug\-workaround  \-mno\-mul\-bug\-workaround\fR
       
   644 .Sp
       
   645 \&\fI\s-1PDP\-11\s0 Options\fR
       
   646 \&\fB\-mfpu  \-msoft\-float  \-mac0  \-mno\-ac0  \-m40  \-m45  \-m10 
       
   647 \&\-mbcopy  \-mbcopy\-builtin  \-mint32  \-mno\-int16 
       
   648 \&\-mint16  \-mno\-int32  \-mfloat32  \-mno\-float64 
       
   649 \&\-mfloat64  \-mno\-float32  \-mabshi  \-mno\-abshi 
       
   650 \&\-mbranch\-expensive  \-mbranch\-cheap 
       
   651 \&\-msplit  \-mno\-split  \-munix\-asm  \-mdec\-asm\fR
       
   652 .Sp
       
   653 \&\fIXstormy16 Options\fR
       
   654 \&\fB\-msim\fR
       
   655 .Sp
       
   656 \&\fIXtensa Options\fR
       
   657 \&\fB\-mconst16 \-mno\-const16 
       
   658 \&\-mfused\-madd  \-mno\-fused\-madd 
       
   659 \&\-mtext\-section\-literals  \-mno\-text\-section\-literals 
       
   660 \&\-mtarget\-align  \-mno\-target\-align 
       
   661 \&\-mlongcalls  \-mno\-longcalls\fR
       
   662 .Sp
       
   663 \&\fI\s-1FRV\s0 Options\fR
       
   664 \&\fB\-mgpr\-32  \-mgpr\-64  \-mfpr\-32  \-mfpr\-64 
       
   665 \&\-mhard\-float  \-msoft\-float 
       
   666 \&\-malloc\-cc  \-mfixed\-cc  \-mdword  \-mno\-dword 
       
   667 \&\-mdouble  \-mno\-double 
       
   668 \&\-mmedia  \-mno\-media  \-mmuladd  \-mno\-muladd 
       
   669 \&\-mlibrary\-pic  \-macc\-4 \-macc\-8 
       
   670 \&\-mpack  \-mno\-pack  \-mno\-eflags  \-mcond\-move  \-mno\-cond\-move 
       
   671 \&\-mscc  \-mno\-scc  \-mcond\-exec  \-mno\-cond\-exec 
       
   672 \&\-mvliw\-branch  \-mno\-vliw\-branch 
       
   673 \&\-mmulti\-cond\-exec  \-mno\-multi\-cond\-exec  \-mnested\-cond\-exec 
       
   674 \&\-mno\-nested\-cond\-exec  \-mtomcat\-stats 
       
   675 \&\-mcpu=\fR\fIcpu\fR
       
   676 .IP "\fICode Generation Options\fR" 4
       
   677 .IX Item "Code Generation Options"
       
   678 \&\fB\-fcall\-saved\-\fR\fIreg\fR  \fB\-fcall\-used\-\fR\fIreg\fR 
       
   679 \&\fB\-ffixed\-\fR\fIreg\fR  \fB\-fexceptions 
       
   680 \&\-fnon\-call\-exceptions  \-funwind\-tables 
       
   681 \&\-fasynchronous\-unwind\-tables 
       
   682 \&\-finhibit\-size\-directive  \-finstrument\-functions 
       
   683 \&\-fno\-common  \-fno\-ident 
       
   684 \&\-fpcc\-struct\-return  \-fpic  \-fPIC \-fpie \-fPIE 
       
   685 \&\-freg\-struct\-return  \-fshared\-data  \-fshort\-enums 
       
   686 \&\-fshort\-double  \-fshort\-wchar 
       
   687 \&\-fverbose\-asm  \-fpack\-struct  \-fstack\-check 
       
   688 \&\-fstack\-limit\-register=\fR\fIreg\fR  \fB\-fstack\-limit\-symbol=\fR\fIsym\fR 
       
   689 \&\fB\-fargument\-alias  \-fargument\-noalias 
       
   690 \&\-fargument\-noalias\-global  \-fleading\-underscore 
       
   691 \&\-ftls\-model=\fR\fImodel\fR 
       
   692 \&\fB\-ftrapv  \-fwrapv  \-fbounds\-check\fR
       
   693 .Sh "Options Controlling the Kind of Output"
       
   694 .IX Subsection "Options Controlling the Kind of Output"
       
   695 Compilation can involve up to four stages: preprocessing, compilation
       
   696 proper, assembly and linking, always in that order.  \s-1GCC\s0 is capable of
       
   697 preprocessing and compiling several files either into several
       
   698 assembler input files, or into one assembler input file; then each
       
   699 assembler input file produces an object file, and linking combines all
       
   700 the object files (those newly compiled, and those specified as input)
       
   701 into an executable file.
       
   702 .PP
       
   703 For any given input file, the file name suffix determines what kind of
       
   704 compilation is done:
       
   705 .IP "\fIfile\fR\fB.c\fR" 4
       
   706 .IX Item "file.c"
       
   707 C source code which must be preprocessed.
       
   708 .IP "\fIfile\fR\fB.i\fR" 4
       
   709 .IX Item "file.i"
       
   710 C source code which should not be preprocessed.
       
   711 .IP "\fIfile\fR\fB.ii\fR" 4
       
   712 .IX Item "file.ii"
       
   713 \&\*(C+ source code which should not be preprocessed.
       
   714 .IP "\fIfile\fR\fB.m\fR" 4
       
   715 .IX Item "file.m"
       
   716 Objective-C source code.  Note that you must link with the library
       
   717 \&\fIlibobjc.a\fR to make an Objective-C program work.
       
   718 .IP "\fIfile\fR\fB.mi\fR" 4
       
   719 .IX Item "file.mi"
       
   720 Objective-C source code which should not be preprocessed.
       
   721 .IP "\fIfile\fR\fB.h\fR" 4
       
   722 .IX Item "file.h"
       
   723 C or \*(C+ header file to be turned into a precompiled header.
       
   724 .IP "\fIfile\fR\fB.cc\fR" 4
       
   725 .IX Item "file.cc"
       
   726 .PD 0
       
   727 .IP "\fIfile\fR\fB.cp\fR" 4
       
   728 .IX Item "file.cp"
       
   729 .IP "\fIfile\fR\fB.cxx\fR" 4
       
   730 .IX Item "file.cxx"
       
   731 .IP "\fIfile\fR\fB.cpp\fR" 4
       
   732 .IX Item "file.cpp"
       
   733 .IP "\fIfile\fR\fB.CPP\fR" 4
       
   734 .IX Item "file.CPP"
       
   735 .IP "\fIfile\fR\fB.c++\fR" 4
       
   736 .IX Item "file.c++"
       
   737 .IP "\fIfile\fR\fB.C\fR" 4
       
   738 .IX Item "file.C"
       
   739 .PD
       
   740 \&\*(C+ source code which must be preprocessed.  Note that in \fB.cxx\fR,
       
   741 the last two letters must both be literally \fBx\fR.  Likewise,
       
   742 \&\fB.C\fR refers to a literal capital C.
       
   743 .IP "\fIfile\fR\fB.hh\fR" 4
       
   744 .IX Item "file.hh"
       
   745 .PD 0
       
   746 .IP "\fIfile\fR\fB.H\fR" 4
       
   747 .IX Item "file.H"
       
   748 .PD
       
   749 \&\*(C+ header file to be turned into a precompiled header.
       
   750 .IP "\fIfile\fR\fB.f\fR" 4
       
   751 .IX Item "file.f"
       
   752 .PD 0
       
   753 .IP "\fIfile\fR\fB.for\fR" 4
       
   754 .IX Item "file.for"
       
   755 .IP "\fIfile\fR\fB.FOR\fR" 4
       
   756 .IX Item "file.FOR"
       
   757 .PD
       
   758 Fortran source code which should not be preprocessed.
       
   759 .IP "\fIfile\fR\fB.F\fR" 4
       
   760 .IX Item "file.F"
       
   761 .PD 0
       
   762 .IP "\fIfile\fR\fB.fpp\fR" 4
       
   763 .IX Item "file.fpp"
       
   764 .IP "\fIfile\fR\fB.FPP\fR" 4
       
   765 .IX Item "file.FPP"
       
   766 .PD
       
   767 Fortran source code which must be preprocessed (with the traditional
       
   768 preprocessor).
       
   769 .IP "\fIfile\fR\fB.r\fR" 4
       
   770 .IX Item "file.r"
       
   771 Fortran source code which must be preprocessed with a \s-1RATFOR\s0
       
   772 preprocessor (not included with \s-1GCC\s0).
       
   773 .IP "\fIfile\fR\fB.ads\fR" 4
       
   774 .IX Item "file.ads"
       
   775 Ada source code file which contains a library unit declaration (a
       
   776 declaration of a package, subprogram, or generic, or a generic
       
   777 instantiation), or a library unit renaming declaration (a package,
       
   778 generic, or subprogram renaming declaration).  Such files are also
       
   779 called \fIspecs\fR.
       
   780 .IP "\fIfile\fR\fB.adb\fR" 4
       
   781 .IX Item "file.adb"
       
   782 Ada source code file containing a library unit body (a subprogram or
       
   783 package body).  Such files are also called \fIbodies\fR.
       
   784 .IP "\fIfile\fR\fB.s\fR" 4
       
   785 .IX Item "file.s"
       
   786 Assembler code.
       
   787 .IP "\fIfile\fR\fB.S\fR" 4
       
   788 .IX Item "file.S"
       
   789 Assembler code which must be preprocessed.
       
   790 .IP "\fIother\fR" 4
       
   791 .IX Item "other"
       
   792 An object file to be fed straight into linking.
       
   793 Any file name with no recognized suffix is treated this way.
       
   794 .PP
       
   795 You can specify the input language explicitly with the \fB\-x\fR option:
       
   796 .IP "\fB\-x\fR \fIlanguage\fR" 4
       
   797 .IX Item "-x language"
       
   798 Specify explicitly the \fIlanguage\fR for the following input files
       
   799 (rather than letting the compiler choose a default based on the file
       
   800 name suffix).  This option applies to all following input files until
       
   801 the next \fB\-x\fR option.  Possible values for \fIlanguage\fR are:
       
   802 .Sp
       
   803 .Vb 8
       
   804 \&        c  c-header  cpp-output
       
   805 \&        c++  c++-header  c++-cpp-output
       
   806 \&        objective-c  objective-c-header  objc-cpp-output
       
   807 \&        assembler  assembler-with-cpp
       
   808 \&        ada
       
   809 \&        f77  f77-cpp-input  ratfor
       
   810 \&        java
       
   811 \&        treelang
       
   812 .Ve
       
   813 .IP "\fB\-x none\fR" 4
       
   814 .IX Item "-x none"
       
   815 Turn off any specification of a language, so that subsequent files are
       
   816 handled according to their file name suffixes (as they are if \fB\-x\fR
       
   817 has not been used at all).
       
   818 .IP "\fB\-pass\-exit\-codes\fR" 4
       
   819 .IX Item "-pass-exit-codes"
       
   820 Normally the \fBgcc\fR program will exit with the code of 1 if any
       
   821 phase of the compiler returns a non-success return code.  If you specify
       
   822 \&\fB\-pass\-exit\-codes\fR, the \fBgcc\fR program will instead return with
       
   823 numerically highest error produced by any phase that returned an error
       
   824 indication.
       
   825 .PP
       
   826 If you only want some of the stages of compilation, you can use
       
   827 \&\fB\-x\fR (or filename suffixes) to tell \fBgcc\fR where to start, and
       
   828 one of the options \fB\-c\fR, \fB\-S\fR, or \fB\-E\fR to say where
       
   829 \&\fBgcc\fR is to stop.  Note that some combinations (for example,
       
   830 \&\fB\-x cpp-output \-E\fR) instruct \fBgcc\fR to do nothing at all.
       
   831 .IP "\fB\-c\fR" 4
       
   832 .IX Item "-c"
       
   833 Compile or assemble the source files, but do not link.  The linking
       
   834 stage simply is not done.  The ultimate output is in the form of an
       
   835 object file for each source file.
       
   836 .Sp
       
   837 By default, the object file name for a source file is made by replacing
       
   838 the suffix \fB.c\fR, \fB.i\fR, \fB.s\fR, etc., with \fB.o\fR.
       
   839 .Sp
       
   840 Unrecognized input files, not requiring compilation or assembly, are
       
   841 ignored.
       
   842 .IP "\fB\-S\fR" 4
       
   843 .IX Item "-S"
       
   844 Stop after the stage of compilation proper; do not assemble.  The output
       
   845 is in the form of an assembler code file for each non-assembler input
       
   846 file specified.
       
   847 .Sp
       
   848 By default, the assembler file name for a source file is made by
       
   849 replacing the suffix \fB.c\fR, \fB.i\fR, etc., with \fB.s\fR.
       
   850 .Sp
       
   851 Input files that don't require compilation are ignored.
       
   852 .IP "\fB\-E\fR" 4
       
   853 .IX Item "-E"
       
   854 Stop after the preprocessing stage; do not run the compiler proper.  The
       
   855 output is in the form of preprocessed source code, which is sent to the
       
   856 standard output.
       
   857 .Sp
       
   858 Input files which don't require preprocessing are ignored.
       
   859 .IP "\fB\-o\fR \fIfile\fR" 4
       
   860 .IX Item "-o file"
       
   861 Place output in file \fIfile\fR.  This applies regardless to whatever
       
   862 sort of output is being produced, whether it be an executable file,
       
   863 an object file, an assembler file or preprocessed C code.
       
   864 .Sp
       
   865 If you specify \fB\-o\fR when compiling more than one input file, or
       
   866 you are producing an executable file as output, all the source files
       
   867 on the command line will be compiled at once.
       
   868 .Sp
       
   869 If \fB\-o\fR is not specified, the default is to put an executable file
       
   870 in \fIa.out\fR, the object file for \fI\fIsource\fI.\fIsuffix\fI\fR in
       
   871 \&\fI\fIsource\fI.o\fR, its assembler file in \fI\fIsource\fI.s\fR, and
       
   872 all preprocessed C source on standard output.
       
   873 .IP "\fB\-v\fR" 4
       
   874 .IX Item "-v"
       
   875 Print (on standard error output) the commands executed to run the stages
       
   876 of compilation.  Also print the version number of the compiler driver
       
   877 program and of the preprocessor and the compiler proper.
       
   878 .IP "\fB\-###\fR" 4
       
   879 .IX Item "-###"
       
   880 Like \fB\-v\fR except the commands are not executed and all command
       
   881 arguments are quoted.  This is useful for shell scripts to capture the
       
   882 driver-generated command lines.
       
   883 .IP "\fB\-pipe\fR" 4
       
   884 .IX Item "-pipe"
       
   885 Use pipes rather than temporary files for communication between the
       
   886 various stages of compilation.  This fails to work on some systems where
       
   887 the assembler is unable to read from a pipe; but the \s-1GNU\s0 assembler has
       
   888 no trouble.
       
   889 .IP "\fB\-\-help\fR" 4
       
   890 .IX Item "--help"
       
   891 Print (on the standard output) a description of the command line options
       
   892 understood by \fBgcc\fR.  If the \fB\-v\fR option is also specified
       
   893 then \fB\-\-help\fR will also be passed on to the various processes
       
   894 invoked by \fBgcc\fR, so that they can display the command line options
       
   895 they accept.  If the \fB\-Wextra\fR option is also specified then command
       
   896 line options which have no documentation associated with them will also
       
   897 be displayed.
       
   898 .IP "\fB\-\-target\-help\fR" 4
       
   899 .IX Item "--target-help"
       
   900 Print (on the standard output) a description of target specific command
       
   901 line options for each tool.
       
   902 .IP "\fB\-\-version\fR" 4
       
   903 .IX Item "--version"
       
   904 Display the version number and copyrights of the invoked \s-1GCC\s0.
       
   905 .Sh "Compiling \*(C+ Programs"
       
   906 .IX Subsection "Compiling  Programs"
       
   907 \&\*(C+ source files conventionally use one of the suffixes \fB.C\fR,
       
   908 \&\fB.cc\fR, \fB.cpp\fR, \fB.CPP\fR, \fB.c++\fR, \fB.cp\fR, or
       
   909 \&\fB.cxx\fR; \*(C+ header files often use \fB.hh\fR or \fB.H\fR; and
       
   910 preprocessed \*(C+ files use the suffix \fB.ii\fR.  \s-1GCC\s0 recognizes
       
   911 files with these names and compiles them as \*(C+ programs even if you
       
   912 call the compiler the same way as for compiling C programs (usually
       
   913 with the name \fBgcc\fR).
       
   914 .PP
       
   915 However, \*(C+ programs often require class libraries as well as a
       
   916 compiler that understands the \*(C+ language\-\-\-and under some
       
   917 circumstances, you might want to compile programs or header files from
       
   918 standard input, or otherwise without a suffix that flags them as \*(C+
       
   919 programs.  You might also like to precompile a C header file with a
       
   920 \&\fB.h\fR extension to be used in \*(C+ compilations.  \fBg++\fR is a
       
   921 program that calls \s-1GCC\s0 with the default language set to \*(C+, and
       
   922 automatically specifies linking against the \*(C+ library.  On many
       
   923 systems, \fBg++\fR is also installed with the name \fBc++\fR.
       
   924 .PP
       
   925 When you compile \*(C+ programs, you may specify many of the same
       
   926 command-line options that you use for compiling programs in any
       
   927 language; or command-line options meaningful for C and related
       
   928 languages; or options that are meaningful only for \*(C+ programs.
       
   929 .Sh "Options Controlling C Dialect"
       
   930 .IX Subsection "Options Controlling C Dialect"
       
   931 The following options control the dialect of C (or languages derived
       
   932 from C, such as \*(C+ and Objective\-C) that the compiler accepts:
       
   933 .IP "\fB\-ansi\fR" 4
       
   934 .IX Item "-ansi"
       
   935 In C mode, support all \s-1ISO\s0 C90 programs.  In \*(C+ mode,
       
   936 remove \s-1GNU\s0 extensions that conflict with \s-1ISO\s0 \*(C+.
       
   937 .Sp
       
   938 This turns off certain features of \s-1GCC\s0 that are incompatible with \s-1ISO\s0
       
   939 C90 (when compiling C code), or of standard \*(C+ (when compiling \*(C+ code),
       
   940 such as the \f(CW\*(C`asm\*(C'\fR and \f(CW\*(C`typeof\*(C'\fR keywords, and
       
   941 predefined macros such as \f(CW\*(C`unix\*(C'\fR and \f(CW\*(C`vax\*(C'\fR that identify the
       
   942 type of system you are using.  It also enables the undesirable and
       
   943 rarely used \s-1ISO\s0 trigraph feature.  For the C compiler,
       
   944 it disables recognition of \*(C+ style \fB//\fR comments as well as
       
   945 the \f(CW\*(C`inline\*(C'\fR keyword.
       
   946 .Sp
       
   947 The alternate keywords \f(CW\*(C`_\|_asm_\|_\*(C'\fR, \f(CW\*(C`_\|_extension_\|_\*(C'\fR,
       
   948 \&\f(CW\*(C`_\|_inline_\|_\*(C'\fR and \f(CW\*(C`_\|_typeof_\|_\*(C'\fR continue to work despite
       
   949 \&\fB\-ansi\fR.  You would not want to use them in an \s-1ISO\s0 C program, of
       
   950 course, but it is useful to put them in header files that might be included
       
   951 in compilations done with \fB\-ansi\fR.  Alternate predefined macros
       
   952 such as \f(CW\*(C`_\|_unix_\|_\*(C'\fR and \f(CW\*(C`_\|_vax_\|_\*(C'\fR are also available, with or
       
   953 without \fB\-ansi\fR.
       
   954 .Sp
       
   955 The \fB\-ansi\fR option does not cause non-ISO programs to be
       
   956 rejected gratuitously.  For that, \fB\-pedantic\fR is required in
       
   957 addition to \fB\-ansi\fR.  
       
   958 .Sp
       
   959 The macro \f(CW\*(C`_\|_STRICT_ANSI_\|_\*(C'\fR is predefined when the \fB\-ansi\fR
       
   960 option is used.  Some header files may notice this macro and refrain
       
   961 from declaring certain functions or defining certain macros that the
       
   962 \&\s-1ISO\s0 standard doesn't call for; this is to avoid interfering with any
       
   963 programs that might use these names for other things.
       
   964 .Sp
       
   965 Functions which would normally be built in but do not have semantics
       
   966 defined by \s-1ISO\s0 C (such as \f(CW\*(C`alloca\*(C'\fR and \f(CW\*(C`ffs\*(C'\fR) are not built-in
       
   967 functions with \fB\-ansi\fR is used.  
       
   968 .IP "\fB\-std=\fR" 4
       
   969 .IX Item "-std="
       
   970 Determine the language standard.  This option is currently only
       
   971 supported when compiling C or \*(C+.  A value for this option must be
       
   972 provided; possible values are
       
   973 .RS 4
       
   974 .IP "\fBc89\fR" 4
       
   975 .IX Item "c89"
       
   976 .PD 0
       
   977 .IP "\fBiso9899:1990\fR" 4
       
   978 .IX Item "iso9899:1990"
       
   979 .PD
       
   980 \&\s-1ISO\s0 C90 (same as \fB\-ansi\fR).
       
   981 .IP "\fBiso9899:199409\fR" 4
       
   982 .IX Item "iso9899:199409"
       
   983 \&\s-1ISO\s0 C90 as modified in amendment 1.
       
   984 .IP "\fBc99\fR" 4
       
   985 .IX Item "c99"
       
   986 .PD 0
       
   987 .IP "\fBc9x\fR" 4
       
   988 .IX Item "c9x"
       
   989 .IP "\fBiso9899:1999\fR" 4
       
   990 .IX Item "iso9899:1999"
       
   991 .IP "\fBiso9899:199x\fR" 4
       
   992 .IX Item "iso9899:199x"
       
   993 .PD
       
   994 \&\s-1ISO\s0 C99.  Note that this standard is not yet fully supported; see
       
   995 <\fBhttp://gcc.gnu.org/gcc\-3.4/c99status.html\fR> for more information.  The
       
   996 names \fBc9x\fR and \fBiso9899:199x\fR are deprecated.
       
   997 .IP "\fBgnu89\fR" 4
       
   998 .IX Item "gnu89"
       
   999 Default, \s-1ISO\s0 C90 plus \s-1GNU\s0 extensions (including some C99 features).
       
  1000 .IP "\fBgnu99\fR" 4
       
  1001 .IX Item "gnu99"
       
  1002 .PD 0
       
  1003 .IP "\fBgnu9x\fR" 4
       
  1004 .IX Item "gnu9x"
       
  1005 .PD
       
  1006 \&\s-1ISO\s0 C99 plus \s-1GNU\s0 extensions.  When \s-1ISO\s0 C99 is fully implemented in \s-1GCC\s0,
       
  1007 this will become the default.  The name \fBgnu9x\fR is deprecated.
       
  1008 .IP "\fBc++98\fR" 4
       
  1009 .IX Item "c++98"
       
  1010 The 1998 \s-1ISO\s0 \*(C+ standard plus amendments.
       
  1011 .IP "\fBgnu++98\fR" 4
       
  1012 .IX Item "gnu++98"
       
  1013 The same as \fB\-std=c++98\fR plus \s-1GNU\s0 extensions.  This is the
       
  1014 default for \*(C+ code.
       
  1015 .RE
       
  1016 .RS 4
       
  1017 .Sp
       
  1018 Even when this option is not specified, you can still use some of the
       
  1019 features of newer standards in so far as they do not conflict with
       
  1020 previous C standards.  For example, you may use \f(CW\*(C`_\|_restrict_\|_\*(C'\fR even
       
  1021 when \fB\-std=c99\fR is not specified.
       
  1022 .Sp
       
  1023 The \fB\-std\fR options specifying some version of \s-1ISO\s0 C have the same
       
  1024 effects as \fB\-ansi\fR, except that features that were not in \s-1ISO\s0 C90
       
  1025 but are in the specified version (for example, \fB//\fR comments and
       
  1026 the \f(CW\*(C`inline\*(C'\fR keyword in \s-1ISO\s0 C99) are not disabled.
       
  1027 .RE
       
  1028 .IP "\fB\-aux\-info\fR \fIfilename\fR" 4
       
  1029 .IX Item "-aux-info filename"
       
  1030 Output to the given filename prototyped declarations for all functions
       
  1031 declared and/or defined in a translation unit, including those in header
       
  1032 files.  This option is silently ignored in any language other than C.
       
  1033 .Sp
       
  1034 Besides declarations, the file indicates, in comments, the origin of
       
  1035 each declaration (source file and line), whether the declaration was
       
  1036 implicit, prototyped or unprototyped (\fBI\fR, \fBN\fR for new or
       
  1037 \&\fBO\fR for old, respectively, in the first character after the line
       
  1038 number and the colon), and whether it came from a declaration or a
       
  1039 definition (\fBC\fR or \fBF\fR, respectively, in the following
       
  1040 character).  In the case of function definitions, a K&R\-style list of
       
  1041 arguments followed by their declarations is also provided, inside
       
  1042 comments, after the declaration.
       
  1043 .IP "\fB\-fno\-asm\fR" 4
       
  1044 .IX Item "-fno-asm"
       
  1045 Do not recognize \f(CW\*(C`asm\*(C'\fR, \f(CW\*(C`inline\*(C'\fR or \f(CW\*(C`typeof\*(C'\fR as a
       
  1046 keyword, so that code can use these words as identifiers.  You can use
       
  1047 the keywords \f(CW\*(C`_\|_asm_\|_\*(C'\fR, \f(CW\*(C`_\|_inline_\|_\*(C'\fR and \f(CW\*(C`_\|_typeof_\|_\*(C'\fR
       
  1048 instead.  \fB\-ansi\fR implies \fB\-fno\-asm\fR.
       
  1049 .Sp
       
  1050 In \*(C+, this switch only affects the \f(CW\*(C`typeof\*(C'\fR keyword, since
       
  1051 \&\f(CW\*(C`asm\*(C'\fR and \f(CW\*(C`inline\*(C'\fR are standard keywords.  You may want to
       
  1052 use the \fB\-fno\-gnu\-keywords\fR flag instead, which has the same
       
  1053 effect.  In C99 mode (\fB\-std=c99\fR or \fB\-std=gnu99\fR), this
       
  1054 switch only affects the \f(CW\*(C`asm\*(C'\fR and \f(CW\*(C`typeof\*(C'\fR keywords, since
       
  1055 \&\f(CW\*(C`inline\*(C'\fR is a standard keyword in \s-1ISO\s0 C99.
       
  1056 .IP "\fB\-fno\-builtin\fR" 4
       
  1057 .IX Item "-fno-builtin"
       
  1058 .PD 0
       
  1059 .IP "\fB\-fno\-builtin\-\fR\fIfunction\fR" 4
       
  1060 .IX Item "-fno-builtin-function"
       
  1061 .PD
       
  1062 Don't recognize built-in functions that do not begin with
       
  1063 \&\fB_\|_builtin_\fR as prefix.  
       
  1064 .Sp
       
  1065 \&\s-1GCC\s0 normally generates special code to handle certain built-in functions
       
  1066 more efficiently; for instance, calls to \f(CW\*(C`alloca\*(C'\fR may become single
       
  1067 instructions that adjust the stack directly, and calls to \f(CW\*(C`memcpy\*(C'\fR
       
  1068 may become inline copy loops.  The resulting code is often both smaller
       
  1069 and faster, but since the function calls no longer appear as such, you
       
  1070 cannot set a breakpoint on those calls, nor can you change the behavior
       
  1071 of the functions by linking with a different library.
       
  1072 .Sp
       
  1073 With the \fB\-fno\-builtin\-\fR\fIfunction\fR option
       
  1074 only the built-in function \fIfunction\fR is
       
  1075 disabled.  \fIfunction\fR must not begin with \fB_\|_builtin_\fR.  If a
       
  1076 function is named this is not built-in in this version of \s-1GCC\s0, this
       
  1077 option is ignored.  There is no corresponding
       
  1078 \&\fB\-fbuiltin\-\fR\fIfunction\fR option; if you wish to enable
       
  1079 built-in functions selectively when using \fB\-fno\-builtin\fR or
       
  1080 \&\fB\-ffreestanding\fR, you may define macros such as:
       
  1081 .Sp
       
  1082 .Vb 2
       
  1083 \&        #define abs(n)          __builtin_abs ((n))
       
  1084 \&        #define strcpy(d, s)    __builtin_strcpy ((d), (s))
       
  1085 .Ve
       
  1086 .IP "\fB\-fhosted\fR" 4
       
  1087 .IX Item "-fhosted"
       
  1088 Assert that compilation takes place in a hosted environment.  This implies
       
  1089 \&\fB\-fbuiltin\fR.  A hosted environment is one in which the
       
  1090 entire standard library is available, and in which \f(CW\*(C`main\*(C'\fR has a return
       
  1091 type of \f(CW\*(C`int\*(C'\fR.  Examples are nearly everything except a kernel.
       
  1092 This is equivalent to \fB\-fno\-freestanding\fR.
       
  1093 .IP "\fB\-ffreestanding\fR" 4
       
  1094 .IX Item "-ffreestanding"
       
  1095 Assert that compilation takes place in a freestanding environment.  This
       
  1096 implies \fB\-fno\-builtin\fR.  A freestanding environment
       
  1097 is one in which the standard library may not exist, and program startup may
       
  1098 not necessarily be at \f(CW\*(C`main\*(C'\fR.  The most obvious example is an \s-1OS\s0 kernel.
       
  1099 This is equivalent to \fB\-fno\-hosted\fR.
       
  1100 .IP "\fB\-fms\-extensions\fR" 4
       
  1101 .IX Item "-fms-extensions"
       
  1102 Accept some non-standard constructs used in Microsoft header files.
       
  1103 .IP "\fB\-trigraphs\fR" 4
       
  1104 .IX Item "-trigraphs"
       
  1105 Support \s-1ISO\s0 C trigraphs.  The \fB\-ansi\fR option (and \fB\-std\fR
       
  1106 options for strict \s-1ISO\s0 C conformance) implies \fB\-trigraphs\fR.
       
  1107 .IP "\fB\-no\-integrated\-cpp\fR" 4
       
  1108 .IX Item "-no-integrated-cpp"
       
  1109 Performs a compilation in two passes: preprocessing and compiling.  This
       
  1110 option allows a user supplied \*(L"cc1\*(R", \*(L"cc1plus\*(R", or \*(L"cc1obj\*(R" via the
       
  1111 \&\fB\-B\fR option. The user supplied compilation step can then add in
       
  1112 an additional preprocessing step after normal preprocessing but before
       
  1113 compiling. The default is to use the integrated cpp (internal cpp)
       
  1114 .Sp
       
  1115 The semantics of this option will change if \*(L"cc1\*(R", \*(L"cc1plus\*(R", and
       
  1116 \&\*(L"cc1obj\*(R" are merged.
       
  1117 .IP "\fB\-traditional\fR" 4
       
  1118 .IX Item "-traditional"
       
  1119 .PD 0
       
  1120 .IP "\fB\-traditional\-cpp\fR" 4
       
  1121 .IX Item "-traditional-cpp"
       
  1122 .PD
       
  1123 Formerly, these options caused \s-1GCC\s0 to attempt to emulate a pre-standard
       
  1124 C compiler.  They are now only supported with the \fB\-E\fR switch.
       
  1125 The preprocessor continues to support a pre-standard mode.  See the \s-1GNU\s0
       
  1126 \&\s-1CPP\s0 manual for details.
       
  1127 .IP "\fB\-fcond\-mismatch\fR" 4
       
  1128 .IX Item "-fcond-mismatch"
       
  1129 Allow conditional expressions with mismatched types in the second and
       
  1130 third arguments.  The value of such an expression is void.  This option
       
  1131 is not supported for \*(C+.
       
  1132 .IP "\fB\-funsigned\-char\fR" 4
       
  1133 .IX Item "-funsigned-char"
       
  1134 Let the type \f(CW\*(C`char\*(C'\fR be unsigned, like \f(CW\*(C`unsigned char\*(C'\fR.
       
  1135 .Sp
       
  1136 Each kind of machine has a default for what \f(CW\*(C`char\*(C'\fR should
       
  1137 be.  It is either like \f(CW\*(C`unsigned char\*(C'\fR by default or like
       
  1138 \&\f(CW\*(C`signed char\*(C'\fR by default.
       
  1139 .Sp
       
  1140 Ideally, a portable program should always use \f(CW\*(C`signed char\*(C'\fR or
       
  1141 \&\f(CW\*(C`unsigned char\*(C'\fR when it depends on the signedness of an object.
       
  1142 But many programs have been written to use plain \f(CW\*(C`char\*(C'\fR and
       
  1143 expect it to be signed, or expect it to be unsigned, depending on the
       
  1144 machines they were written for.  This option, and its inverse, let you
       
  1145 make such a program work with the opposite default.
       
  1146 .Sp
       
  1147 The type \f(CW\*(C`char\*(C'\fR is always a distinct type from each of
       
  1148 \&\f(CW\*(C`signed char\*(C'\fR or \f(CW\*(C`unsigned char\*(C'\fR, even though its behavior
       
  1149 is always just like one of those two.
       
  1150 .IP "\fB\-fsigned\-char\fR" 4
       
  1151 .IX Item "-fsigned-char"
       
  1152 Let the type \f(CW\*(C`char\*(C'\fR be signed, like \f(CW\*(C`signed char\*(C'\fR.
       
  1153 .Sp
       
  1154 Note that this is equivalent to \fB\-fno\-unsigned\-char\fR, which is
       
  1155 the negative form of \fB\-funsigned\-char\fR.  Likewise, the option
       
  1156 \&\fB\-fno\-signed\-char\fR is equivalent to \fB\-funsigned\-char\fR.
       
  1157 .IP "\fB\-fsigned\-bitfields\fR" 4
       
  1158 .IX Item "-fsigned-bitfields"
       
  1159 .PD 0
       
  1160 .IP "\fB\-funsigned\-bitfields\fR" 4
       
  1161 .IX Item "-funsigned-bitfields"
       
  1162 .IP "\fB\-fno\-signed\-bitfields\fR" 4
       
  1163 .IX Item "-fno-signed-bitfields"
       
  1164 .IP "\fB\-fno\-unsigned\-bitfields\fR" 4
       
  1165 .IX Item "-fno-unsigned-bitfields"
       
  1166 .PD
       
  1167 These options control whether a bit-field is signed or unsigned, when the
       
  1168 declaration does not use either \f(CW\*(C`signed\*(C'\fR or \f(CW\*(C`unsigned\*(C'\fR.  By
       
  1169 default, such a bit-field is signed, because this is consistent: the
       
  1170 basic integer types such as \f(CW\*(C`int\*(C'\fR are signed types.
       
  1171 .IP "\fB\-fwritable\-strings\fR" 4
       
  1172 .IX Item "-fwritable-strings"
       
  1173 Store string constants in the writable data segment and don't uniquize
       
  1174 them.  This is for compatibility with old programs which assume they can
       
  1175 write into string constants.
       
  1176 .Sp
       
  1177 Writing into string constants is a very bad idea; ``constants'' should
       
  1178 be constant.
       
  1179 .Sp
       
  1180 This option is deprecated.
       
  1181 .Sh "Options Controlling \*(C+ Dialect"
       
  1182 .IX Subsection "Options Controlling  Dialect"
       
  1183 This section describes the command-line options that are only meaningful
       
  1184 for \*(C+ programs; but you can also use most of the \s-1GNU\s0 compiler options
       
  1185 regardless of what language your program is in.  For example, you
       
  1186 might compile a file \f(CW\*(C`firstClass.C\*(C'\fR like this:
       
  1187 .PP
       
  1188 .Vb 1
       
  1189 \&        g++ -g -frepo -O -c firstClass.C
       
  1190 .Ve
       
  1191 .PP
       
  1192 In this example, only \fB\-frepo\fR is an option meant
       
  1193 only for \*(C+ programs; you can use the other options with any
       
  1194 language supported by \s-1GCC\s0.
       
  1195 .PP
       
  1196 Here is a list of options that are \fIonly\fR for compiling \*(C+ programs:
       
  1197 .IP "\fB\-fabi\-version=\fR\fIn\fR" 4
       
  1198 .IX Item "-fabi-version=n"
       
  1199 Use version \fIn\fR of the \*(C+ \s-1ABI\s0.  Version 2 is the version of the
       
  1200 \&\*(C+ \s-1ABI\s0 that first appeared in G++ 3.4.  Version 1 is the version of
       
  1201 the \*(C+ \s-1ABI\s0 that first appeared in G++ 3.2.  Version 0 will always be
       
  1202 the version that conforms most closely to the \*(C+ \s-1ABI\s0 specification.
       
  1203 Therefore, the \s-1ABI\s0 obtained using version 0 will change as \s-1ABI\s0 bugs
       
  1204 are fixed.
       
  1205 .Sp
       
  1206 The default is version 2.
       
  1207 .IP "\fB\-fno\-access\-control\fR" 4
       
  1208 .IX Item "-fno-access-control"
       
  1209 Turn off all access checking.  This switch is mainly useful for working
       
  1210 around bugs in the access control code.
       
  1211 .IP "\fB\-fcheck\-new\fR" 4
       
  1212 .IX Item "-fcheck-new"
       
  1213 Check that the pointer returned by \f(CW\*(C`operator new\*(C'\fR is non-null
       
  1214 before attempting to modify the storage allocated.  This check is
       
  1215 normally unnecessary because the \*(C+ standard specifies that
       
  1216 \&\f(CW\*(C`operator new\*(C'\fR will only return \f(CW0\fR if it is declared
       
  1217 \&\fB\f(BIthrow()\fB\fR, in which case the compiler will always check the
       
  1218 return value even without this option.  In all other cases, when
       
  1219 \&\f(CW\*(C`operator new\*(C'\fR has a non-empty exception specification, memory
       
  1220 exhaustion is signalled by throwing \f(CW\*(C`std::bad_alloc\*(C'\fR.  See also
       
  1221 \&\fBnew (nothrow)\fR.
       
  1222 .IP "\fB\-fconserve\-space\fR" 4
       
  1223 .IX Item "-fconserve-space"
       
  1224 Put uninitialized or runtime-initialized global variables into the
       
  1225 common segment, as C does.  This saves space in the executable at the
       
  1226 cost of not diagnosing duplicate definitions.  If you compile with this
       
  1227 flag and your program mysteriously crashes after \f(CW\*(C`main()\*(C'\fR has
       
  1228 completed, you may have an object that is being destroyed twice because
       
  1229 two definitions were merged.
       
  1230 .Sp
       
  1231 This option is no longer useful on most targets, now that support has
       
  1232 been added for putting variables into \s-1BSS\s0 without making them common.
       
  1233 .IP "\fB\-fno\-const\-strings\fR" 4
       
  1234 .IX Item "-fno-const-strings"
       
  1235 Give string constants type \f(CW\*(C`char *\*(C'\fR instead of type \f(CW\*(C`const
       
  1236 char *\*(C'\fR.  By default, G++ uses type \f(CW\*(C`const char *\*(C'\fR as required by
       
  1237 the standard.  Even if you use \fB\-fno\-const\-strings\fR, you cannot
       
  1238 actually modify the value of a string constant, unless you also use
       
  1239 \&\fB\-fwritable\-strings\fR.
       
  1240 .Sp
       
  1241 This option might be removed in a future release of G++.  For maximum
       
  1242 portability, you should structure your code so that it works with
       
  1243 string constants that have type \f(CW\*(C`const char *\*(C'\fR.
       
  1244 .IP "\fB\-fno\-elide\-constructors\fR" 4
       
  1245 .IX Item "-fno-elide-constructors"
       
  1246 The \*(C+ standard allows an implementation to omit creating a temporary
       
  1247 which is only used to initialize another object of the same type.
       
  1248 Specifying this option disables that optimization, and forces G++ to
       
  1249 call the copy constructor in all cases.
       
  1250 .IP "\fB\-fno\-enforce\-eh\-specs\fR" 4
       
  1251 .IX Item "-fno-enforce-eh-specs"
       
  1252 Don't check for violation of exception specifications at runtime.  This
       
  1253 option violates the \*(C+ standard, but may be useful for reducing code
       
  1254 size in production builds, much like defining \fB\s-1NDEBUG\s0\fR.  The compiler
       
  1255 will still optimize based on the exception specifications.
       
  1256 .IP "\fB\-ffor\-scope\fR" 4
       
  1257 .IX Item "-ffor-scope"
       
  1258 .PD 0
       
  1259 .IP "\fB\-fno\-for\-scope\fR" 4
       
  1260 .IX Item "-fno-for-scope"
       
  1261 .PD
       
  1262 If \fB\-ffor\-scope\fR is specified, the scope of variables declared in
       
  1263 a \fIfor-init-statement\fR is limited to the \fBfor\fR loop itself,
       
  1264 as specified by the \*(C+ standard.
       
  1265 If \fB\-fno\-for\-scope\fR is specified, the scope of variables declared in
       
  1266 a \fIfor-init-statement\fR extends to the end of the enclosing scope,
       
  1267 as was the case in old versions of G++, and other (traditional)
       
  1268 implementations of \*(C+.
       
  1269 .Sp
       
  1270 The default if neither flag is given to follow the standard,
       
  1271 but to allow and give a warning for old-style code that would
       
  1272 otherwise be invalid, or have different behavior.
       
  1273 .IP "\fB\-fno\-gnu\-keywords\fR" 4
       
  1274 .IX Item "-fno-gnu-keywords"
       
  1275 Do not recognize \f(CW\*(C`typeof\*(C'\fR as a keyword, so that code can use this
       
  1276 word as an identifier.  You can use the keyword \f(CW\*(C`_\|_typeof_\|_\*(C'\fR instead.
       
  1277 \&\fB\-ansi\fR implies \fB\-fno\-gnu\-keywords\fR.
       
  1278 .IP "\fB\-fno\-implicit\-templates\fR" 4
       
  1279 .IX Item "-fno-implicit-templates"
       
  1280 Never emit code for non-inline templates which are instantiated
       
  1281 implicitly (i.e. by use); only emit code for explicit instantiations.
       
  1282 .IP "\fB\-fno\-implicit\-inline\-templates\fR" 4
       
  1283 .IX Item "-fno-implicit-inline-templates"
       
  1284 Don't emit code for implicit instantiations of inline templates, either.
       
  1285 The default is to handle inlines differently so that compiles with and
       
  1286 without optimization will need the same set of explicit instantiations.
       
  1287 .IP "\fB\-fno\-implement\-inlines\fR" 4
       
  1288 .IX Item "-fno-implement-inlines"
       
  1289 To save space, do not emit out-of-line copies of inline functions
       
  1290 controlled by \fB#pragma implementation\fR.  This will cause linker
       
  1291 errors if these functions are not inlined everywhere they are called.
       
  1292 .IP "\fB\-fms\-extensions\fR" 4
       
  1293 .IX Item "-fms-extensions"
       
  1294 Disable pedantic warnings about constructs used in \s-1MFC\s0, such as implicit
       
  1295 int and getting a pointer to member function via non-standard syntax.
       
  1296 .IP "\fB\-fno\-nonansi\-builtins\fR" 4
       
  1297 .IX Item "-fno-nonansi-builtins"
       
  1298 Disable built-in declarations of functions that are not mandated by
       
  1299 \&\s-1ANSI/ISO\s0 C.  These include \f(CW\*(C`ffs\*(C'\fR, \f(CW\*(C`alloca\*(C'\fR, \f(CW\*(C`_exit\*(C'\fR,
       
  1300 \&\f(CW\*(C`index\*(C'\fR, \f(CW\*(C`bzero\*(C'\fR, \f(CW\*(C`conjf\*(C'\fR, and other related functions.
       
  1301 .IP "\fB\-fno\-operator\-names\fR" 4
       
  1302 .IX Item "-fno-operator-names"
       
  1303 Do not treat the operator name keywords \f(CW\*(C`and\*(C'\fR, \f(CW\*(C`bitand\*(C'\fR,
       
  1304 \&\f(CW\*(C`bitor\*(C'\fR, \f(CW\*(C`compl\*(C'\fR, \f(CW\*(C`not\*(C'\fR, \f(CW\*(C`or\*(C'\fR and \f(CW\*(C`xor\*(C'\fR as
       
  1305 synonyms as keywords.
       
  1306 .IP "\fB\-fno\-optional\-diags\fR" 4
       
  1307 .IX Item "-fno-optional-diags"
       
  1308 Disable diagnostics that the standard says a compiler does not need to
       
  1309 issue.  Currently, the only such diagnostic issued by G++ is the one for
       
  1310 a name having multiple meanings within a class.
       
  1311 .IP "\fB\-fpermissive\fR" 4
       
  1312 .IX Item "-fpermissive"
       
  1313 Downgrade some diagnostics about nonconformant code from errors to
       
  1314 warnings.  Thus, using \fB\-fpermissive\fR will allow some
       
  1315 nonconforming code to compile.
       
  1316 .IP "\fB\-frepo\fR" 4
       
  1317 .IX Item "-frepo"
       
  1318 Enable automatic template instantiation at link time.  This option also
       
  1319 implies \fB\-fno\-implicit\-templates\fR.  
       
  1320 .IP "\fB\-fno\-rtti\fR" 4
       
  1321 .IX Item "-fno-rtti"
       
  1322 Disable generation of information about every class with virtual
       
  1323 functions for use by the \*(C+ runtime type identification features
       
  1324 (\fBdynamic_cast\fR and \fBtypeid\fR).  If you don't use those parts
       
  1325 of the language, you can save some space by using this flag.  Note that
       
  1326 exception handling uses the same information, but it will generate it as
       
  1327 needed.
       
  1328 .IP "\fB\-fstats\fR" 4
       
  1329 .IX Item "-fstats"
       
  1330 Emit statistics about front-end processing at the end of the compilation.
       
  1331 This information is generally only useful to the G++ development team.
       
  1332 .IP "\fB\-ftemplate\-depth\-\fR\fIn\fR" 4
       
  1333 .IX Item "-ftemplate-depth-n"
       
  1334 Set the maximum instantiation depth for template classes to \fIn\fR.
       
  1335 A limit on the template instantiation depth is needed to detect
       
  1336 endless recursions during template class instantiation.  \s-1ANSI/ISO\s0 \*(C+
       
  1337 conforming programs must not rely on a maximum depth greater than 17.
       
  1338 .IP "\fB\-fuse\-cxa\-atexit\fR" 4
       
  1339 .IX Item "-fuse-cxa-atexit"
       
  1340 Register destructors for objects with static storage duration with the
       
  1341 \&\f(CW\*(C`_\|_cxa_atexit\*(C'\fR function rather than the \f(CW\*(C`atexit\*(C'\fR function.
       
  1342 This option is required for fully standards-compliant handling of static
       
  1343 destructors, but will only work if your C library supports
       
  1344 \&\f(CW\*(C`_\|_cxa_atexit\*(C'\fR.
       
  1345 .IP "\fB\-fno\-weak\fR" 4
       
  1346 .IX Item "-fno-weak"
       
  1347 Do not use weak symbol support, even if it is provided by the linker.
       
  1348 By default, G++ will use weak symbols if they are available.  This
       
  1349 option exists only for testing, and should not be used by end\-users;
       
  1350 it will result in inferior code and has no benefits.  This option may
       
  1351 be removed in a future release of G++.
       
  1352 .IP "\fB\-nostdinc++\fR" 4
       
  1353 .IX Item "-nostdinc++"
       
  1354 Do not search for header files in the standard directories specific to
       
  1355 \&\*(C+, but do still search the other standard directories.  (This option
       
  1356 is used when building the \*(C+ library.)
       
  1357 .PP
       
  1358 In addition, these optimization, warning, and code generation options
       
  1359 have meanings only for \*(C+ programs:
       
  1360 .IP "\fB\-fno\-default\-inline\fR" 4
       
  1361 .IX Item "-fno-default-inline"
       
  1362 Do not assume \fBinline\fR for functions defined inside a class scope.
       
  1363   Note that these
       
  1364 functions will have linkage like inline functions; they just won't be
       
  1365 inlined by default.
       
  1366 .IP "\fB\-Wabi\fR (\*(C+ only)" 4
       
  1367 .IX Item "-Wabi ( only)"
       
  1368 Warn when G++ generates code that is probably not compatible with the
       
  1369 vendor-neutral \*(C+ \s-1ABI\s0.  Although an effort has been made to warn about
       
  1370 all such cases, there are probably some cases that are not warned about,
       
  1371 even though G++ is generating incompatible code.  There may also be
       
  1372 cases where warnings are emitted even though the code that is generated
       
  1373 will be compatible.
       
  1374 .Sp
       
  1375 You should rewrite your code to avoid these warnings if you are
       
  1376 concerned about the fact that code generated by G++ may not be binary
       
  1377 compatible with code generated by other compilers.
       
  1378 .Sp
       
  1379 The known incompatibilities at this point include:
       
  1380 .RS 4
       
  1381 .IP "\(bu" 4
       
  1382 Incorrect handling of tail-padding for bit\-fields.  G++ may attempt to
       
  1383 pack data into the same byte as a base class.  For example:
       
  1384 .Sp
       
  1385 .Vb 2
       
  1386 \&        struct A { virtual void f(); int f1 : 1; };
       
  1387 \&        struct B : public A { int f2 : 1; };
       
  1388 .Ve
       
  1389 .Sp
       
  1390 In this case, G++ will place \f(CW\*(C`B::f2\*(C'\fR into the same byte
       
  1391 as\f(CW\*(C`A::f1\*(C'\fR; other compilers will not.  You can avoid this problem
       
  1392 by explicitly padding \f(CW\*(C`A\*(C'\fR so that its size is a multiple of the
       
  1393 byte size on your platform; that will cause G++ and other compilers to
       
  1394 layout \f(CW\*(C`B\*(C'\fR identically.
       
  1395 .IP "\(bu" 4
       
  1396 Incorrect handling of tail-padding for virtual bases.  G++ does not use
       
  1397 tail padding when laying out virtual bases.  For example:
       
  1398 .Sp
       
  1399 .Vb 3
       
  1400 \&        struct A { virtual void f(); char c1; };
       
  1401 \&        struct B { B(); char c2; };
       
  1402 \&        struct C : public A, public virtual B {};
       
  1403 .Ve
       
  1404 .Sp
       
  1405 In this case, G++ will not place \f(CW\*(C`B\*(C'\fR into the tail-padding for
       
  1406 \&\f(CW\*(C`A\*(C'\fR; other compilers will.  You can avoid this problem by
       
  1407 explicitly padding \f(CW\*(C`A\*(C'\fR so that its size is a multiple of its
       
  1408 alignment (ignoring virtual base classes); that will cause G++ and other
       
  1409 compilers to layout \f(CW\*(C`C\*(C'\fR identically.
       
  1410 .IP "\(bu" 4
       
  1411 Incorrect handling of bit-fields with declared widths greater than that
       
  1412 of their underlying types, when the bit-fields appear in a union.  For
       
  1413 example:
       
  1414 .Sp
       
  1415 .Vb 1
       
  1416 \&        union U { int i : 4096; };
       
  1417 .Ve
       
  1418 .Sp
       
  1419 Assuming that an \f(CW\*(C`int\*(C'\fR does not have 4096 bits, G++ will make the
       
  1420 union too small by the number of bits in an \f(CW\*(C`int\*(C'\fR.
       
  1421 .IP "\(bu" 4
       
  1422 Empty classes can be placed at incorrect offsets.  For example:
       
  1423 .Sp
       
  1424 .Vb 1
       
  1425 \&        struct A {};
       
  1426 .Ve
       
  1427 .Sp
       
  1428 .Vb 4
       
  1429 \&        struct B {
       
  1430 \&          A a;
       
  1431 \&          virtual void f ();
       
  1432 \&        };
       
  1433 .Ve
       
  1434 .Sp
       
  1435 .Vb 1
       
  1436 \&        struct C : public B, public A {};
       
  1437 .Ve
       
  1438 .Sp
       
  1439 G++ will place the \f(CW\*(C`A\*(C'\fR base class of \f(CW\*(C`C\*(C'\fR at a nonzero offset;
       
  1440 it should be placed at offset zero.  G++ mistakenly believes that the
       
  1441 \&\f(CW\*(C`A\*(C'\fR data member of \f(CW\*(C`B\*(C'\fR is already at offset zero.
       
  1442 .IP "\(bu" 4
       
  1443 Names of template functions whose types involve \f(CW\*(C`typename\*(C'\fR or
       
  1444 template template parameters can be mangled incorrectly.
       
  1445 .Sp
       
  1446 .Vb 2
       
  1447 \&        template <typename Q>
       
  1448 \&        void f(typename Q::X) {}
       
  1449 .Ve
       
  1450 .Sp
       
  1451 .Vb 2
       
  1452 \&        template <template <typename> class Q>
       
  1453 \&        void f(typename Q<int>::X) {}
       
  1454 .Ve
       
  1455 .Sp
       
  1456 Instantiations of these templates may be mangled incorrectly.
       
  1457 .RE
       
  1458 .RS 4
       
  1459 .RE
       
  1460 .IP "\fB\-Wctor\-dtor\-privacy\fR (\*(C+ only)" 4
       
  1461 .IX Item "-Wctor-dtor-privacy ( only)"
       
  1462 Warn when a class seems unusable because all the constructors or
       
  1463 destructors in that class are private, and it has neither friends nor
       
  1464 public static member functions.
       
  1465 .IP "\fB\-Wnon\-virtual\-dtor\fR (\*(C+ only)" 4
       
  1466 .IX Item "-Wnon-virtual-dtor ( only)"
       
  1467 Warn when a class appears to be polymorphic, thereby requiring a virtual
       
  1468 destructor, yet it declares a non-virtual one.
       
  1469 This warning is enabled by \fB\-Wall\fR.
       
  1470 .IP "\fB\-Wreorder\fR (\*(C+ only)" 4
       
  1471 .IX Item "-Wreorder ( only)"
       
  1472 Warn when the order of member initializers given in the code does not
       
  1473 match the order in which they must be executed.  For instance:
       
  1474 .Sp
       
  1475 .Vb 5
       
  1476 \&        struct A {
       
  1477 \&          int i;
       
  1478 \&          int j;
       
  1479 \&          A(): j (0), i (1) { }
       
  1480 \&        };
       
  1481 .Ve
       
  1482 .Sp
       
  1483 The compiler will rearrange the member initializers for \fBi\fR
       
  1484 and \fBj\fR to match the declaration order of the members, emitting
       
  1485 a warning to that effect.  This warning is enabled by \fB\-Wall\fR.
       
  1486 .PP
       
  1487 The following \fB\-W...\fR options are not affected by \fB\-Wall\fR.
       
  1488 .IP "\fB\-Weffc++\fR (\*(C+ only)" 4
       
  1489 .IX Item "-Weffc++ ( only)"
       
  1490 Warn about violations of the following style guidelines from Scott Meyers'
       
  1491 \&\fIEffective \*(C+\fR book:
       
  1492 .RS 4
       
  1493 .IP "\(bu" 4
       
  1494 Item 11:  Define a copy constructor and an assignment operator for classes
       
  1495 with dynamically allocated memory.
       
  1496 .IP "\(bu" 4
       
  1497 Item 12:  Prefer initialization to assignment in constructors.
       
  1498 .IP "\(bu" 4
       
  1499 Item 14:  Make destructors virtual in base classes.
       
  1500 .IP "\(bu" 4
       
  1501 Item 15:  Have \f(CW\*(C`operator=\*(C'\fR return a reference to \f(CW*this\fR.
       
  1502 .IP "\(bu" 4
       
  1503 Item 23:  Don't try to return a reference when you must return an object.
       
  1504 .RE
       
  1505 .RS 4
       
  1506 .Sp
       
  1507 Also warn about violations of the following style guidelines from
       
  1508 Scott Meyers' \fIMore Effective \*(C+\fR book:
       
  1509 .IP "\(bu" 4
       
  1510 Item 6:  Distinguish between prefix and postfix forms of increment and
       
  1511 decrement operators.
       
  1512 .IP "\(bu" 4
       
  1513 Item 7:  Never overload \f(CW\*(C`&&\*(C'\fR, \f(CW\*(C`||\*(C'\fR, or \f(CW\*(C`,\*(C'\fR.
       
  1514 .RE
       
  1515 .RS 4
       
  1516 .Sp
       
  1517 When selecting this option, be aware that the standard library
       
  1518 headers do not obey all of these guidelines; use \fBgrep \-v\fR
       
  1519 to filter out those warnings.
       
  1520 .RE
       
  1521 .IP "\fB\-Wno\-deprecated\fR (\*(C+ only)" 4
       
  1522 .IX Item "-Wno-deprecated ( only)"
       
  1523 Do not warn about usage of deprecated features.  
       
  1524 .IP "\fB\-Wno\-non\-template\-friend\fR (\*(C+ only)" 4
       
  1525 .IX Item "-Wno-non-template-friend ( only)"
       
  1526 Disable warnings when non-templatized friend functions are declared
       
  1527 within a template.  Since the advent of explicit template specification
       
  1528 support in G++, if the name of the friend is an unqualified-id (i.e.,
       
  1529 \&\fBfriend foo(int)\fR), the \*(C+ language specification demands that the
       
  1530 friend declare or define an ordinary, nontemplate function.  (Section
       
  1531 14.5.3).  Before G++ implemented explicit specification, unqualified-ids
       
  1532 could be interpreted as a particular specialization of a templatized
       
  1533 function.  Because this non-conforming behavior is no longer the default
       
  1534 behavior for G++, \fB\-Wnon\-template\-friend\fR allows the compiler to
       
  1535 check existing code for potential trouble spots and is on by default.
       
  1536 This new compiler behavior can be turned off with
       
  1537 \&\fB\-Wno\-non\-template\-friend\fR which keeps the conformant compiler code
       
  1538 but disables the helpful warning.
       
  1539 .IP "\fB\-Wold\-style\-cast\fR (\*(C+ only)" 4
       
  1540 .IX Item "-Wold-style-cast ( only)"
       
  1541 Warn if an old-style (C\-style) cast to a non-void type is used within
       
  1542 a \*(C+ program.  The new-style casts (\fBstatic_cast\fR,
       
  1543 \&\fBreinterpret_cast\fR, and \fBconst_cast\fR) are less vulnerable to
       
  1544 unintended effects and much easier to search for.
       
  1545 .IP "\fB\-Woverloaded\-virtual\fR (\*(C+ only)" 4
       
  1546 .IX Item "-Woverloaded-virtual ( only)"
       
  1547 Warn when a function declaration hides virtual functions from a
       
  1548 base class.  For example, in:
       
  1549 .Sp
       
  1550 .Vb 3
       
  1551 \&        struct A {
       
  1552 \&          virtual void f();
       
  1553 \&        };
       
  1554 .Ve
       
  1555 .Sp
       
  1556 .Vb 3
       
  1557 \&        struct B: public A {
       
  1558 \&          void f(int);
       
  1559 \&        };
       
  1560 .Ve
       
  1561 .Sp
       
  1562 the \f(CW\*(C`A\*(C'\fR class version of \f(CW\*(C`f\*(C'\fR is hidden in \f(CW\*(C`B\*(C'\fR, and code
       
  1563 like:
       
  1564 .Sp
       
  1565 .Vb 2
       
  1566 \&        B* b;
       
  1567 \&        b->f();
       
  1568 .Ve
       
  1569 .Sp
       
  1570 will fail to compile.
       
  1571 .IP "\fB\-Wno\-pmf\-conversions\fR (\*(C+ only)" 4
       
  1572 .IX Item "-Wno-pmf-conversions ( only)"
       
  1573 Disable the diagnostic for converting a bound pointer to member function
       
  1574 to a plain pointer.
       
  1575 .IP "\fB\-Wsign\-promo\fR (\*(C+ only)" 4
       
  1576 .IX Item "-Wsign-promo ( only)"
       
  1577 Warn when overload resolution chooses a promotion from unsigned or
       
  1578 enumerated type to a signed type, over a conversion to an unsigned type of
       
  1579 the same size.  Previous versions of G++ would try to preserve
       
  1580 unsignedness, but the standard mandates the current behavior.
       
  1581 .IP "\fB\-Wsynth\fR (\*(C+ only)" 4
       
  1582 .IX Item "-Wsynth ( only)"
       
  1583 Warn when G++'s synthesis behavior does not match that of cfront.  For
       
  1584 instance:
       
  1585 .Sp
       
  1586 .Vb 4
       
  1587 \&        struct A {
       
  1588 \&          operator int ();
       
  1589 \&          A& operator = (int);
       
  1590 \&        };
       
  1591 .Ve
       
  1592 .Sp
       
  1593 .Vb 5
       
  1594 \&        main ()
       
  1595 \&        {
       
  1596 \&          A a,b;
       
  1597 \&          a = b;
       
  1598 \&        }
       
  1599 .Ve
       
  1600 .Sp
       
  1601 In this example, G++ will synthesize a default \fBA& operator =
       
  1602 (const A&);\fR, while cfront will use the user-defined \fBoperator =\fR.
       
  1603 .Sh "Options Controlling Objective-C Dialect"
       
  1604 .IX Subsection "Options Controlling Objective-C Dialect"
       
  1605 (\s-1NOTE:\s0 This manual does not describe the Objective-C language itself.  See
       
  1606 <\fBhttp://gcc.gnu.org/readings.html\fR> for references.)
       
  1607 .PP
       
  1608 This section describes the command-line options that are only meaningful
       
  1609 for Objective-C programs, but you can also use most of the \s-1GNU\s0 compiler
       
  1610 options regardless of what language your program is in.  For example,
       
  1611 you might compile a file \f(CW\*(C`some_class.m\*(C'\fR like this:
       
  1612 .PP
       
  1613 .Vb 1
       
  1614 \&        gcc -g -fgnu-runtime -O -c some_class.m
       
  1615 .Ve
       
  1616 .PP
       
  1617 In this example, \fB\-fgnu\-runtime\fR is an option meant only for
       
  1618 Objective-C programs; you can use the other options with any language
       
  1619 supported by \s-1GCC\s0.
       
  1620 .PP
       
  1621 Here is a list of options that are \fIonly\fR for compiling Objective-C
       
  1622 programs:
       
  1623 .IP "\fB\-fconstant\-string\-class=\fR\fIclass-name\fR" 4
       
  1624 .IX Item "-fconstant-string-class=class-name"
       
  1625 Use \fIclass-name\fR as the name of the class to instantiate for each
       
  1626 literal string specified with the syntax \f(CW\*(C`@"..."\*(C'\fR.  The default
       
  1627 class name is \f(CW\*(C`NXConstantString\*(C'\fR if the \s-1GNU\s0 runtime is being used, and
       
  1628 \&\f(CW\*(C`NSConstantString\*(C'\fR if the NeXT runtime is being used (see below).  The
       
  1629 \&\fB\-fconstant\-cfstrings\fR option, if also present, will override the
       
  1630 \&\fB\-fconstant\-string\-class\fR setting and cause \f(CW\*(C`@"..."\*(C'\fR literals
       
  1631 to be laid out as constant CoreFoundation strings.
       
  1632 .IP "\fB\-fgnu\-runtime\fR" 4
       
  1633 .IX Item "-fgnu-runtime"
       
  1634 Generate object code compatible with the standard \s-1GNU\s0 Objective-C
       
  1635 runtime.  This is the default for most types of systems.
       
  1636 .IP "\fB\-fnext\-runtime\fR" 4
       
  1637 .IX Item "-fnext-runtime"
       
  1638 Generate output compatible with the NeXT runtime.  This is the default
       
  1639 for NeXT-based systems, including Darwin and Mac \s-1OS\s0 X.  The macro
       
  1640 \&\f(CW\*(C`_\|_NEXT_RUNTIME_\|_\*(C'\fR is predefined if (and only if) this option is
       
  1641 used.
       
  1642 .IP "\fB\-fno\-nil\-receivers\fR" 4
       
  1643 .IX Item "-fno-nil-receivers"
       
  1644 Assume that all Objective-C message dispatches (e.g.,
       
  1645 \&\f(CW\*(C`[receiver message:arg]\*(C'\fR) in this translation unit ensure that the receiver
       
  1646 is not \f(CW\*(C`nil\*(C'\fR.  This allows for more efficient entry points in the runtime to be
       
  1647 used.  Currently, this option is only available in conjunction with
       
  1648 the NeXT runtime on Mac \s-1OS\s0 X 10.3 and later.
       
  1649 .IP "\fB\-fobjc\-exceptions\fR" 4
       
  1650 .IX Item "-fobjc-exceptions"
       
  1651 Enable syntactic support for structured exception handling in Objective\-C,
       
  1652 similar to what is offered by \*(C+ and Java.  Currently, this option is only
       
  1653 available in conjunction with the NeXT runtime on Mac \s-1OS\s0 X 10.3 and later.
       
  1654 .Sp
       
  1655 .Vb 23
       
  1656 \&          @try {
       
  1657 \&            ...
       
  1658 \&               @throw expr;
       
  1659 \&            ...
       
  1660 \&          }
       
  1661 \&          @catch (AnObjCClass *exc) {
       
  1662 \&            ...
       
  1663 \&              @throw expr;
       
  1664 \&            ...
       
  1665 \&              @throw;
       
  1666 \&            ...
       
  1667 \&          }
       
  1668 \&          @catch (AnotherClass *exc) {
       
  1669 \&            ...
       
  1670 \&          }
       
  1671 \&          @catch (id allOthers) {
       
  1672 \&            ...
       
  1673 \&          }
       
  1674 \&          @finally {
       
  1675 \&            ...
       
  1676 \&              @throw expr;
       
  1677 \&            ...
       
  1678 \&          }
       
  1679 .Ve
       
  1680 .Sp
       
  1681 The \f(CW@throw\fR statement may appear anywhere in an Objective-C or
       
  1682 Objective\-\*(C+ program; when used inside of a \f(CW@catch\fR block, the
       
  1683 \&\f(CW@throw\fR may appear without an argument (as shown above), in which case
       
  1684 the object caught by the \f(CW@catch\fR will be rethrown.
       
  1685 .Sp
       
  1686 Note that only (pointers to) Objective-C objects may be thrown and
       
  1687 caught using this scheme.  When an object is thrown, it will be caught
       
  1688 by the nearest \f(CW@catch\fR clause capable of handling objects of that type,
       
  1689 analogously to how \f(CW\*(C`catch\*(C'\fR blocks work in \*(C+ and Java.  A
       
  1690 \&\f(CW\*(C`@catch(id ...)\*(C'\fR clause (as shown above) may also be provided to catch
       
  1691 any and all Objective-C exceptions not caught by previous \f(CW@catch\fR
       
  1692 clauses (if any).
       
  1693 .Sp
       
  1694 The \f(CW@finally\fR clause, if present, will be executed upon exit from the
       
  1695 immediately preceding \f(CW\*(C`@try ... @catch\*(C'\fR section.  This will happen
       
  1696 regardless of whether any exceptions are thrown, caught or rethrown
       
  1697 inside the \f(CW\*(C`@try ... @catch\*(C'\fR section, analogously to the behavior
       
  1698 of the \f(CW\*(C`finally\*(C'\fR clause in Java.
       
  1699 .Sp
       
  1700 There are several caveats to using the new exception mechanism:
       
  1701 .RS 4
       
  1702 .IP "\(bu" 4
       
  1703 Although currently designed to be binary compatible with \f(CW\*(C`NS_HANDLER\*(C'\fR\-style
       
  1704 idioms provided by the \f(CW\*(C`NSException\*(C'\fR class, the new
       
  1705 exceptions can only be used on Mac \s-1OS\s0 X 10.3 (Panther) and later
       
  1706 systems, due to additional functionality needed in the (NeXT) Objective-C
       
  1707 runtime.
       
  1708 .IP "\(bu" 4
       
  1709 As mentioned above, the new exceptions do not support handling
       
  1710 types other than Objective-C objects.   Furthermore, when used from
       
  1711 Objective\-\*(C+, the Objective-C exception model does not interoperate with \*(C+
       
  1712 exceptions at this time.  This means you cannot \f(CW@throw\fR an exception
       
  1713 from Objective-C and \f(CW\*(C`catch\*(C'\fR it in \*(C+, or vice versa
       
  1714 (i.e., \f(CW\*(C`throw ... @catch\*(C'\fR).
       
  1715 .RE
       
  1716 .RS 4
       
  1717 .Sp
       
  1718 The \fB\-fobjc\-exceptions\fR switch also enables the use of synchronization
       
  1719 blocks for thread-safe execution:
       
  1720 .Sp
       
  1721 .Vb 3
       
  1722 \&          @synchronized (ObjCClass *guard) {
       
  1723 \&            ...
       
  1724 \&          }
       
  1725 .Ve
       
  1726 .Sp
       
  1727 Upon entering the \f(CW@synchronized\fR block, a thread of execution shall
       
  1728 first check whether a lock has been placed on the corresponding \f(CW\*(C`guard\*(C'\fR
       
  1729 object by another thread.  If it has, the current thread shall wait until
       
  1730 the other thread relinquishes its lock.  Once \f(CW\*(C`guard\*(C'\fR becomes available,
       
  1731 the current thread will place its own lock on it, execute the code contained in
       
  1732 the \f(CW@synchronized\fR block, and finally relinquish the lock (thereby
       
  1733 making \f(CW\*(C`guard\*(C'\fR available to other threads).
       
  1734 .Sp
       
  1735 Unlike Java, Objective-C does not allow for entire methods to be marked
       
  1736 \&\f(CW@synchronized\fR.  Note that throwing exceptions out of
       
  1737 \&\f(CW@synchronized\fR blocks is allowed, and will cause the guarding object
       
  1738 to be unlocked properly.
       
  1739 .RE
       
  1740 .IP "\fB\-freplace\-objc\-classes\fR" 4
       
  1741 .IX Item "-freplace-objc-classes"
       
  1742 Emit a special marker instructing \fB\f(BIld\fB\|(1)\fR not to statically link in
       
  1743 the resulting object file, and allow \fB\f(BIdyld\fB\|(1)\fR to load it in at
       
  1744 run time instead.  This is used in conjunction with the Fix-and-Continue
       
  1745 debugging mode, where the object file in question may be recompiled and
       
  1746 dynamically reloaded in the course of program execution, without the need
       
  1747 to restart the program itself.  Currently, Fix-and-Continue functionality
       
  1748 is only available in conjunction with the NeXT runtime on Mac \s-1OS\s0 X 10.3
       
  1749 and later.
       
  1750 .IP "\fB\-fzero\-link\fR" 4
       
  1751 .IX Item "-fzero-link"
       
  1752 When compiling for the NeXT runtime, the compiler ordinarily replaces calls
       
  1753 to \f(CW\*(C`objc_getClass("...")\*(C'\fR (when the name of the class is known at
       
  1754 compile time) with static class references that get initialized at load time,
       
  1755 which improves run-time performance.  Specifying the \fB\-fzero\-link\fR flag
       
  1756 suppresses this behavior and causes calls to \f(CW\*(C`objc_getClass("...")\*(C'\fR
       
  1757 to be retained.  This is useful in Zero-Link debugging mode, since it allows
       
  1758 for individual class implementations to be modified during program execution.
       
  1759 .IP "\fB\-gen\-decls\fR" 4
       
  1760 .IX Item "-gen-decls"
       
  1761 Dump interface declarations for all classes seen in the source file to a
       
  1762 file named \fI\fIsourcename\fI.decl\fR.
       
  1763 .IP "\fB\-Wno\-protocol\fR" 4
       
  1764 .IX Item "-Wno-protocol"
       
  1765 If a class is declared to implement a protocol, a warning is issued for
       
  1766 every method in the protocol that is not implemented by the class.  The
       
  1767 default behavior is to issue a warning for every method not explicitly
       
  1768 implemented in the class, even if a method implementation is inherited
       
  1769 from the superclass.  If you use the \f(CW\*(C`\-Wno\-protocol\*(C'\fR option, then
       
  1770 methods inherited from the superclass are considered to be implemented,
       
  1771 and no warning is issued for them.
       
  1772 .IP "\fB\-Wselector\fR" 4
       
  1773 .IX Item "-Wselector"
       
  1774 Warn if multiple methods of different types for the same selector are
       
  1775 found during compilation.  The check is performed on the list of methods
       
  1776 in the final stage of compilation.  Additionally, a check is performed
       
  1777 for each selector appearing in a \f(CW\*(C`@selector(...)\*(C'\fR
       
  1778 expression, and a corresponding method for that selector has been found
       
  1779 during compilation.  Because these checks scan the method table only at
       
  1780 the end of compilation, these warnings are not produced if the final
       
  1781 stage of compilation is not reached, for example because an error is
       
  1782 found during compilation, or because the \f(CW\*(C`\-fsyntax\-only\*(C'\fR option is
       
  1783 being used.
       
  1784 .IP "\fB\-Wundeclared\-selector\fR" 4
       
  1785 .IX Item "-Wundeclared-selector"
       
  1786 Warn if a \f(CW\*(C`@selector(...)\*(C'\fR expression referring to an
       
  1787 undeclared selector is found.  A selector is considered undeclared if no
       
  1788 method with that name has been declared before the
       
  1789 \&\f(CW\*(C`@selector(...)\*(C'\fR expression, either explicitly in an
       
  1790 \&\f(CW@interface\fR or \f(CW@protocol\fR declaration, or implicitly in
       
  1791 an \f(CW@implementation\fR section.  This option always performs its
       
  1792 checks as soon as a \f(CW\*(C`@selector(...)\*(C'\fR expression is found,
       
  1793 while \f(CW\*(C`\-Wselector\*(C'\fR only performs its checks in the final stage of
       
  1794 compilation.  This also enforces the coding style convention
       
  1795 that methods and selectors must be declared before being used.
       
  1796 .IP "\fB\-print\-objc\-runtime\-info\fR" 4
       
  1797 .IX Item "-print-objc-runtime-info"
       
  1798 Generate C header describing the largest structure that is passed by
       
  1799 value, if any.
       
  1800 .Sh "Options to Control Diagnostic Messages Formatting"
       
  1801 .IX Subsection "Options to Control Diagnostic Messages Formatting"
       
  1802 Traditionally, diagnostic messages have been formatted irrespective of
       
  1803 the output device's aspect (e.g. its width, ...).  The options described
       
  1804 below can be used to control the diagnostic messages formatting
       
  1805 algorithm, e.g. how many characters per line, how often source location
       
  1806 information should be reported.  Right now, only the \*(C+ front end can
       
  1807 honor these options.  However it is expected, in the near future, that
       
  1808 the remaining front ends would be able to digest them correctly.
       
  1809 .IP "\fB\-fmessage\-length=\fR\fIn\fR" 4
       
  1810 .IX Item "-fmessage-length=n"
       
  1811 Try to format error messages so that they fit on lines of about \fIn\fR
       
  1812 characters.  The default is 72 characters for \fBg++\fR and 0 for the rest of
       
  1813 the front ends supported by \s-1GCC\s0.  If \fIn\fR is zero, then no
       
  1814 line-wrapping will be done; each error message will appear on a single
       
  1815 line.
       
  1816 .IP "\fB\-fdiagnostics\-show\-location=once\fR" 4
       
  1817 .IX Item "-fdiagnostics-show-location=once"
       
  1818 Only meaningful in line-wrapping mode.  Instructs the diagnostic messages
       
  1819 reporter to emit \fIonce\fR source location information; that is, in
       
  1820 case the message is too long to fit on a single physical line and has to
       
  1821 be wrapped, the source location won't be emitted (as prefix) again,
       
  1822 over and over, in subsequent continuation lines.  This is the default
       
  1823 behavior.
       
  1824 .IP "\fB\-fdiagnostics\-show\-location=every\-line\fR" 4
       
  1825 .IX Item "-fdiagnostics-show-location=every-line"
       
  1826 Only meaningful in line-wrapping mode.  Instructs the diagnostic
       
  1827 messages reporter to emit the same source location information (as
       
  1828 prefix) for physical lines that result from the process of breaking
       
  1829 a message which is too long to fit on a single line.
       
  1830 .Sh "Options to Request or Suppress Warnings"
       
  1831 .IX Subsection "Options to Request or Suppress Warnings"
       
  1832 Warnings are diagnostic messages that report constructions which
       
  1833 are not inherently erroneous but which are risky or suggest there
       
  1834 may have been an error.
       
  1835 .PP
       
  1836 You can request many specific warnings with options beginning \fB\-W\fR,
       
  1837 for example \fB\-Wimplicit\fR to request warnings on implicit
       
  1838 declarations.  Each of these specific warning options also has a
       
  1839 negative form beginning \fB\-Wno\-\fR to turn off warnings;
       
  1840 for example, \fB\-Wno\-implicit\fR.  This manual lists only one of the
       
  1841 two forms, whichever is not the default.
       
  1842 .PP
       
  1843 The following options control the amount and kinds of warnings produced
       
  1844 by \s-1GCC\s0; for further, language-specific options also refer to
       
  1845 \&\fB\*(C+ Dialect Options\fR and \fBObjective-C Dialect Options\fR.
       
  1846 .IP "\fB\-fsyntax\-only\fR" 4
       
  1847 .IX Item "-fsyntax-only"
       
  1848 Check the code for syntax errors, but don't do anything beyond that.
       
  1849 .IP "\fB\-pedantic\fR" 4
       
  1850 .IX Item "-pedantic"
       
  1851 Issue all the warnings demanded by strict \s-1ISO\s0 C and \s-1ISO\s0 \*(C+;
       
  1852 reject all programs that use forbidden extensions, and some other
       
  1853 programs that do not follow \s-1ISO\s0 C and \s-1ISO\s0 \*(C+.  For \s-1ISO\s0 C, follows the
       
  1854 version of the \s-1ISO\s0 C standard specified by any \fB\-std\fR option used.
       
  1855 .Sp
       
  1856 Valid \s-1ISO\s0 C and \s-1ISO\s0 \*(C+ programs should compile properly with or without
       
  1857 this option (though a rare few will require \fB\-ansi\fR or a
       
  1858 \&\fB\-std\fR option specifying the required version of \s-1ISO\s0 C).  However,
       
  1859 without this option, certain \s-1GNU\s0 extensions and traditional C and \*(C+
       
  1860 features are supported as well.  With this option, they are rejected.
       
  1861 .Sp
       
  1862 \&\fB\-pedantic\fR does not cause warning messages for use of the
       
  1863 alternate keywords whose names begin and end with \fB_\|_\fR.  Pedantic
       
  1864 warnings are also disabled in the expression that follows
       
  1865 \&\f(CW\*(C`_\|_extension_\|_\*(C'\fR.  However, only system header files should use
       
  1866 these escape routes; application programs should avoid them.
       
  1867 .Sp
       
  1868 Some users try to use \fB\-pedantic\fR to check programs for strict \s-1ISO\s0
       
  1869 C conformance.  They soon find that it does not do quite what they want:
       
  1870 it finds some non-ISO practices, but not all\-\-\-only those for which
       
  1871 \&\s-1ISO\s0 C \fIrequires\fR a diagnostic, and some others for which
       
  1872 diagnostics have been added.
       
  1873 .Sp
       
  1874 A feature to report any failure to conform to \s-1ISO\s0 C might be useful in
       
  1875 some instances, but would require considerable additional work and would
       
  1876 be quite different from \fB\-pedantic\fR.  We don't have plans to
       
  1877 support such a feature in the near future.
       
  1878 .Sp
       
  1879 Where the standard specified with \fB\-std\fR represents a \s-1GNU\s0
       
  1880 extended dialect of C, such as \fBgnu89\fR or \fBgnu99\fR, there is a
       
  1881 corresponding \fIbase standard\fR, the version of \s-1ISO\s0 C on which the \s-1GNU\s0
       
  1882 extended dialect is based.  Warnings from \fB\-pedantic\fR are given
       
  1883 where they are required by the base standard.  (It would not make sense
       
  1884 for such warnings to be given only for features not in the specified \s-1GNU\s0
       
  1885 C dialect, since by definition the \s-1GNU\s0 dialects of C include all
       
  1886 features the compiler supports with the given option, and there would be
       
  1887 nothing to warn about.)
       
  1888 .IP "\fB\-pedantic\-errors\fR" 4
       
  1889 .IX Item "-pedantic-errors"
       
  1890 Like \fB\-pedantic\fR, except that errors are produced rather than
       
  1891 warnings.
       
  1892 .IP "\fB\-w\fR" 4
       
  1893 .IX Item "-w"
       
  1894 Inhibit all warning messages.
       
  1895 .IP "\fB\-Wno\-import\fR" 4
       
  1896 .IX Item "-Wno-import"
       
  1897 Inhibit warning messages about the use of \fB#import\fR.
       
  1898 .IP "\fB\-Wchar\-subscripts\fR" 4
       
  1899 .IX Item "-Wchar-subscripts"
       
  1900 Warn if an array subscript has type \f(CW\*(C`char\*(C'\fR.  This is a common cause
       
  1901 of error, as programmers often forget that this type is signed on some
       
  1902 machines.
       
  1903 .IP "\fB\-Wcomment\fR" 4
       
  1904 .IX Item "-Wcomment"
       
  1905 Warn whenever a comment-start sequence \fB/*\fR appears in a \fB/*\fR
       
  1906 comment, or whenever a Backslash-Newline appears in a \fB//\fR comment.
       
  1907 .IP "\fB\-Wformat\fR" 4
       
  1908 .IX Item "-Wformat"
       
  1909 Check calls to \f(CW\*(C`printf\*(C'\fR and \f(CW\*(C`scanf\*(C'\fR, etc., to make sure that
       
  1910 the arguments supplied have types appropriate to the format string
       
  1911 specified, and that the conversions specified in the format string make
       
  1912 sense.  This includes standard functions, and others specified by format
       
  1913 attributes, in the \f(CW\*(C`printf\*(C'\fR,
       
  1914 \&\f(CW\*(C`scanf\*(C'\fR, \f(CW\*(C`strftime\*(C'\fR and \f(CW\*(C`strfmon\*(C'\fR (an X/Open extension,
       
  1915 not in the C standard) families.
       
  1916 .Sp
       
  1917 The formats are checked against the format features supported by \s-1GNU\s0
       
  1918 libc version 2.2.  These include all \s-1ISO\s0 C90 and C99 features, as well
       
  1919 as features from the Single Unix Specification and some \s-1BSD\s0 and \s-1GNU\s0
       
  1920 extensions.  Other library implementations may not support all these
       
  1921 features; \s-1GCC\s0 does not support warning about features that go beyond a
       
  1922 particular library's limitations.  However, if \fB\-pedantic\fR is used
       
  1923 with \fB\-Wformat\fR, warnings will be given about format features not
       
  1924 in the selected standard version (but not for \f(CW\*(C`strfmon\*(C'\fR formats,
       
  1925 since those are not in any version of the C standard).  
       
  1926 .Sp
       
  1927 Since \fB\-Wformat\fR also checks for null format arguments for
       
  1928 several functions, \fB\-Wformat\fR also implies \fB\-Wnonnull\fR.
       
  1929 .Sp
       
  1930 \&\fB\-Wformat\fR is included in \fB\-Wall\fR.  For more control over some
       
  1931 aspects of format checking, the options \fB\-Wformat\-y2k\fR,
       
  1932 \&\fB\-Wno\-format\-extra\-args\fR, \fB\-Wno\-format\-zero\-length\fR,
       
  1933 \&\fB\-Wformat\-nonliteral\fR, \fB\-Wformat\-security\fR, and
       
  1934 \&\fB\-Wformat=2\fR are available, but are not included in \fB\-Wall\fR.
       
  1935 .IP "\fB\-Wformat\-y2k\fR" 4
       
  1936 .IX Item "-Wformat-y2k"
       
  1937 If \fB\-Wformat\fR is specified, also warn about \f(CW\*(C`strftime\*(C'\fR
       
  1938 formats which may yield only a two-digit year.
       
  1939 .IP "\fB\-Wno\-format\-extra\-args\fR" 4
       
  1940 .IX Item "-Wno-format-extra-args"
       
  1941 If \fB\-Wformat\fR is specified, do not warn about excess arguments to a
       
  1942 \&\f(CW\*(C`printf\*(C'\fR or \f(CW\*(C`scanf\*(C'\fR format function.  The C standard specifies
       
  1943 that such arguments are ignored.
       
  1944 .Sp
       
  1945 Where the unused arguments lie between used arguments that are
       
  1946 specified with \fB$\fR operand number specifications, normally
       
  1947 warnings are still given, since the implementation could not know what
       
  1948 type to pass to \f(CW\*(C`va_arg\*(C'\fR to skip the unused arguments.  However,
       
  1949 in the case of \f(CW\*(C`scanf\*(C'\fR formats, this option will suppress the
       
  1950 warning if the unused arguments are all pointers, since the Single
       
  1951 Unix Specification says that such unused arguments are allowed.
       
  1952 .IP "\fB\-Wno\-format\-zero\-length\fR" 4
       
  1953 .IX Item "-Wno-format-zero-length"
       
  1954 If \fB\-Wformat\fR is specified, do not warn about zero-length formats.
       
  1955 The C standard specifies that zero-length formats are allowed.
       
  1956 .IP "\fB\-Wformat\-nonliteral\fR" 4
       
  1957 .IX Item "-Wformat-nonliteral"
       
  1958 If \fB\-Wformat\fR is specified, also warn if the format string is not a
       
  1959 string literal and so cannot be checked, unless the format function
       
  1960 takes its format arguments as a \f(CW\*(C`va_list\*(C'\fR.
       
  1961 .IP "\fB\-Wformat\-security\fR" 4
       
  1962 .IX Item "-Wformat-security"
       
  1963 If \fB\-Wformat\fR is specified, also warn about uses of format
       
  1964 functions that represent possible security problems.  At present, this
       
  1965 warns about calls to \f(CW\*(C`printf\*(C'\fR and \f(CW\*(C`scanf\*(C'\fR functions where the
       
  1966 format string is not a string literal and there are no format arguments,
       
  1967 as in \f(CW\*(C`printf (foo);\*(C'\fR.  This may be a security hole if the format
       
  1968 string came from untrusted input and contains \fB%n\fR.  (This is
       
  1969 currently a subset of what \fB\-Wformat\-nonliteral\fR warns about, but
       
  1970 in future warnings may be added to \fB\-Wformat\-security\fR that are not
       
  1971 included in \fB\-Wformat\-nonliteral\fR.)
       
  1972 .IP "\fB\-Wformat=2\fR" 4
       
  1973 .IX Item "-Wformat=2"
       
  1974 Enable \fB\-Wformat\fR plus format checks not included in
       
  1975 \&\fB\-Wformat\fR.  Currently equivalent to \fB\-Wformat
       
  1976 \&\-Wformat\-nonliteral \-Wformat\-security \-Wformat\-y2k\fR.
       
  1977 .IP "\fB\-Wnonnull\fR" 4
       
  1978 .IX Item "-Wnonnull"
       
  1979 Warn about passing a null pointer for arguments marked as
       
  1980 requiring a non-null value by the \f(CW\*(C`nonnull\*(C'\fR function attribute.
       
  1981 .Sp
       
  1982 \&\fB\-Wnonnull\fR is included in \fB\-Wall\fR and \fB\-Wformat\fR.  It
       
  1983 can be disabled with the \fB\-Wno\-nonnull\fR option.
       
  1984 .IP "\fB\-Winit\-self\fR (C, \*(C+, and Objective-C only)" 4
       
  1985 .IX Item "-Winit-self (C, , and Objective-C only)"
       
  1986 Warn about uninitialized variables which are initialized with themselves.
       
  1987 Note this option can only be used with the \fB\-Wuninitialized\fR option,
       
  1988 which in turn only works with \fB\-O1\fR and above.
       
  1989 .Sp
       
  1990 For example, \s-1GCC\s0 will warn about \f(CW\*(C`i\*(C'\fR being uninitialized in the
       
  1991 following snippet only when \fB\-Winit\-self\fR has been specified:
       
  1992 .Sp
       
  1993 .Vb 5
       
  1994 \&        int f()
       
  1995 \&        {
       
  1996 \&          int i = i;
       
  1997 \&          return i;
       
  1998 \&        }
       
  1999 .Ve
       
  2000 .IP "\fB\-Wimplicit\-int\fR" 4
       
  2001 .IX Item "-Wimplicit-int"
       
  2002 Warn when a declaration does not specify a type.
       
  2003 .IP "\fB\-Wimplicit\-function\-declaration\fR" 4
       
  2004 .IX Item "-Wimplicit-function-declaration"
       
  2005 .PD 0
       
  2006 .IP "\fB\-Werror\-implicit\-function\-declaration\fR" 4
       
  2007 .IX Item "-Werror-implicit-function-declaration"
       
  2008 .PD
       
  2009 Give a warning (or error) whenever a function is used before being
       
  2010 declared.
       
  2011 .IP "\fB\-Wimplicit\fR" 4
       
  2012 .IX Item "-Wimplicit"
       
  2013 Same as \fB\-Wimplicit\-int\fR and \fB\-Wimplicit\-function\-declaration\fR.
       
  2014 .IP "\fB\-Wmain\fR" 4
       
  2015 .IX Item "-Wmain"
       
  2016 Warn if the type of \fBmain\fR is suspicious.  \fBmain\fR should be a
       
  2017 function with external linkage, returning int, taking either zero
       
  2018 arguments, two, or three arguments of appropriate types.
       
  2019 .IP "\fB\-Wmissing\-braces\fR" 4
       
  2020 .IX Item "-Wmissing-braces"
       
  2021 Warn if an aggregate or union initializer is not fully bracketed.  In
       
  2022 the following example, the initializer for \fBa\fR is not fully
       
  2023 bracketed, but that for \fBb\fR is fully bracketed.
       
  2024 .Sp
       
  2025 .Vb 2
       
  2026 \&        int a[2][2] = { 0, 1, 2, 3 };
       
  2027 \&        int b[2][2] = { { 0, 1 }, { 2, 3 } };
       
  2028 .Ve
       
  2029 .IP "\fB\-Wparentheses\fR" 4
       
  2030 .IX Item "-Wparentheses"
       
  2031 Warn if parentheses are omitted in certain contexts, such
       
  2032 as when there is an assignment in a context where a truth value
       
  2033 is expected, or when operators are nested whose precedence people
       
  2034 often get confused about.
       
  2035 .Sp
       
  2036 Also warn about constructions where there may be confusion to which
       
  2037 \&\f(CW\*(C`if\*(C'\fR statement an \f(CW\*(C`else\*(C'\fR branch belongs.  Here is an example of
       
  2038 such a case:
       
  2039 .Sp
       
  2040 .Vb 7
       
  2041 \&        {
       
  2042 \&          if (a)
       
  2043 \&            if (b)
       
  2044 \&              foo ();
       
  2045 \&          else
       
  2046 \&            bar ();
       
  2047 \&        }
       
  2048 .Ve
       
  2049 .Sp
       
  2050 In C, every \f(CW\*(C`else\*(C'\fR branch belongs to the innermost possible \f(CW\*(C`if\*(C'\fR
       
  2051 statement, which in this example is \f(CW\*(C`if (b)\*(C'\fR.  This is often not
       
  2052 what the programmer expected, as illustrated in the above example by
       
  2053 indentation the programmer chose.  When there is the potential for this
       
  2054 confusion, \s-1GCC\s0 will issue a warning when this flag is specified.
       
  2055 To eliminate the warning, add explicit braces around the innermost
       
  2056 \&\f(CW\*(C`if\*(C'\fR statement so there is no way the \f(CW\*(C`else\*(C'\fR could belong to
       
  2057 the enclosing \f(CW\*(C`if\*(C'\fR.  The resulting code would look like this:
       
  2058 .Sp
       
  2059 .Vb 9
       
  2060 \&        {
       
  2061 \&          if (a)
       
  2062 \&            {
       
  2063 \&              if (b)
       
  2064 \&                foo ();
       
  2065 \&              else
       
  2066 \&                bar ();
       
  2067 \&            }
       
  2068 \&        }
       
  2069 .Ve
       
  2070 .IP "\fB\-Wsequence\-point\fR" 4
       
  2071 .IX Item "-Wsequence-point"
       
  2072 Warn about code that may have undefined semantics because of violations
       
  2073 of sequence point rules in the C standard.
       
  2074 .Sp
       
  2075 The C standard defines the order in which expressions in a C program are
       
  2076 evaluated in terms of \fIsequence points\fR, which represent a partial
       
  2077 ordering between the execution of parts of the program: those executed
       
  2078 before the sequence point, and those executed after it.  These occur
       
  2079 after the evaluation of a full expression (one which is not part of a
       
  2080 larger expression), after the evaluation of the first operand of a
       
  2081 \&\f(CW\*(C`&&\*(C'\fR, \f(CW\*(C`||\*(C'\fR, \f(CW\*(C`? :\*(C'\fR or \f(CW\*(C`,\*(C'\fR (comma) operator, before a
       
  2082 function is called (but after the evaluation of its arguments and the
       
  2083 expression denoting the called function), and in certain other places.
       
  2084 Other than as expressed by the sequence point rules, the order of
       
  2085 evaluation of subexpressions of an expression is not specified.  All
       
  2086 these rules describe only a partial order rather than a total order,
       
  2087 since, for example, if two functions are called within one expression
       
  2088 with no sequence point between them, the order in which the functions
       
  2089 are called is not specified.  However, the standards committee have
       
  2090 ruled that function calls do not overlap.
       
  2091 .Sp
       
  2092 It is not specified when between sequence points modifications to the
       
  2093 values of objects take effect.  Programs whose behavior depends on this
       
  2094 have undefined behavior; the C standard specifies that ``Between the
       
  2095 previous and next sequence point an object shall have its stored value
       
  2096 modified at most once by the evaluation of an expression.  Furthermore,
       
  2097 the prior value shall be read only to determine the value to be
       
  2098 stored.''.  If a program breaks these rules, the results on any
       
  2099 particular implementation are entirely unpredictable.
       
  2100 .Sp
       
  2101 Examples of code with undefined behavior are \f(CW\*(C`a = a++;\*(C'\fR, \f(CW\*(C`a[n]
       
  2102 = b[n++]\*(C'\fR and \f(CW\*(C`a[i++] = i;\*(C'\fR.  Some more complicated cases are not
       
  2103 diagnosed by this option, and it may give an occasional false positive
       
  2104 result, but in general it has been found fairly effective at detecting
       
  2105 this sort of problem in programs.
       
  2106 .Sp
       
  2107 The present implementation of this option only works for C programs.  A
       
  2108 future implementation may also work for \*(C+ programs.
       
  2109 .Sp
       
  2110 The C standard is worded confusingly, therefore there is some debate
       
  2111 over the precise meaning of the sequence point rules in subtle cases.
       
  2112 Links to discussions of the problem, including proposed formal
       
  2113 definitions, may be found on the \s-1GCC\s0 readings page, at
       
  2114 <\fBhttp://gcc.gnu.org/readings.html\fR>.
       
  2115 .IP "\fB\-Wreturn\-type\fR" 4
       
  2116 .IX Item "-Wreturn-type"
       
  2117 Warn whenever a function is defined with a return-type that defaults to
       
  2118 \&\f(CW\*(C`int\*(C'\fR.  Also warn about any \f(CW\*(C`return\*(C'\fR statement with no
       
  2119 return-value in a function whose return-type is not \f(CW\*(C`void\*(C'\fR.
       
  2120 .Sp
       
  2121 For \*(C+, a function without return type always produces a diagnostic
       
  2122 message, even when \fB\-Wno\-return\-type\fR is specified.  The only
       
  2123 exceptions are \fBmain\fR and functions defined in system headers.
       
  2124 .IP "\fB\-Wswitch\fR" 4
       
  2125 .IX Item "-Wswitch"
       
  2126 Warn whenever a \f(CW\*(C`switch\*(C'\fR statement has an index of enumerated type
       
  2127 and lacks a \f(CW\*(C`case\*(C'\fR for one or more of the named codes of that
       
  2128 enumeration.  (The presence of a \f(CW\*(C`default\*(C'\fR label prevents this
       
  2129 warning.)  \f(CW\*(C`case\*(C'\fR labels outside the enumeration range also
       
  2130 provoke warnings when this option is used.
       
  2131 .IP "\fB\-Wswitch\-default\fR" 4
       
  2132 .IX Item "-Wswitch-default"
       
  2133 Warn whenever a \f(CW\*(C`switch\*(C'\fR statement does not have a \f(CW\*(C`default\*(C'\fR
       
  2134 case.
       
  2135 .IP "\fB\-Wswitch\-enum\fR" 4
       
  2136 .IX Item "-Wswitch-enum"
       
  2137 Warn whenever a \f(CW\*(C`switch\*(C'\fR statement has an index of enumerated type
       
  2138 and lacks a \f(CW\*(C`case\*(C'\fR for one or more of the named codes of that
       
  2139 enumeration.  \f(CW\*(C`case\*(C'\fR labels outside the enumeration range also
       
  2140 provoke warnings when this option is used.
       
  2141 .IP "\fB\-Wtrigraphs\fR" 4
       
  2142 .IX Item "-Wtrigraphs"
       
  2143 Warn if any trigraphs are encountered that might change the meaning of
       
  2144 the program (trigraphs within comments are not warned about).
       
  2145 .IP "\fB\-Wunused\-function\fR" 4
       
  2146 .IX Item "-Wunused-function"
       
  2147 Warn whenever a static function is declared but not defined or a
       
  2148 non\e\-inline static function is unused.
       
  2149 .IP "\fB\-Wunused\-label\fR" 4
       
  2150 .IX Item "-Wunused-label"
       
  2151 Warn whenever a label is declared but not used.
       
  2152 .Sp
       
  2153 To suppress this warning use the \fBunused\fR attribute.
       
  2154 .IP "\fB\-Wunused\-parameter\fR" 4
       
  2155 .IX Item "-Wunused-parameter"
       
  2156 Warn whenever a function parameter is unused aside from its declaration.
       
  2157 .Sp
       
  2158 To suppress this warning use the \fBunused\fR attribute.
       
  2159 .IP "\fB\-Wunused\-variable\fR" 4
       
  2160 .IX Item "-Wunused-variable"
       
  2161 Warn whenever a local variable or non-constant static variable is unused
       
  2162 aside from its declaration
       
  2163 .Sp
       
  2164 To suppress this warning use the \fBunused\fR attribute.
       
  2165 .IP "\fB\-Wunused\-value\fR" 4
       
  2166 .IX Item "-Wunused-value"
       
  2167 Warn whenever a statement computes a result that is explicitly not used.
       
  2168 .Sp
       
  2169 To suppress this warning cast the expression to \fBvoid\fR.
       
  2170 .IP "\fB\-Wunused\fR" 4
       
  2171 .IX Item "-Wunused"
       
  2172 All the above \fB\-Wunused\fR options combined.
       
  2173 .Sp
       
  2174 In order to get a warning about an unused function parameter, you must
       
  2175 either specify \fB\-Wextra \-Wunused\fR (note that \fB\-Wall\fR implies
       
  2176 \&\fB\-Wunused\fR), or separately specify \fB\-Wunused\-parameter\fR.
       
  2177 .IP "\fB\-Wuninitialized\fR" 4
       
  2178 .IX Item "-Wuninitialized"
       
  2179 Warn if an automatic variable is used without first being initialized or
       
  2180 if a variable may be clobbered by a \f(CW\*(C`setjmp\*(C'\fR call.
       
  2181 .Sp
       
  2182 These warnings are possible only in optimizing compilation,
       
  2183 because they require data flow information that is computed only
       
  2184 when optimizing.  If you don't specify \fB\-O\fR, you simply won't
       
  2185 get these warnings.
       
  2186 .Sp
       
  2187 If you want to warn about code which uses the uninitialized value of the
       
  2188 variable in its own initializer, use the \fB\-Winit\-self\fR option.
       
  2189 .Sp
       
  2190 These warnings occur only for variables that are candidates for
       
  2191 register allocation.  Therefore, they do not occur for a variable that
       
  2192 is declared \f(CW\*(C`volatile\*(C'\fR, or whose address is taken, or whose size
       
  2193 is other than 1, 2, 4 or 8 bytes.  Also, they do not occur for
       
  2194 structures, unions or arrays, even when they are in registers.
       
  2195 .Sp
       
  2196 Note that there may be no warning about a variable that is used only
       
  2197 to compute a value that itself is never used, because such
       
  2198 computations may be deleted by data flow analysis before the warnings
       
  2199 are printed.
       
  2200 .Sp
       
  2201 These warnings are made optional because \s-1GCC\s0 is not smart
       
  2202 enough to see all the reasons why the code might be correct
       
  2203 despite appearing to have an error.  Here is one example of how
       
  2204 this can happen:
       
  2205 .Sp
       
  2206 .Vb 12
       
  2207 \&        {
       
  2208 \&          int x;
       
  2209 \&          switch (y)
       
  2210 \&            {
       
  2211 \&            case 1: x = 1;
       
  2212 \&              break;
       
  2213 \&            case 2: x = 4;
       
  2214 \&              break;
       
  2215 \&            case 3: x = 5;
       
  2216 \&            }
       
  2217 \&          foo (x);
       
  2218 \&        }
       
  2219 .Ve
       
  2220 .Sp
       
  2221 If the value of \f(CW\*(C`y\*(C'\fR is always 1, 2 or 3, then \f(CW\*(C`x\*(C'\fR is
       
  2222 always initialized, but \s-1GCC\s0 doesn't know this.  Here is
       
  2223 another common case:
       
  2224 .Sp
       
  2225 .Vb 6
       
  2226 \&        {
       
  2227 \&          int save_y;
       
  2228 \&          if (change_y) save_y = y, y = new_y;
       
  2229 \&          ...
       
  2230 \&          if (change_y) y = save_y;
       
  2231 \&        }
       
  2232 .Ve
       
  2233 .Sp
       
  2234 This has no bug because \f(CW\*(C`save_y\*(C'\fR is used only if it is set.
       
  2235 .Sp
       
  2236 This option also warns when a non-volatile automatic variable might be
       
  2237 changed by a call to \f(CW\*(C`longjmp\*(C'\fR.  These warnings as well are possible
       
  2238 only in optimizing compilation.
       
  2239 .Sp
       
  2240 The compiler sees only the calls to \f(CW\*(C`setjmp\*(C'\fR.  It cannot know
       
  2241 where \f(CW\*(C`longjmp\*(C'\fR will be called; in fact, a signal handler could
       
  2242 call it at any point in the code.  As a result, you may get a warning
       
  2243 even when there is in fact no problem because \f(CW\*(C`longjmp\*(C'\fR cannot
       
  2244 in fact be called at the place which would cause a problem.
       
  2245 .Sp
       
  2246 Some spurious warnings can be avoided if you declare all the functions
       
  2247 you use that never return as \f(CW\*(C`noreturn\*(C'\fR.  
       
  2248 .IP "\fB\-Wunknown\-pragmas\fR" 4
       
  2249 .IX Item "-Wunknown-pragmas"
       
  2250 Warn when a #pragma directive is encountered which is not understood by
       
  2251 \&\s-1GCC\s0.  If this command line option is used, warnings will even be issued
       
  2252 for unknown pragmas in system header files.  This is not the case if
       
  2253 the warnings were only enabled by the \fB\-Wall\fR command line option.
       
  2254 .IP "\fB\-Wstrict\-aliasing\fR" 4
       
  2255 .IX Item "-Wstrict-aliasing"
       
  2256 This option is only active when \fB\-fstrict\-aliasing\fR is active.
       
  2257 It warns about code which might break the strict aliasing rules that the
       
  2258 compiler is using for optimization. The warning does not catch all
       
  2259 cases, but does attempt to catch the more common pitfalls. It is
       
  2260 included in \fB\-Wall\fR.
       
  2261 .IP "\fB\-Wall\fR" 4
       
  2262 .IX Item "-Wall"
       
  2263 All of the above \fB\-W\fR options combined.  This enables all the
       
  2264 warnings about constructions that some users consider questionable, and
       
  2265 that are easy to avoid (or modify to prevent the warning), even in
       
  2266 conjunction with macros.  This also enables some language-specific
       
  2267 warnings described in \fB\*(C+ Dialect Options\fR and
       
  2268 \&\fBObjective-C Dialect Options\fR.
       
  2269 .PP
       
  2270 The following \fB\-W...\fR options are not implied by \fB\-Wall\fR.
       
  2271 Some of them warn about constructions that users generally do not
       
  2272 consider questionable, but which occasionally you might wish to check
       
  2273 for; others warn about constructions that are necessary or hard to avoid
       
  2274 in some cases, and there is no simple way to modify the code to suppress
       
  2275 the warning.
       
  2276 .IP "\fB\-Wextra\fR" 4
       
  2277 .IX Item "-Wextra"
       
  2278 (This option used to be called \fB\-W\fR.  The older name is still
       
  2279 supported, but the newer name is more descriptive.)  Print extra warning
       
  2280 messages for these events:
       
  2281 .RS 4
       
  2282 .IP "\(bu" 4
       
  2283 A function can return either with or without a value.  (Falling
       
  2284 off the end of the function body is considered returning without
       
  2285 a value.)  For example, this function would evoke such a
       
  2286 warning:
       
  2287 .Sp
       
  2288 .Vb 5
       
  2289 \&        foo (a)
       
  2290 \&        {
       
  2291 \&          if (a > 0)
       
  2292 \&            return a;
       
  2293 \&        }
       
  2294 .Ve
       
  2295 .IP "\(bu" 4
       
  2296 An expression-statement or the left-hand side of a comma expression
       
  2297 contains no side effects.
       
  2298 To suppress the warning, cast the unused expression to void.
       
  2299 For example, an expression such as \fBx[i,j]\fR will cause a warning,
       
  2300 but \fBx[(void)i,j]\fR will not.
       
  2301 .IP "\(bu" 4
       
  2302 An unsigned value is compared against zero with \fB<\fR or \fB>=\fR.
       
  2303 .IP "\(bu" 4
       
  2304 A comparison like \fBx<=y<=z\fR appears; this is equivalent to
       
  2305 \&\fB(x<=y ? 1 : 0) <= z\fR, which is a different interpretation from
       
  2306 that of ordinary mathematical notation.
       
  2307 .IP "\(bu" 4
       
  2308 Storage-class specifiers like \f(CW\*(C`static\*(C'\fR are not the first things in
       
  2309 a declaration.  According to the C Standard, this usage is obsolescent.
       
  2310 .IP "\(bu" 4
       
  2311 The return type of a function has a type qualifier such as \f(CW\*(C`const\*(C'\fR.
       
  2312 Such a type qualifier has no effect, since the value returned by a
       
  2313 function is not an lvalue.  (But don't warn about the \s-1GNU\s0 extension of
       
  2314 \&\f(CW\*(C`volatile void\*(C'\fR return types.  That extension will be warned about
       
  2315 if \fB\-pedantic\fR is specified.)
       
  2316 .IP "\(bu" 4
       
  2317 If \fB\-Wall\fR or \fB\-Wunused\fR is also specified, warn about unused
       
  2318 arguments.
       
  2319 .IP "\(bu" 4
       
  2320 A comparison between signed and unsigned values could produce an
       
  2321 incorrect result when the signed value is converted to unsigned.
       
  2322 (But don't warn if \fB\-Wno\-sign\-compare\fR is also specified.)
       
  2323 .IP "\(bu" 4
       
  2324 An aggregate has an initializer which does not initialize all members.
       
  2325 For example, the following code would cause such a warning, because
       
  2326 \&\f(CW\*(C`x.h\*(C'\fR would be implicitly initialized to zero:
       
  2327 .Sp
       
  2328 .Vb 2
       
  2329 \&        struct s { int f, g, h; };
       
  2330 \&        struct s x = { 3, 4 };
       
  2331 .Ve
       
  2332 .IP "\(bu" 4
       
  2333 A function parameter is declared without a type specifier in K&R\-style
       
  2334 functions:
       
  2335 .Sp
       
  2336 .Vb 1
       
  2337 \&        void foo(bar) { }
       
  2338 .Ve
       
  2339 .IP "\(bu" 4
       
  2340 An empty body occurs in an \fBif\fR or \fBelse\fR statement.
       
  2341 .IP "\(bu" 4
       
  2342 A pointer is compared against integer zero with \fB<\fR, \fB<=\fR,
       
  2343 \&\fB>\fR, or \fB>=\fR.
       
  2344 .IP "\(bu" 4
       
  2345 A variable might be changed by \fBlongjmp\fR or \fBvfork\fR.
       
  2346 .IP "\(bu" 4
       
  2347 Any of several floating-point events that often indicate errors, such as
       
  2348 overflow, underflow, loss of precision, etc.
       
  2349 .IP "*<(\*(C+ only)>" 4
       
  2350 .IX Item "*<( only)>"
       
  2351 An enumerator and a non-enumerator both appear in a conditional expression.
       
  2352 .IP "*<(\*(C+ only)>" 4
       
  2353 .IX Item "*<( only)>"
       
  2354 A non-static reference or non-static \fBconst\fR member appears in a
       
  2355 class without constructors.
       
  2356 .IP "*<(\*(C+ only)>" 4
       
  2357 .IX Item "*<( only)>"
       
  2358 Ambiguous virtual bases.
       
  2359 .IP "*<(\*(C+ only)>" 4
       
  2360 .IX Item "*<( only)>"
       
  2361 Subscripting an array which has been declared \fBregister\fR.
       
  2362 .IP "*<(\*(C+ only)>" 4
       
  2363 .IX Item "*<( only)>"
       
  2364 Taking the address of a variable which has been declared \fBregister\fR.
       
  2365 .IP "*<(\*(C+ only)>" 4
       
  2366 .IX Item "*<( only)>"
       
  2367 A base class is not initialized in a derived class' copy constructor.
       
  2368 .RE
       
  2369 .RS 4
       
  2370 .RE
       
  2371 .IP "\fB\-Wno\-div\-by\-zero\fR" 4
       
  2372 .IX Item "-Wno-div-by-zero"
       
  2373 Do not warn about compile-time integer division by zero.  Floating point
       
  2374 division by zero is not warned about, as it can be a legitimate way of
       
  2375 obtaining infinities and NaNs.
       
  2376 .IP "\fB\-Wsystem\-headers\fR" 4
       
  2377 .IX Item "-Wsystem-headers"
       
  2378 Print warning messages for constructs found in system header files.
       
  2379 Warnings from system headers are normally suppressed, on the assumption
       
  2380 that they usually do not indicate real problems and would only make the
       
  2381 compiler output harder to read.  Using this command line option tells
       
  2382 \&\s-1GCC\s0 to emit warnings from system headers as if they occurred in user
       
  2383 code.  However, note that using \fB\-Wall\fR in conjunction with this
       
  2384 option will \fInot\fR warn about unknown pragmas in system
       
  2385 headers\-\-\-for that, \fB\-Wunknown\-pragmas\fR must also be used.
       
  2386 .IP "\fB\-Wfloat\-equal\fR" 4
       
  2387 .IX Item "-Wfloat-equal"
       
  2388 Warn if floating point values are used in equality comparisons.
       
  2389 .Sp
       
  2390 The idea behind this is that sometimes it is convenient (for the
       
  2391 programmer) to consider floating-point values as approximations to
       
  2392 infinitely precise real numbers.  If you are doing this, then you need
       
  2393 to compute (by analyzing the code, or in some other way) the maximum or
       
  2394 likely maximum error that the computation introduces, and allow for it
       
  2395 when performing comparisons (and when producing output, but that's a
       
  2396 different problem).  In particular, instead of testing for equality, you
       
  2397 would check to see whether the two values have ranges that overlap; and
       
  2398 this is done with the relational operators, so equality comparisons are
       
  2399 probably mistaken.
       
  2400 .IP "\fB\-Wtraditional\fR (C only)" 4
       
  2401 .IX Item "-Wtraditional (C only)"
       
  2402 Warn about certain constructs that behave differently in traditional and
       
  2403 \&\s-1ISO\s0 C.  Also warn about \s-1ISO\s0 C constructs that have no traditional C
       
  2404 equivalent, and/or problematic constructs which should be avoided.
       
  2405 .RS 4
       
  2406 .IP "\(bu" 4
       
  2407 Macro parameters that appear within string literals in the macro body.
       
  2408 In traditional C macro replacement takes place within string literals,
       
  2409 but does not in \s-1ISO\s0 C.
       
  2410 .IP "\(bu" 4
       
  2411 In traditional C, some preprocessor directives did not exist.
       
  2412 Traditional preprocessors would only consider a line to be a directive
       
  2413 if the \fB#\fR appeared in column 1 on the line.  Therefore
       
  2414 \&\fB\-Wtraditional\fR warns about directives that traditional C
       
  2415 understands but would ignore because the \fB#\fR does not appear as the
       
  2416 first character on the line.  It also suggests you hide directives like
       
  2417 \&\fB#pragma\fR not understood by traditional C by indenting them.  Some
       
  2418 traditional implementations would not recognize \fB#elif\fR, so it
       
  2419 suggests avoiding it altogether.
       
  2420 .IP "\(bu" 4
       
  2421 A function-like macro that appears without arguments.
       
  2422 .IP "\(bu" 4
       
  2423 The unary plus operator.
       
  2424 .IP "\(bu" 4
       
  2425 The \fBU\fR integer constant suffix, or the \fBF\fR or \fBL\fR floating point
       
  2426 constant suffixes.  (Traditional C does support the \fBL\fR suffix on integer
       
  2427 constants.)  Note, these suffixes appear in macros defined in the system
       
  2428 headers of most modern systems, e.g. the \fB_MIN\fR/\fB_MAX\fR macros in \f(CW\*(C`<limits.h>\*(C'\fR.
       
  2429 Use of these macros in user code might normally lead to spurious
       
  2430 warnings, however \s-1GCC\s0's integrated preprocessor has enough context to
       
  2431 avoid warning in these cases.
       
  2432 .IP "\(bu" 4
       
  2433 A function declared external in one block and then used after the end of
       
  2434 the block.
       
  2435 .IP "\(bu" 4
       
  2436 A \f(CW\*(C`switch\*(C'\fR statement has an operand of type \f(CW\*(C`long\*(C'\fR.
       
  2437 .IP "\(bu" 4
       
  2438 A non\-\f(CW\*(C`static\*(C'\fR function declaration follows a \f(CW\*(C`static\*(C'\fR one.
       
  2439 This construct is not accepted by some traditional C compilers.
       
  2440 .IP "\(bu" 4
       
  2441 The \s-1ISO\s0 type of an integer constant has a different width or
       
  2442 signedness from its traditional type.  This warning is only issued if
       
  2443 the base of the constant is ten.  I.e. hexadecimal or octal values, which
       
  2444 typically represent bit patterns, are not warned about.
       
  2445 .IP "\(bu" 4
       
  2446 Usage of \s-1ISO\s0 string concatenation is detected.
       
  2447 .IP "\(bu" 4
       
  2448 Initialization of automatic aggregates.
       
  2449 .IP "\(bu" 4
       
  2450 Identifier conflicts with labels.  Traditional C lacks a separate
       
  2451 namespace for labels.
       
  2452 .IP "\(bu" 4
       
  2453 Initialization of unions.  If the initializer is zero, the warning is
       
  2454 omitted.  This is done under the assumption that the zero initializer in
       
  2455 user code appears conditioned on e.g. \f(CW\*(C`_\|_STDC_\|_\*(C'\fR to avoid missing
       
  2456 initializer warnings and relies on default initialization to zero in the
       
  2457 traditional C case.
       
  2458 .IP "\(bu" 4
       
  2459 Conversions by prototypes between fixed/floating point values and vice
       
  2460 versa.  The absence of these prototypes when compiling with traditional
       
  2461 C would cause serious problems.  This is a subset of the possible
       
  2462 conversion warnings, for the full set use \fB\-Wconversion\fR.
       
  2463 .IP "\(bu" 4
       
  2464 Use of \s-1ISO\s0 C style function definitions.  This warning intentionally is
       
  2465 \&\fInot\fR issued for prototype declarations or variadic functions
       
  2466 because these \s-1ISO\s0 C features will appear in your code when using
       
  2467 libiberty's traditional C compatibility macros, \f(CW\*(C`PARAMS\*(C'\fR and
       
  2468 \&\f(CW\*(C`VPARAMS\*(C'\fR.  This warning is also bypassed for nested functions
       
  2469 because that feature is already a \s-1GCC\s0 extension and thus not relevant to
       
  2470 traditional C compatibility.
       
  2471 .RE
       
  2472 .RS 4
       
  2473 .RE
       
  2474 .IP "\fB\-Wdeclaration\-after\-statement\fR (C only)" 4
       
  2475 .IX Item "-Wdeclaration-after-statement (C only)"
       
  2476 Warn when a declaration is found after a statement in a block.  This
       
  2477 construct, known from \*(C+, was introduced with \s-1ISO\s0 C99 and is by default
       
  2478 allowed in \s-1GCC\s0.  It is not supported by \s-1ISO\s0 C90 and was not supported by
       
  2479 \&\s-1GCC\s0 versions before \s-1GCC\s0 3.0.  
       
  2480 .IP "\fB\-Wundef\fR" 4
       
  2481 .IX Item "-Wundef"
       
  2482 Warn if an undefined identifier is evaluated in an \fB#if\fR directive.
       
  2483 .IP "\fB\-Wendif\-labels\fR" 4
       
  2484 .IX Item "-Wendif-labels"
       
  2485 Warn whenever an \fB#else\fR or an \fB#endif\fR are followed by text.
       
  2486 .IP "\fB\-Wshadow\fR" 4
       
  2487 .IX Item "-Wshadow"
       
  2488 Warn whenever a local variable shadows another local variable, parameter or
       
  2489 global variable or whenever a built-in function is shadowed.
       
  2490 .IP "\fB\-Wlarger\-than\-\fR\fIlen\fR" 4
       
  2491 .IX Item "-Wlarger-than-len"
       
  2492 Warn whenever an object of larger than \fIlen\fR bytes is defined.
       
  2493 .IP "\fB\-Wpointer\-arith\fR" 4
       
  2494 .IX Item "-Wpointer-arith"
       
  2495 Warn about anything that depends on the ``size of'' a function type or
       
  2496 of \f(CW\*(C`void\*(C'\fR.  \s-1GNU\s0 C assigns these types a size of 1, for
       
  2497 convenience in calculations with \f(CW\*(C`void *\*(C'\fR pointers and pointers
       
  2498 to functions.
       
  2499 .IP "\fB\-Wbad\-function\-cast\fR (C only)" 4
       
  2500 .IX Item "-Wbad-function-cast (C only)"
       
  2501 Warn whenever a function call is cast to a non-matching type.
       
  2502 For example, warn if \f(CW\*(C`int malloc()\*(C'\fR is cast to \f(CW\*(C`anything *\*(C'\fR.
       
  2503 .IP "\fB\-Wcast\-qual\fR" 4
       
  2504 .IX Item "-Wcast-qual"
       
  2505 Warn whenever a pointer is cast so as to remove a type qualifier from
       
  2506 the target type.  For example, warn if a \f(CW\*(C`const char *\*(C'\fR is cast
       
  2507 to an ordinary \f(CW\*(C`char *\*(C'\fR.
       
  2508 .IP "\fB\-Wcast\-align\fR" 4
       
  2509 .IX Item "-Wcast-align"
       
  2510 Warn whenever a pointer is cast such that the required alignment of the
       
  2511 target is increased.  For example, warn if a \f(CW\*(C`char *\*(C'\fR is cast to
       
  2512 an \f(CW\*(C`int *\*(C'\fR on machines where integers can only be accessed at
       
  2513 two\- or four-byte boundaries.
       
  2514 .IP "\fB\-Wwrite\-strings\fR" 4
       
  2515 .IX Item "-Wwrite-strings"
       
  2516 When compiling C, give string constants the type \f(CW\*(C`const
       
  2517 char[\f(CIlength\f(CW]\*(C'\fR so that
       
  2518 copying the address of one into a non\-\f(CW\*(C`const\*(C'\fR \f(CW\*(C`char *\*(C'\fR
       
  2519 pointer will get a warning; when compiling \*(C+, warn about the
       
  2520 deprecated conversion from string constants to \f(CW\*(C`char *\*(C'\fR.
       
  2521 These warnings will help you find at
       
  2522 compile time code that can try to write into a string constant, but
       
  2523 only if you have been very careful about using \f(CW\*(C`const\*(C'\fR in
       
  2524 declarations and prototypes.  Otherwise, it will just be a nuisance;
       
  2525 this is why we did not make \fB\-Wall\fR request these warnings.
       
  2526 .IP "\fB\-Wconversion\fR" 4
       
  2527 .IX Item "-Wconversion"
       
  2528 Warn if a prototype causes a type conversion that is different from what
       
  2529 would happen to the same argument in the absence of a prototype.  This
       
  2530 includes conversions of fixed point to floating and vice versa, and
       
  2531 conversions changing the width or signedness of a fixed point argument
       
  2532 except when the same as the default promotion.
       
  2533 .Sp
       
  2534 Also, warn if a negative integer constant expression is implicitly
       
  2535 converted to an unsigned type.  For example, warn about the assignment
       
  2536 \&\f(CW\*(C`x = \-1\*(C'\fR if \f(CW\*(C`x\*(C'\fR is unsigned.  But do not warn about explicit
       
  2537 casts like \f(CW\*(C`(unsigned) \-1\*(C'\fR.
       
  2538 .IP "\fB\-Wsign\-compare\fR" 4
       
  2539 .IX Item "-Wsign-compare"
       
  2540 Warn when a comparison between signed and unsigned values could produce
       
  2541 an incorrect result when the signed value is converted to unsigned.
       
  2542 This warning is also enabled by \fB\-Wextra\fR; to get the other warnings
       
  2543 of \fB\-Wextra\fR without this warning, use \fB\-Wextra \-Wno\-sign\-compare\fR.
       
  2544 .IP "\fB\-Waggregate\-return\fR" 4
       
  2545 .IX Item "-Waggregate-return"
       
  2546 Warn if any functions that return structures or unions are defined or
       
  2547 called.  (In languages where you can return an array, this also elicits
       
  2548 a warning.)
       
  2549 .IP "\fB\-Wstrict\-prototypes\fR (C only)" 4
       
  2550 .IX Item "-Wstrict-prototypes (C only)"
       
  2551 Warn if a function is declared or defined without specifying the
       
  2552 argument types.  (An old-style function definition is permitted without
       
  2553 a warning if preceded by a declaration which specifies the argument
       
  2554 types.)
       
  2555 .IP "\fB\-Wold\-style\-definition\fR (C only)" 4
       
  2556 .IX Item "-Wold-style-definition (C only)"
       
  2557 Warn if an old-style function definition is used.  A warning is given
       
  2558 even if there is a previous prototype.
       
  2559 .IP "\fB\-Wmissing\-prototypes\fR (C only)" 4
       
  2560 .IX Item "-Wmissing-prototypes (C only)"
       
  2561 Warn if a global function is defined without a previous prototype
       
  2562 declaration.  This warning is issued even if the definition itself
       
  2563 provides a prototype.  The aim is to detect global functions that fail
       
  2564 to be declared in header files.
       
  2565 .IP "\fB\-Wmissing\-declarations\fR (C only)" 4
       
  2566 .IX Item "-Wmissing-declarations (C only)"
       
  2567 Warn if a global function is defined without a previous declaration.
       
  2568 Do so even if the definition itself provides a prototype.
       
  2569 Use this option to detect global functions that are not declared in
       
  2570 header files.
       
  2571 .IP "\fB\-Wmissing\-noreturn\fR" 4
       
  2572 .IX Item "-Wmissing-noreturn"
       
  2573 Warn about functions which might be candidates for attribute \f(CW\*(C`noreturn\*(C'\fR.
       
  2574 Note these are only possible candidates, not absolute ones.  Care should
       
  2575 be taken to manually verify functions actually do not ever return before
       
  2576 adding the \f(CW\*(C`noreturn\*(C'\fR attribute, otherwise subtle code generation
       
  2577 bugs could be introduced.  You will not get a warning for \f(CW\*(C`main\*(C'\fR in
       
  2578 hosted C environments.
       
  2579 .IP "\fB\-Wmissing\-format\-attribute\fR" 4
       
  2580 .IX Item "-Wmissing-format-attribute"
       
  2581 If \fB\-Wformat\fR is enabled, also warn about functions which might be
       
  2582 candidates for \f(CW\*(C`format\*(C'\fR attributes.  Note these are only possible
       
  2583 candidates, not absolute ones.  \s-1GCC\s0 will guess that \f(CW\*(C`format\*(C'\fR
       
  2584 attributes might be appropriate for any function that calls a function
       
  2585 like \f(CW\*(C`vprintf\*(C'\fR or \f(CW\*(C`vscanf\*(C'\fR, but this might not always be the
       
  2586 case, and some functions for which \f(CW\*(C`format\*(C'\fR attributes are
       
  2587 appropriate may not be detected.  This option has no effect unless
       
  2588 \&\fB\-Wformat\fR is enabled (possibly by \fB\-Wall\fR).
       
  2589 .IP "\fB\-Wno\-multichar\fR" 4
       
  2590 .IX Item "-Wno-multichar"
       
  2591 Do not warn if a multicharacter constant (\fB'\s-1FOOF\s0'\fR) is used.
       
  2592 Usually they indicate a typo in the user's code, as they have
       
  2593 implementation-defined values, and should not be used in portable code.
       
  2594 .IP "\fB\-Wno\-deprecated\-declarations\fR" 4
       
  2595 .IX Item "-Wno-deprecated-declarations"
       
  2596 Do not warn about uses of functions, variables, and types marked as
       
  2597 deprecated by using the \f(CW\*(C`deprecated\*(C'\fR attribute.
       
  2598 (@pxref{Function Attributes}, \f(CW@pxref\fR{Variable Attributes},
       
  2599 \&\f(CW@pxref\fR{Type Attributes}.)
       
  2600 .IP "\fB\-Wpacked\fR" 4
       
  2601 .IX Item "-Wpacked"
       
  2602 Warn if a structure is given the packed attribute, but the packed
       
  2603 attribute has no effect on the layout or size of the structure.
       
  2604 Such structures may be mis-aligned for little benefit.  For
       
  2605 instance, in this code, the variable \f(CW\*(C`f.x\*(C'\fR in \f(CW\*(C`struct bar\*(C'\fR
       
  2606 will be misaligned even though \f(CW\*(C`struct bar\*(C'\fR does not itself
       
  2607 have the packed attribute:
       
  2608 .Sp
       
  2609 .Vb 8
       
  2610 \&        struct foo {
       
  2611 \&          int x;
       
  2612 \&          char a, b, c, d;
       
  2613 \&        } __attribute__((packed));
       
  2614 \&        struct bar {
       
  2615 \&          char z;
       
  2616 \&          struct foo f;
       
  2617 \&        };
       
  2618 .Ve
       
  2619 .IP "\fB\-Wpadded\fR" 4
       
  2620 .IX Item "-Wpadded"
       
  2621 Warn if padding is included in a structure, either to align an element
       
  2622 of the structure or to align the whole structure.  Sometimes when this
       
  2623 happens it is possible to rearrange the fields of the structure to
       
  2624 reduce the padding and so make the structure smaller.
       
  2625 .IP "\fB\-Wredundant\-decls\fR" 4
       
  2626 .IX Item "-Wredundant-decls"
       
  2627 Warn if anything is declared more than once in the same scope, even in
       
  2628 cases where multiple declaration is valid and changes nothing.
       
  2629 .IP "\fB\-Wnested\-externs\fR (C only)" 4
       
  2630 .IX Item "-Wnested-externs (C only)"
       
  2631 Warn if an \f(CW\*(C`extern\*(C'\fR declaration is encountered within a function.
       
  2632 .IP "\fB\-Wunreachable\-code\fR" 4
       
  2633 .IX Item "-Wunreachable-code"
       
  2634 Warn if the compiler detects that code will never be executed.
       
  2635 .Sp
       
  2636 This option is intended to warn when the compiler detects that at
       
  2637 least a whole line of source code will never be executed, because
       
  2638 some condition is never satisfied or because it is after a
       
  2639 procedure that never returns.
       
  2640 .Sp
       
  2641 It is possible for this option to produce a warning even though there
       
  2642 are circumstances under which part of the affected line can be executed,
       
  2643 so care should be taken when removing apparently-unreachable code.
       
  2644 .Sp
       
  2645 For instance, when a function is inlined, a warning may mean that the
       
  2646 line is unreachable in only one inlined copy of the function.
       
  2647 .Sp
       
  2648 This option is not made part of \fB\-Wall\fR because in a debugging
       
  2649 version of a program there is often substantial code which checks
       
  2650 correct functioning of the program and is, hopefully, unreachable
       
  2651 because the program does work.  Another common use of unreachable
       
  2652 code is to provide behavior which is selectable at compile\-time.
       
  2653 .IP "\fB\-Winline\fR" 4
       
  2654 .IX Item "-Winline"
       
  2655 Warn if a function can not be inlined and it was declared as inline.
       
  2656 Even with this option, the compiler will not warn about failures to
       
  2657 inline functions declared in system headers.
       
  2658 .Sp
       
  2659 The compiler uses a variety of heuristics to determine whether or not
       
  2660 to inline a function.  For example, the compiler takes into account
       
  2661 the size of the function being inlined and the the amount of inlining
       
  2662 that has already been done in the current function.  Therefore,
       
  2663 seemingly insignificant changes in the source program can cause the
       
  2664 warnings produced by \fB\-Winline\fR to appear or disappear.
       
  2665 .IP "\fB\-Wno\-invalid\-offsetof\fR (\*(C+ only)" 4
       
  2666 .IX Item "-Wno-invalid-offsetof ( only)"
       
  2667 Suppress warnings from applying the \fBoffsetof\fR macro to a non-POD
       
  2668 type.  According to the 1998 \s-1ISO\s0 \*(C+ standard, applying \fBoffsetof\fR
       
  2669 to a non-POD type is undefined.  In existing \*(C+ implementations,
       
  2670 however, \fBoffsetof\fR typically gives meaningful results even when
       
  2671 applied to certain kinds of non-POD types. (Such as a simple
       
  2672 \&\fBstruct\fR that fails to be a \s-1POD\s0 type only by virtue of having a
       
  2673 constructor.)  This flag is for users who are aware that they are
       
  2674 writing nonportable code and who have deliberately chosen to ignore the
       
  2675 warning about it.
       
  2676 .Sp
       
  2677 The restrictions on \fBoffsetof\fR may be relaxed in a future version
       
  2678 of the \*(C+ standard.
       
  2679 .IP "\fB\-Winvalid\-pch\fR" 4
       
  2680 .IX Item "-Winvalid-pch"
       
  2681 Warn if a precompiled header is found in
       
  2682 the search path but can't be used.
       
  2683 .IP "\fB\-Wlong\-long\fR" 4
       
  2684 .IX Item "-Wlong-long"
       
  2685 Warn if \fBlong long\fR type is used.  This is default.  To inhibit
       
  2686 the warning messages, use \fB\-Wno\-long\-long\fR.  Flags
       
  2687 \&\fB\-Wlong\-long\fR and \fB\-Wno\-long\-long\fR are taken into account
       
  2688 only when \fB\-pedantic\fR flag is used.
       
  2689 .IP "\fB\-Wdisabled\-optimization\fR" 4
       
  2690 .IX Item "-Wdisabled-optimization"
       
  2691 Warn if a requested optimization pass is disabled.  This warning does
       
  2692 not generally indicate that there is anything wrong with your code; it
       
  2693 merely indicates that \s-1GCC\s0's optimizers were unable to handle the code
       
  2694 effectively.  Often, the problem is that your code is too big or too
       
  2695 complex; \s-1GCC\s0 will refuse to optimize programs when the optimization
       
  2696 itself is likely to take inordinate amounts of time.
       
  2697 .IP "\fB\-Werror\fR" 4
       
  2698 .IX Item "-Werror"
       
  2699 Make all warnings into errors.
       
  2700 .Sh "Options for Debugging Your Program or \s-1GCC\s0"
       
  2701 .IX Subsection "Options for Debugging Your Program or GCC"
       
  2702 \&\s-1GCC\s0 has various special options that are used for debugging
       
  2703 either your program or \s-1GCC:\s0
       
  2704 .IP "\fB\-g\fR" 4
       
  2705 .IX Item "-g"
       
  2706 Produce debugging information in the operating system's native format
       
  2707 (stabs, \s-1COFF\s0, \s-1XCOFF\s0, or \s-1DWARF\s0).  \s-1GDB\s0 can work with this debugging
       
  2708 information.
       
  2709 .Sp
       
  2710 On most systems that use stabs format, \fB\-g\fR enables use of extra
       
  2711 debugging information that only \s-1GDB\s0 can use; this extra information
       
  2712 makes debugging work better in \s-1GDB\s0 but will probably make other debuggers
       
  2713 crash or
       
  2714 refuse to read the program.  If you want to control for certain whether
       
  2715 to generate the extra information, use \fB\-gstabs+\fR, \fB\-gstabs\fR,
       
  2716 \&\fB\-gxcoff+\fR, \fB\-gxcoff\fR, or \fB\-gvms\fR (see below).
       
  2717 .Sp
       
  2718 Unlike most other C compilers, \s-1GCC\s0 allows you to use \fB\-g\fR with
       
  2719 \&\fB\-O\fR.  The shortcuts taken by optimized code may occasionally
       
  2720 produce surprising results: some variables you declared may not exist
       
  2721 at all; flow of control may briefly move where you did not expect it;
       
  2722 some statements may not be executed because they compute constant
       
  2723 results or their values were already at hand; some statements may
       
  2724 execute in different places because they were moved out of loops.
       
  2725 .Sp
       
  2726 Nevertheless it proves possible to debug optimized output.  This makes
       
  2727 it reasonable to use the optimizer for programs that might have bugs.
       
  2728 .Sp
       
  2729 The following options are useful when \s-1GCC\s0 is generated with the
       
  2730 capability for more than one debugging format.
       
  2731 .IP "\fB\-ggdb\fR" 4
       
  2732 .IX Item "-ggdb"
       
  2733 Produce debugging information for use by \s-1GDB\s0.  This means to use the
       
  2734 most expressive format available (\s-1DWARF\s0 2, stabs, or the native format
       
  2735 if neither of those are supported), including \s-1GDB\s0 extensions if at all
       
  2736 possible.
       
  2737 .IP "\fB\-gstabs\fR" 4
       
  2738 .IX Item "-gstabs"
       
  2739 Produce debugging information in stabs format (if that is supported),
       
  2740 without \s-1GDB\s0 extensions.  This is the format used by \s-1DBX\s0 on most \s-1BSD\s0
       
  2741 systems.  On \s-1MIPS\s0, Alpha and System V Release 4 systems this option
       
  2742 produces stabs debugging output which is not understood by \s-1DBX\s0 or \s-1SDB\s0.
       
  2743 On System V Release 4 systems this option requires the \s-1GNU\s0 assembler.
       
  2744 .IP "\fB\-feliminate\-unused\-debug\-symbols\fR" 4
       
  2745 .IX Item "-feliminate-unused-debug-symbols"
       
  2746 Produce debugging information in stabs format (if that is supported),
       
  2747 for only symbols that are actually used.
       
  2748 .IP "\fB\-gstabs+\fR" 4
       
  2749 .IX Item "-gstabs+"
       
  2750 Produce debugging information in stabs format (if that is supported),
       
  2751 using \s-1GNU\s0 extensions understood only by the \s-1GNU\s0 debugger (\s-1GDB\s0).  The
       
  2752 use of these extensions is likely to make other debuggers crash or
       
  2753 refuse to read the program.
       
  2754 .IP "\fB\-gcoff\fR" 4
       
  2755 .IX Item "-gcoff"
       
  2756 Produce debugging information in \s-1COFF\s0 format (if that is supported).
       
  2757 This is the format used by \s-1SDB\s0 on most System V systems prior to
       
  2758 System V Release 4.
       
  2759 .IP "\fB\-gxcoff\fR" 4
       
  2760 .IX Item "-gxcoff"
       
  2761 Produce debugging information in \s-1XCOFF\s0 format (if that is supported).
       
  2762 This is the format used by the \s-1DBX\s0 debugger on \s-1IBM\s0 \s-1RS/6000\s0 systems.
       
  2763 .IP "\fB\-gxcoff+\fR" 4
       
  2764 .IX Item "-gxcoff+"
       
  2765 Produce debugging information in \s-1XCOFF\s0 format (if that is supported),
       
  2766 using \s-1GNU\s0 extensions understood only by the \s-1GNU\s0 debugger (\s-1GDB\s0).  The
       
  2767 use of these extensions is likely to make other debuggers crash or
       
  2768 refuse to read the program, and may cause assemblers other than the \s-1GNU\s0
       
  2769 assembler (\s-1GAS\s0) to fail with an error.
       
  2770 .IP "\fB\-gdwarf\-2\fR" 4
       
  2771 .IX Item "-gdwarf-2"
       
  2772 Produce debugging information in \s-1DWARF\s0 version 2 format (if that is
       
  2773 supported).  This is the format used by \s-1DBX\s0 on \s-1IRIX\s0 6.
       
  2774 .IP "\fB\-gvms\fR" 4
       
  2775 .IX Item "-gvms"
       
  2776 Produce debugging information in \s-1VMS\s0 debug format (if that is
       
  2777 supported).  This is the format used by \s-1DEBUG\s0 on \s-1VMS\s0 systems.
       
  2778 .IP "\fB\-g\fR\fIlevel\fR" 4
       
  2779 .IX Item "-glevel"
       
  2780 .PD 0
       
  2781 .IP "\fB\-ggdb\fR\fIlevel\fR" 4
       
  2782 .IX Item "-ggdblevel"
       
  2783 .IP "\fB\-gstabs\fR\fIlevel\fR" 4
       
  2784 .IX Item "-gstabslevel"
       
  2785 .IP "\fB\-gcoff\fR\fIlevel\fR" 4
       
  2786 .IX Item "-gcofflevel"
       
  2787 .IP "\fB\-gxcoff\fR\fIlevel\fR" 4
       
  2788 .IX Item "-gxcofflevel"
       
  2789 .IP "\fB\-gvms\fR\fIlevel\fR" 4
       
  2790 .IX Item "-gvmslevel"
       
  2791 .PD
       
  2792 Request debugging information and also use \fIlevel\fR to specify how
       
  2793 much information.  The default level is 2.
       
  2794 .Sp
       
  2795 Level 1 produces minimal information, enough for making backtraces in
       
  2796 parts of the program that you don't plan to debug.  This includes
       
  2797 descriptions of functions and external variables, but no information
       
  2798 about local variables and no line numbers.
       
  2799 .Sp
       
  2800 Level 3 includes extra information, such as all the macro definitions
       
  2801 present in the program.  Some debuggers support macro expansion when
       
  2802 you use \fB\-g3\fR.
       
  2803 .Sp
       
  2804 Note that in order to avoid confusion between \s-1DWARF1\s0 debug level 2,
       
  2805 and \s-1DWARF2\s0 \fB\-gdwarf\-2\fR does not accept a concatenated debug
       
  2806 level.  Instead use an additional \fB\-g\fR\fIlevel\fR option to
       
  2807 change the debug level for \s-1DWARF2\s0.
       
  2808 .IP "\fB\-feliminate\-dwarf2\-dups\fR" 4
       
  2809 .IX Item "-feliminate-dwarf2-dups"
       
  2810 Compress \s-1DWARF2\s0 debugging information by eliminating duplicated
       
  2811 information about each symbol.  This option only makes sense when
       
  2812 generating \s-1DWARF2\s0 debugging information with \fB\-gdwarf\-2\fR.
       
  2813 .IP "\fB\-p\fR" 4
       
  2814 .IX Item "-p"
       
  2815 Generate extra code to write profile information suitable for the
       
  2816 analysis program \fBprof\fR.  You must use this option when compiling
       
  2817 the source files you want data about, and you must also use it when
       
  2818 linking.
       
  2819 .IP "\fB\-pg\fR" 4
       
  2820 .IX Item "-pg"
       
  2821 Generate extra code to write profile information suitable for the
       
  2822 analysis program \fBgprof\fR.  You must use this option when compiling
       
  2823 the source files you want data about, and you must also use it when
       
  2824 linking.
       
  2825 .IP "\fB\-Q\fR" 4
       
  2826 .IX Item "-Q"
       
  2827 Makes the compiler print out each function name as it is compiled, and
       
  2828 print some statistics about each pass when it finishes.
       
  2829 .IP "\fB\-ftime\-report\fR" 4
       
  2830 .IX Item "-ftime-report"
       
  2831 Makes the compiler print some statistics about the time consumed by each
       
  2832 pass when it finishes.
       
  2833 .IP "\fB\-fmem\-report\fR" 4
       
  2834 .IX Item "-fmem-report"
       
  2835 Makes the compiler print some statistics about permanent memory
       
  2836 allocation when it finishes.
       
  2837 .IP "\fB\-fprofile\-arcs\fR" 4
       
  2838 .IX Item "-fprofile-arcs"
       
  2839 Add code so that program flow \fIarcs\fR are instrumented.  During
       
  2840 execution the program records how many times each branch and call is
       
  2841 executed and how many times it is taken or returns.  When the compiled
       
  2842 program exits it saves this data to a file called
       
  2843 \&\fI\fIauxname\fI.gcda\fR for each source file. The data may be used for
       
  2844 profile-directed optimizations (\fB\-fbranch\-probabilities\fR), or for
       
  2845 test coverage analysis (\fB\-ftest\-coverage\fR). Each object file's
       
  2846 \&\fIauxname\fR is generated from the name of the output file, if
       
  2847 explicitly specified and it is not the final executable, otherwise it is
       
  2848 the basename of the source file. In both cases any suffix is removed
       
  2849 (e.g.  \fIfoo.gcda\fR for input file \fIdir/foo.c\fR, or
       
  2850 \&\fIdir/foo.gcda\fR for output file specified as \fB\-o dir/foo.o\fR).
       
  2851 .RS 4
       
  2852 .IP "@bullet" 4
       
  2853 .IX Item "@bullet"
       
  2854 Compile the source files with \fB\-fprofile\-arcs\fR plus optimization
       
  2855 and code generation options. For test coverage analysis, use the
       
  2856 additional \fB\-ftest\-coverage\fR option. You do not need to profile
       
  2857 every source file in a program.
       
  2858 .IP "@cvmmfu" 4
       
  2859 .IX Item "@cvmmfu"
       
  2860 Link your object files with \fB\-lgcov\fR or \fB\-fprofile\-arcs\fR
       
  2861 (the latter implies the former).
       
  2862 .IP "@dwnngv" 4
       
  2863 .IX Item "@dwnngv"
       
  2864 Run the program on a representative workload to generate the arc profile
       
  2865 information. This may be repeated any number of times. You can run
       
  2866 concurrent instances of your program, and provided that the file system
       
  2867 supports locking, the data files will be correctly updated. Also
       
  2868 \&\f(CW\*(C`fork\*(C'\fR calls are detected and correctly handled (double counting
       
  2869 will not happen).
       
  2870 .IP "@exoohw" 4
       
  2871 .IX Item "@exoohw"
       
  2872 For profile-directed optimizations, compile the source files again with
       
  2873 the same optimization and code generation options plus
       
  2874 \&\fB\-fbranch\-probabilities\fR.
       
  2875 .IP "@fyppix" 4
       
  2876 .IX Item "@fyppix"
       
  2877 For test coverage analysis, use \fBgcov\fR to produce human readable
       
  2878 information from the \fI.gcno\fR and \fI.gcda\fR files. Refer to the
       
  2879 \&\fBgcov\fR documentation for further information.
       
  2880 .RE
       
  2881 .RS 4
       
  2882 .Sp
       
  2883 With \fB\-fprofile\-arcs\fR, for each function of your program \s-1GCC\s0
       
  2884 creates a program flow graph, then finds a spanning tree for the graph.
       
  2885 Only arcs that are not on the spanning tree have to be instrumented: the
       
  2886 compiler adds code to count the number of times that these arcs are
       
  2887 executed.  When an arc is the only exit or only entrance to a block, the
       
  2888 instrumentation code can be added to the block; otherwise, a new basic
       
  2889 block must be created to hold the instrumentation code.
       
  2890 .RE
       
  2891 .IP "\fB\-ftest\-coverage\fR" 4
       
  2892 .IX Item "-ftest-coverage"
       
  2893 Produce a notes file that the \fBgcov\fR code-coverage utility can use to
       
  2894 show program coverage. Each source file's note file is called
       
  2895 \&\fI\fIauxname\fI.gcno\fR. Refer to the \fB\-fprofile\-arcs\fR option
       
  2896 above for a description of \fIauxname\fR and instructions on how to
       
  2897 generate test coverage data. Coverage data will match the source files
       
  2898 more closely, if you do not optimize.
       
  2899 .IP "\fB\-d\fR\fIletters\fR" 4
       
  2900 .IX Item "-dletters"
       
  2901 Says to make debugging dumps during compilation at times specified by
       
  2902 \&\fIletters\fR.  This is used for debugging the compiler.  The file names
       
  2903 for most of the dumps are made by appending a pass number and a word to
       
  2904 the \fIdumpname\fR. \fIdumpname\fR is generated from the name of the
       
  2905 output file, if explicitly specified and it is not an executable,
       
  2906 otherwise it is the basename of the source file. In both cases any
       
  2907 suffix is removed (e.g.  \fIfoo.01.rtl\fR or \fIfoo.02.sibling\fR).
       
  2908 Here are the possible letters for use in \fIletters\fR, and their
       
  2909 meanings:
       
  2910 .RS 4
       
  2911 .IP "\fBA\fR" 4
       
  2912 .IX Item "A"
       
  2913 Annotate the assembler output with miscellaneous debugging information.
       
  2914 .IP "\fBb\fR" 4
       
  2915 .IX Item "b"
       
  2916 Dump after computing branch probabilities, to \fI\fIfile\fI.12.bp\fR.
       
  2917 .IP "\fBB\fR" 4
       
  2918 .IX Item "B"
       
  2919 Dump after block reordering, to \fI\fIfile\fI.31.bbro\fR.
       
  2920 .IP "\fBc\fR" 4
       
  2921 .IX Item "c"
       
  2922 Dump after instruction combination, to the file \fI\fIfile\fI.20.combine\fR.
       
  2923 .IP "\fBC\fR" 4
       
  2924 .IX Item "C"
       
  2925 Dump after the first if conversion, to the file \fI\fIfile\fI.14.ce1\fR.
       
  2926 Also dump after the second if conversion, to the file \fI\fIfile\fI.21.ce2\fR.
       
  2927 .IP "\fBd\fR" 4
       
  2928 .IX Item "d"
       
  2929 Dump after branch target load optimization, to to \fI\fIfile\fI.32.btl\fR.
       
  2930 Also dump after delayed branch scheduling, to \fI\fIfile\fI.36.dbr\fR.
       
  2931 .IP "\fBD\fR" 4
       
  2932 .IX Item "D"
       
  2933 Dump all macro definitions, at the end of preprocessing, in addition to
       
  2934 normal output.
       
  2935 .IP "\fBE\fR" 4
       
  2936 .IX Item "E"
       
  2937 Dump after the third if conversion, to \fI\fIfile\fI.30.ce3\fR.
       
  2938 .IP "\fBf\fR" 4
       
  2939 .IX Item "f"
       
  2940 Dump after control and data flow analysis, to \fI\fIfile\fI.11.cfg\fR.
       
  2941 Also dump after life analysis, to \fI\fIfile\fI.19.life\fR.
       
  2942 .IP "\fBF\fR" 4
       
  2943 .IX Item "F"
       
  2944 Dump after purging \f(CW\*(C`ADDRESSOF\*(C'\fR codes, to \fI\fIfile\fI.07.addressof\fR.
       
  2945 .IP "\fBg\fR" 4
       
  2946 .IX Item "g"
       
  2947 Dump after global register allocation, to \fI\fIfile\fI.25.greg\fR.
       
  2948 .IP "\fBG\fR" 4
       
  2949 .IX Item "G"
       
  2950 Dump after \s-1GCSE\s0, to \fI\fIfile\fI.08.gcse\fR.
       
  2951 Also dump after jump bypassing and control flow optimizations, to
       
  2952 \&\fI\fIfile\fI.10.bypass\fR.
       
  2953 .IP "\fBh\fR" 4
       
  2954 .IX Item "h"
       
  2955 Dump after finalization of \s-1EH\s0 handling code, to \fI\fIfile\fI.03.eh\fR.
       
  2956 .IP "\fBi\fR" 4
       
  2957 .IX Item "i"
       
  2958 Dump after sibling call optimizations, to \fI\fIfile\fI.02.sibling\fR.
       
  2959 .IP "\fBj\fR" 4
       
  2960 .IX Item "j"
       
  2961 Dump after the first jump optimization, to \fI\fIfile\fI.04.jump\fR.
       
  2962 .IP "\fBk\fR" 4
       
  2963 .IX Item "k"
       
  2964 Dump after conversion from registers to stack, to \fI\fIfile\fI.34.stack\fR.
       
  2965 .IP "\fBl\fR" 4
       
  2966 .IX Item "l"
       
  2967 Dump after local register allocation, to \fI\fIfile\fI.24.lreg\fR.
       
  2968 .IP "\fBL\fR" 4
       
  2969 .IX Item "L"
       
  2970 Dump after loop optimization passes, to \fI\fIfile\fI.09.loop\fR and
       
  2971 \&\fI\fIfile\fI.16.loop2\fR.
       
  2972 .IP "\fBM\fR" 4
       
  2973 .IX Item "M"
       
  2974 Dump after performing the machine dependent reorganization pass, to
       
  2975 \&\fI\fIfile\fI.35.mach\fR.
       
  2976 .IP "\fBn\fR" 4
       
  2977 .IX Item "n"
       
  2978 Dump after register renumbering, to \fI\fIfile\fI.29.rnreg\fR.
       
  2979 .IP "\fBN\fR" 4
       
  2980 .IX Item "N"
       
  2981 Dump after the register move pass, to \fI\fIfile\fI.22.regmove\fR.
       
  2982 .IP "\fBo\fR" 4
       
  2983 .IX Item "o"
       
  2984 Dump after post-reload optimizations, to \fI\fIfile\fI.26.postreload\fR.
       
  2985 .IP "\fBr\fR" 4
       
  2986 .IX Item "r"
       
  2987 Dump after \s-1RTL\s0 generation, to \fI\fIfile\fI.01.rtl\fR.
       
  2988 .IP "\fBR\fR" 4
       
  2989 .IX Item "R"
       
  2990 Dump after the second scheduling pass, to \fI\fIfile\fI.33.sched2\fR.
       
  2991 .IP "\fBs\fR" 4
       
  2992 .IX Item "s"
       
  2993 Dump after \s-1CSE\s0 (including the jump optimization that sometimes follows
       
  2994 \&\s-1CSE\s0), to \fI\fIfile\fI.06.cse\fR.
       
  2995 .IP "\fBS\fR" 4
       
  2996 .IX Item "S"
       
  2997 Dump after the first scheduling pass, to \fI\fIfile\fI.23.sched\fR.
       
  2998 .IP "\fBt\fR" 4
       
  2999 .IX Item "t"
       
  3000 Dump after the second \s-1CSE\s0 pass (including the jump optimization that
       
  3001 sometimes follows \s-1CSE\s0), to \fI\fIfile\fI.18.cse2\fR.
       
  3002 .IP "\fBT\fR" 4
       
  3003 .IX Item "T"
       
  3004 Dump after running tracer, to \fI\fIfile\fI.15.tracer\fR.
       
  3005 .IP "\fBu\fR" 4
       
  3006 .IX Item "u"
       
  3007 Dump after null pointer elimination pass to \fI\fIfile\fI.05.null\fR.
       
  3008 .IP "\fBU\fR" 4
       
  3009 .IX Item "U"
       
  3010 Dump callgraph and unit-at-a-time optimization \fI\fIfile\fI.00.unit\fR.
       
  3011 .IP "\fBV\fR" 4
       
  3012 .IX Item "V"
       
  3013 Dump after the value profile transformations, to \fI\fIfile\fI.13.vpt\fR.
       
  3014 .IP "\fBw\fR" 4
       
  3015 .IX Item "w"
       
  3016 Dump after the second flow pass, to \fI\fIfile\fI.27.flow2\fR.
       
  3017 .IP "\fBz\fR" 4
       
  3018 .IX Item "z"
       
  3019 Dump after the peephole pass, to \fI\fIfile\fI.28.peephole2\fR.
       
  3020 .IP "\fBZ\fR" 4
       
  3021 .IX Item "Z"
       
  3022 Dump after constructing the web, to \fI\fIfile\fI.17.web\fR.
       
  3023 .IP "\fBa\fR" 4
       
  3024 .IX Item "a"
       
  3025 Produce all the dumps listed above.
       
  3026 .IP "\fBH\fR" 4
       
  3027 .IX Item "H"
       
  3028 Produce a core dump whenever an error occurs.
       
  3029 .IP "\fBm\fR" 4
       
  3030 .IX Item "m"
       
  3031 Print statistics on memory usage, at the end of the run, to
       
  3032 standard error.
       
  3033 .IP "\fBp\fR" 4
       
  3034 .IX Item "p"
       
  3035 Annotate the assembler output with a comment indicating which
       
  3036 pattern and alternative was used.  The length of each instruction is
       
  3037 also printed.
       
  3038 .IP "\fBP\fR" 4
       
  3039 .IX Item "P"
       
  3040 Dump the \s-1RTL\s0 in the assembler output as a comment before each instruction.
       
  3041 Also turns on \fB\-dp\fR annotation.
       
  3042 .IP "\fBv\fR" 4
       
  3043 .IX Item "v"
       
  3044 For each of the other indicated dump files (except for
       
  3045 \&\fI\fIfile\fI.01.rtl\fR), dump a representation of the control flow graph
       
  3046 suitable for viewing with \s-1VCG\s0 to \fI\fIfile\fI.\fIpass\fI.vcg\fR.
       
  3047 .IP "\fBx\fR" 4
       
  3048 .IX Item "x"
       
  3049 Just generate \s-1RTL\s0 for a function instead of compiling it.  Usually used
       
  3050 with \fBr\fR.
       
  3051 .IP "\fBy\fR" 4
       
  3052 .IX Item "y"
       
  3053 Dump debugging information during parsing, to standard error.
       
  3054 .RE
       
  3055 .RS 4
       
  3056 .RE
       
  3057 .IP "\fB\-fdump\-unnumbered\fR" 4
       
  3058 .IX Item "-fdump-unnumbered"
       
  3059 When doing debugging dumps (see \fB\-d\fR option above), suppress instruction
       
  3060 numbers and line number note output.  This makes it more feasible to
       
  3061 use diff on debugging dumps for compiler invocations with different
       
  3062 options, in particular with and without \fB\-g\fR.
       
  3063 .IP "\fB\-fdump\-translation\-unit\fR (C and \*(C+ only)" 4
       
  3064 .IX Item "-fdump-translation-unit (C and  only)"
       
  3065 .PD 0
       
  3066 .IP "\fB\-fdump\-translation\-unit\-\fR\fIoptions\fR\fB \fR(C and \*(C+ only)" 4
       
  3067 .IX Item "-fdump-translation-unit-options (C and  only)"
       
  3068 .PD
       
  3069 Dump a representation of the tree structure for the entire translation
       
  3070 unit to a file.  The file name is made by appending \fI.tu\fR to the
       
  3071 source file name.  If the \fB\-\fR\fIoptions\fR form is used, \fIoptions\fR
       
  3072 controls the details of the dump as described for the
       
  3073 \&\fB\-fdump\-tree\fR options.
       
  3074 .IP "\fB\-fdump\-class\-hierarchy\fR (\*(C+ only)" 4
       
  3075 .IX Item "-fdump-class-hierarchy ( only)"
       
  3076 .PD 0
       
  3077 .IP "\fB\-fdump\-class\-hierarchy\-\fR\fIoptions\fR\fB \fR(\*(C+ only)" 4
       
  3078 .IX Item "-fdump-class-hierarchy-options ( only)"
       
  3079 .PD
       
  3080 Dump a representation of each class's hierarchy and virtual function
       
  3081 table layout to a file.  The file name is made by appending \fI.class\fR
       
  3082 to the source file name.  If the \fB\-\fR\fIoptions\fR form is used,
       
  3083 \&\fIoptions\fR controls the details of the dump as described for the
       
  3084 \&\fB\-fdump\-tree\fR options.
       
  3085 .IP "\fB\-fdump\-tree\-\fR\fIswitch\fR\fB \fR(\*(C+ only)" 4
       
  3086 .IX Item "-fdump-tree-switch ( only)"
       
  3087 .PD 0
       
  3088 .IP "\fB\-fdump\-tree\-\fR\fIswitch\fR\fB\-\fR\fIoptions\fR\fB \fR(\*(C+ only)" 4
       
  3089 .IX Item "-fdump-tree-switch-options ( only)"
       
  3090 .PD
       
  3091 Control the dumping at various stages of processing the intermediate
       
  3092 language tree to a file.  The file name is generated by appending a switch
       
  3093 specific suffix to the source file name.  If the \fB\-\fR\fIoptions\fR
       
  3094 form is used, \fIoptions\fR is a list of \fB\-\fR separated options that
       
  3095 control the details of the dump. Not all options are applicable to all
       
  3096 dumps, those which are not meaningful will be ignored. The following
       
  3097 options are available
       
  3098 .RS 4
       
  3099 .IP "\fBaddress\fR" 4
       
  3100 .IX Item "address"
       
  3101 Print the address of each node.  Usually this is not meaningful as it
       
  3102 changes according to the environment and source file. Its primary use
       
  3103 is for tying up a dump file with a debug environment.
       
  3104 .IP "\fBslim\fR" 4
       
  3105 .IX Item "slim"
       
  3106 Inhibit dumping of members of a scope or body of a function merely
       
  3107 because that scope has been reached. Only dump such items when they
       
  3108 are directly reachable by some other path.
       
  3109 .IP "\fBall\fR" 4
       
  3110 .IX Item "all"
       
  3111 Turn on all options.
       
  3112 .RE
       
  3113 .RS 4
       
  3114 .Sp
       
  3115 The following tree dumps are possible:
       
  3116 .IP "\fBoriginal\fR" 4
       
  3117 .IX Item "original"
       
  3118 Dump before any tree based optimization, to \fI\fIfile\fI.original\fR.
       
  3119 .IP "\fBoptimized\fR" 4
       
  3120 .IX Item "optimized"
       
  3121 Dump after all tree based optimization, to \fI\fIfile\fI.optimized\fR.
       
  3122 .IP "\fBinlined\fR" 4
       
  3123 .IX Item "inlined"
       
  3124 Dump after function inlining, to \fI\fIfile\fI.inlined\fR.
       
  3125 .RE
       
  3126 .RS 4
       
  3127 .RE
       
  3128 .IP "\fB\-frandom\-seed=\fR\fIstring\fR" 4
       
  3129 .IX Item "-frandom-seed=string"
       
  3130 This option provides a seed that \s-1GCC\s0 uses when it would otherwise use
       
  3131 random numbers.  It is used to generate certain symbol names
       
  3132 that have to be different in every compiled file. It is also used to
       
  3133 place unique stamps in coverage data files and the object files that
       
  3134 produce them. You can use the \fB\-frandom\-seed\fR option to produce
       
  3135 reproducibly identical object files.
       
  3136 .Sp
       
  3137 The \fIstring\fR should be different for every file you compile.
       
  3138 .IP "\fB\-fsched\-verbose=\fR\fIn\fR" 4
       
  3139 .IX Item "-fsched-verbose=n"
       
  3140 On targets that use instruction scheduling, this option controls the
       
  3141 amount of debugging output the scheduler prints.  This information is
       
  3142 written to standard error, unless \fB\-dS\fR or \fB\-dR\fR is
       
  3143 specified, in which case it is output to the usual dump
       
  3144 listing file, \fI.sched\fR or \fI.sched2\fR respectively.  However
       
  3145 for \fIn\fR greater than nine, the output is always printed to standard
       
  3146 error.
       
  3147 .Sp
       
  3148 For \fIn\fR greater than zero, \fB\-fsched\-verbose\fR outputs the
       
  3149 same information as \fB\-dRS\fR.  For \fIn\fR greater than one, it
       
  3150 also output basic block probabilities, detailed ready list information
       
  3151 and unit/insn info.  For \fIn\fR greater than two, it includes \s-1RTL\s0
       
  3152 at abort point, control-flow and regions info.  And for \fIn\fR over
       
  3153 four, \fB\-fsched\-verbose\fR also includes dependence info.
       
  3154 .IP "\fB\-save\-temps\fR" 4
       
  3155 .IX Item "-save-temps"
       
  3156 Store the usual ``temporary'' intermediate files permanently; place them
       
  3157 in the current directory and name them based on the source file.  Thus,
       
  3158 compiling \fIfoo.c\fR with \fB\-c \-save\-temps\fR would produce files
       
  3159 \&\fIfoo.i\fR and \fIfoo.s\fR, as well as \fIfoo.o\fR.  This creates a
       
  3160 preprocessed \fIfoo.i\fR output file even though the compiler now
       
  3161 normally uses an integrated preprocessor.
       
  3162 .IP "\fB\-time\fR" 4
       
  3163 .IX Item "-time"
       
  3164 Report the \s-1CPU\s0 time taken by each subprocess in the compilation
       
  3165 sequence.  For C source files, this is the compiler proper and assembler
       
  3166 (plus the linker if linking is done).  The output looks like this:
       
  3167 .Sp
       
  3168 .Vb 2
       
  3169 \&        # cc1 0.12 0.01
       
  3170 \&        # as 0.00 0.01
       
  3171 .Ve
       
  3172 .Sp
       
  3173 The first number on each line is the ``user time,'' that is time spent
       
  3174 executing the program itself.  The second number is ``system time,''
       
  3175 time spent executing operating system routines on behalf of the program.
       
  3176 Both numbers are in seconds.
       
  3177 .IP "\fB\-print\-file\-name=\fR\fIlibrary\fR" 4
       
  3178 .IX Item "-print-file-name=library"
       
  3179 Print the full absolute name of the library file \fIlibrary\fR that
       
  3180 would be used when linking\-\-\-and don't do anything else.  With this
       
  3181 option, \s-1GCC\s0 does not compile or link anything; it just prints the
       
  3182 file name.
       
  3183 .IP "\fB\-print\-multi\-directory\fR" 4
       
  3184 .IX Item "-print-multi-directory"
       
  3185 Print the directory name corresponding to the multilib selected by any
       
  3186 other switches present in the command line.  This directory is supposed
       
  3187 to exist in \fB\s-1GCC_EXEC_PREFIX\s0\fR.
       
  3188 .IP "\fB\-print\-multi\-lib\fR" 4
       
  3189 .IX Item "-print-multi-lib"
       
  3190 Print the mapping from multilib directory names to compiler switches
       
  3191 that enable them.  The directory name is separated from the switches by
       
  3192 \&\fB;\fR, and each switch starts with an \fB@} instead of the
       
  3193 \&\f(CB@samp\fB{\-\fR, without spaces between multiple switches.  This is supposed to
       
  3194 ease shell\-processing.
       
  3195 .IP "\fB\-print\-prog\-name=\fR\fIprogram\fR" 4
       
  3196 .IX Item "-print-prog-name=program"
       
  3197 Like \fB\-print\-file\-name\fR, but searches for a program such as \fBcpp\fR.
       
  3198 .IP "\fB\-print\-libgcc\-file\-name\fR" 4
       
  3199 .IX Item "-print-libgcc-file-name"
       
  3200 Same as \fB\-print\-file\-name=libgcc.a\fR.
       
  3201 .Sp
       
  3202 This is useful when you use \fB\-nostdlib\fR or \fB\-nodefaultlibs\fR
       
  3203 but you do want to link with \fIlibgcc.a\fR.  You can do
       
  3204 .Sp
       
  3205 .Vb 1
       
  3206 \&        gcc -nostdlib <files>... `gcc -print-libgcc-file-name`
       
  3207 .Ve
       
  3208 .IP "\fB\-print\-search\-dirs\fR" 4
       
  3209 .IX Item "-print-search-dirs"
       
  3210 Print the name of the configured installation directory and a list of
       
  3211 program and library directories \fBgcc\fR will search\-\-\-and don't do anything else.
       
  3212 .Sp
       
  3213 This is useful when \fBgcc\fR prints the error message
       
  3214 \&\fBinstallation problem, cannot exec cpp0: No such file or directory\fR.
       
  3215 To resolve this you either need to put \fIcpp0\fR and the other compiler
       
  3216 components where \fBgcc\fR expects to find them, or you can set the environment
       
  3217 variable \fB\s-1GCC_EXEC_PREFIX\s0\fR to the directory where you installed them.
       
  3218 Don't forget the trailing '/'.
       
  3219 .IP "\fB\-dumpmachine\fR" 4
       
  3220 .IX Item "-dumpmachine"
       
  3221 Print the compiler's target machine (for example,
       
  3222 \&\fBi686\-pc\-linux\-gnu\fR)\-\-\-and don't do anything else.
       
  3223 .IP "\fB\-dumpversion\fR" 4
       
  3224 .IX Item "-dumpversion"
       
  3225 Print the compiler version (for example, \fB3.0\fR)\-\-\-and don't do
       
  3226 anything else.
       
  3227 .IP "\fB\-dumpspecs\fR" 4
       
  3228 .IX Item "-dumpspecs"
       
  3229 Print the compiler's built-in specs\-\-\-and don't do anything else.  (This
       
  3230 is used when \s-1GCC\s0 itself is being built.)  
       
  3231 .IP "\fB\-feliminate\-unused\-debug\-types\fR" 4
       
  3232 .IX Item "-feliminate-unused-debug-types"
       
  3233 Normally, when producing \s-1DWARF2\s0 output, \s-1GCC\s0 will emit debugging
       
  3234 information for all types declared in a compilation
       
  3235 unit, regardless of whether or not they are actually used
       
  3236 in that compilation unit.  Sometimes this is useful, such as
       
  3237 if, in the debugger, you want to cast a value to a type that is
       
  3238 not actually used in your program (but is declared).  More often,
       
  3239 however, this results in a significant amount of wasted space.
       
  3240 With this option, \s-1GCC\s0 will avoid producing debug symbol output
       
  3241 for types that are nowhere used in the source file being compiled.
       
  3242 .Sh "Options That Control Optimization"
       
  3243 .IX Subsection "Options That Control Optimization"
       
  3244 These options control various sorts of optimizations.
       
  3245 .PP
       
  3246 Without any optimization option, the compiler's goal is to reduce the
       
  3247 cost of compilation and to make debugging produce the expected
       
  3248 results.  Statements are independent: if you stop the program with a
       
  3249 breakpoint between statements, you can then assign a new value to any
       
  3250 variable or change the program counter to any other statement in the
       
  3251 function and get exactly the results you would expect from the source
       
  3252 code.
       
  3253 .PP
       
  3254 Turning on optimization flags makes the compiler attempt to improve
       
  3255 the performance and/or code size at the expense of compilation time
       
  3256 and possibly the ability to debug the program.
       
  3257 .PP
       
  3258 The compiler performs optimization based on the knowledge it has of
       
  3259 the program.  Using the \fB\-funit\-at\-a\-time\fR flag will allow the
       
  3260 compiler to consider information gained from later functions in the
       
  3261 file when compiling a function.  Compiling multiple files at once to a
       
  3262 single output file (and using \fB\-funit\-at\-a\-time\fR) will allow
       
  3263 the compiler to use information gained from all of the files when
       
  3264 compiling each of them.
       
  3265 .PP
       
  3266 Not all optimizations are controlled directly by a flag.  Only
       
  3267 optimizations that have a flag are listed.
       
  3268 .IP "\fB\-O\fR" 4
       
  3269 .IX Item "-O"
       
  3270 .PD 0
       
  3271 .IP "\fB\-O1\fR" 4
       
  3272 .IX Item "-O1"
       
  3273 .PD
       
  3274 Optimize.  Optimizing compilation takes somewhat more time, and a lot
       
  3275 more memory for a large function.
       
  3276 .Sp
       
  3277 With \fB\-O\fR, the compiler tries to reduce code size and execution
       
  3278 time, without performing any optimizations that take a great deal of
       
  3279 compilation time.
       
  3280 .Sp
       
  3281 \&\fB\-O\fR turns on the following optimization flags:
       
  3282 \&\fB\-fdefer\-pop 
       
  3283 \&\-fmerge\-constants 
       
  3284 \&\-fthread\-jumps 
       
  3285 \&\-floop\-optimize 
       
  3286 \&\-fif\-conversion 
       
  3287 \&\-fif\-conversion2 
       
  3288 \&\-fdelayed\-branch 
       
  3289 \&\-fguess\-branch\-probability 
       
  3290 \&\-fcprop\-registers\fR
       
  3291 .Sp
       
  3292 \&\fB\-O\fR also turns on \fB\-fomit\-frame\-pointer\fR on machines
       
  3293 where doing so does not interfere with debugging.
       
  3294 .IP "\fB\-O2\fR" 4
       
  3295 .IX Item "-O2"
       
  3296 Optimize even more.  \s-1GCC\s0 performs nearly all supported optimizations
       
  3297 that do not involve a space-speed tradeoff.  The compiler does not
       
  3298 perform loop unrolling or function inlining when you specify \fB\-O2\fR.
       
  3299 As compared to \fB\-O\fR, this option increases both compilation time
       
  3300 and the performance of the generated code.
       
  3301 .Sp
       
  3302 \&\fB\-O2\fR turns on all optimization flags specified by \fB\-O\fR.  It
       
  3303 also turns on the following optimization flags:
       
  3304 \&\fB\-fforce\-mem 
       
  3305 \&\-foptimize\-sibling\-calls 
       
  3306 \&\-fstrength\-reduce 
       
  3307 \&\-fcse\-follow\-jumps  \-fcse\-skip\-blocks 
       
  3308 \&\-frerun\-cse\-after\-loop  \-frerun\-loop\-opt 
       
  3309 \&\-fgcse  \-fgcse\-lm  \-fgcse\-sm  \-fgcse\-las 
       
  3310 \&\-fdelete\-null\-pointer\-checks 
       
  3311 \&\-fexpensive\-optimizations 
       
  3312 \&\-fregmove 
       
  3313 \&\-fschedule\-insns  \-fschedule\-insns2 
       
  3314 \&\-fsched\-interblock  \-fsched\-spec 
       
  3315 \&\-fcaller\-saves 
       
  3316 \&\-fpeephole2 
       
  3317 \&\-freorder\-blocks  \-freorder\-functions 
       
  3318 \&\-fstrict\-aliasing 
       
  3319 \&\-funit\-at\-a\-time 
       
  3320 \&\-falign\-functions  \-falign\-jumps 
       
  3321 \&\-falign\-loops  \-falign\-labels 
       
  3322 \&\-fcrossjumping\fR
       
  3323 .Sp
       
  3324 Please note the warning under \fB\-fgcse\fR about
       
  3325 invoking \fB\-O2\fR on programs that use computed gotos.
       
  3326 .IP "\fB\-O3\fR" 4
       
  3327 .IX Item "-O3"
       
  3328 Optimize yet more.  \fB\-O3\fR turns on all optimizations specified by
       
  3329 \&\fB\-O2\fR and also turns on the \fB\-finline\-functions\fR,
       
  3330 \&\fB\-fweb\fR and \fB\-frename\-registers\fR options.
       
  3331 .IP "\fB\-O0\fR" 4
       
  3332 .IX Item "-O0"
       
  3333 Do not optimize.  This is the default.
       
  3334 .IP "\fB\-Os\fR" 4
       
  3335 .IX Item "-Os"
       
  3336 Optimize for size.  \fB\-Os\fR enables all \fB\-O2\fR optimizations that
       
  3337 do not typically increase code size.  It also performs further
       
  3338 optimizations designed to reduce code size.
       
  3339 .Sp
       
  3340 \&\fB\-Os\fR disables the following optimization flags:
       
  3341 \&\fB\-falign\-functions  \-falign\-jumps  \-falign\-loops 
       
  3342 \&\-falign\-labels  \-freorder\-blocks  \-fprefetch\-loop\-arrays\fR
       
  3343 .Sp
       
  3344 If you use multiple \fB\-O\fR options, with or without level numbers,
       
  3345 the last such option is the one that is effective.
       
  3346 .PP
       
  3347 Options of the form \fB\-f\fR\fIflag\fR specify machine-independent
       
  3348 flags.  Most flags have both positive and negative forms; the negative
       
  3349 form of \fB\-ffoo\fR would be \fB\-fno\-foo\fR.  In the table
       
  3350 below, only one of the forms is listed\-\-\-the one you typically will
       
  3351 use.  You can figure out the other form by either removing \fBno\-\fR
       
  3352 or adding it.
       
  3353 .PP
       
  3354 The following options control specific optimizations.  They are either
       
  3355 activated by \fB\-O\fR options or are related to ones that are.  You
       
  3356 can use the following flags in the rare cases when ``fine\-tuning'' of
       
  3357 optimizations to be performed is desired.
       
  3358 .IP "\fB\-fno\-default\-inline\fR" 4
       
  3359 .IX Item "-fno-default-inline"
       
  3360 Do not make member functions inline by default merely because they are
       
  3361 defined inside the class scope (\*(C+ only).  Otherwise, when you specify
       
  3362 \&\fB\-O\fR, member functions defined inside class scope are compiled
       
  3363 inline by default; i.e., you don't need to add \fBinline\fR in front of
       
  3364 the member function name.
       
  3365 .IP "\fB\-fno\-defer\-pop\fR" 4
       
  3366 .IX Item "-fno-defer-pop"
       
  3367 Always pop the arguments to each function call as soon as that function
       
  3368 returns.  For machines which must pop arguments after a function call,
       
  3369 the compiler normally lets arguments accumulate on the stack for several
       
  3370 function calls and pops them all at once.
       
  3371 .Sp
       
  3372 Disabled at levels \fB\-O\fR, \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
       
  3373 .IP "\fB\-fforce\-mem\fR" 4
       
  3374 .IX Item "-fforce-mem"
       
  3375 Force memory operands to be copied into registers before doing
       
  3376 arithmetic on them.  This produces better code by making all memory
       
  3377 references potential common subexpressions.  When they are not common
       
  3378 subexpressions, instruction combination should eliminate the separate
       
  3379 register\-load.
       
  3380 .Sp
       
  3381 Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
       
  3382 .IP "\fB\-fforce\-addr\fR" 4
       
  3383 .IX Item "-fforce-addr"
       
  3384 Force memory address constants to be copied into registers before
       
  3385 doing arithmetic on them.  This may produce better code just as
       
  3386 \&\fB\-fforce\-mem\fR may.
       
  3387 .IP "\fB\-fomit\-frame\-pointer\fR" 4
       
  3388 .IX Item "-fomit-frame-pointer"
       
  3389 Don't keep the frame pointer in a register for functions that
       
  3390 don't need one.  This avoids the instructions to save, set up and
       
  3391 restore frame pointers; it also makes an extra register available
       
  3392 in many functions.  \fBIt also makes debugging impossible on
       
  3393 some machines.\fR
       
  3394 .Sp
       
  3395 On some machines, such as the \s-1VAX\s0, this flag has no effect, because
       
  3396 the standard calling sequence automatically handles the frame pointer
       
  3397 and nothing is saved by pretending it doesn't exist.  The
       
  3398 machine-description macro \f(CW\*(C`FRAME_POINTER_REQUIRED\*(C'\fR controls
       
  3399 whether a target machine supports this flag.  
       
  3400 .Sp
       
  3401 Enabled at levels \fB\-O\fR, \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
       
  3402 .IP "\fB\-foptimize\-sibling\-calls\fR" 4
       
  3403 .IX Item "-foptimize-sibling-calls"
       
  3404 Optimize sibling and tail recursive calls.
       
  3405 .Sp
       
  3406 Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
       
  3407 .IP "\fB\-fno\-inline\fR" 4
       
  3408 .IX Item "-fno-inline"
       
  3409 Don't pay attention to the \f(CW\*(C`inline\*(C'\fR keyword.  Normally this option
       
  3410 is used to keep the compiler from expanding any functions inline.
       
  3411 Note that if you are not optimizing, no functions can be expanded inline.
       
  3412 .IP "\fB\-finline\-functions\fR" 4
       
  3413 .IX Item "-finline-functions"
       
  3414 Integrate all simple functions into their callers.  The compiler
       
  3415 heuristically decides which functions are simple enough to be worth
       
  3416 integrating in this way.
       
  3417 .Sp
       
  3418 If all calls to a given function are integrated, and the function is
       
  3419 declared \f(CW\*(C`static\*(C'\fR, then the function is normally not output as
       
  3420 assembler code in its own right.
       
  3421 .Sp
       
  3422 Enabled at level \fB\-O3\fR.
       
  3423 .IP "\fB\-finline\-limit=\fR\fIn\fR" 4
       
  3424 .IX Item "-finline-limit=n"
       
  3425 By default, \s-1GCC\s0 limits the size of functions that can be inlined.  This flag
       
  3426 allows the control of this limit for functions that are explicitly marked as
       
  3427 inline (i.e., marked with the inline keyword or defined within the class
       
  3428 definition in c++).  \fIn\fR is the size of functions that can be inlined in
       
  3429 number of pseudo instructions (not counting parameter handling).  The default
       
  3430 value of \fIn\fR is 600.
       
  3431 Increasing this value can result in more inlined code at
       
  3432 the cost of compilation time and memory consumption.  Decreasing usually makes
       
  3433 the compilation faster and less code will be inlined (which presumably
       
  3434 means slower programs).  This option is particularly useful for programs that
       
  3435 use inlining heavily such as those based on recursive templates with \*(C+.
       
  3436 .Sp
       
  3437 Inlining is actually controlled by a number of parameters, which may be
       
  3438 specified individually by using \fB\-\-param\fR \fIname\fR\fB=\fR\fIvalue\fR.
       
  3439 The \fB\-finline\-limit=\fR\fIn\fR option sets some of these parameters
       
  3440 as follows:
       
  3441 .RS 4
       
  3442 .Sp
       
  3443 .Vb 8
       
  3444 \& @item max-inline-insns-single
       
  3445 \&  is set to I<n>/2.
       
  3446 \& @item max-inline-insns-auto
       
  3447 \&  is set to I<n>/2.
       
  3448 \& @item min-inline-insns
       
  3449 \&  is set to 130 or I<n>/4, whichever is smaller.
       
  3450 \& @item max-inline-insns-rtl
       
  3451 \&  is set to I<n>.
       
  3452 .Ve
       
  3453 .RE
       
  3454 .RS 4
       
  3455 .Sp
       
  3456 See below for a documentation of the individual
       
  3457 parameters controlling inlining.
       
  3458 .Sp
       
  3459 \&\fINote:\fR pseudo instruction represents, in this particular context, an
       
  3460 abstract measurement of function's size.  In no way, it represents a count
       
  3461 of assembly instructions and as such its exact meaning might change from one
       
  3462 release to an another.
       
  3463 .RE
       
  3464 .IP "\fB\-fkeep\-inline\-functions\fR" 4
       
  3465 .IX Item "-fkeep-inline-functions"
       
  3466 Even if all calls to a given function are integrated, and the function
       
  3467 is declared \f(CW\*(C`static\*(C'\fR, nevertheless output a separate run-time
       
  3468 callable version of the function.  This switch does not affect
       
  3469 \&\f(CW\*(C`extern inline\*(C'\fR functions.
       
  3470 .IP "\fB\-fkeep\-static\-consts\fR" 4
       
  3471 .IX Item "-fkeep-static-consts"
       
  3472 Emit variables declared \f(CW\*(C`static const\*(C'\fR when optimization isn't turned
       
  3473 on, even if the variables aren't referenced.
       
  3474 .Sp
       
  3475 \&\s-1GCC\s0 enables this option by default.  If you want to force the compiler to
       
  3476 check if the variable was referenced, regardless of whether or not
       
  3477 optimization is turned on, use the \fB\-fno\-keep\-static\-consts\fR option.
       
  3478 .IP "\fB\-fmerge\-constants\fR" 4
       
  3479 .IX Item "-fmerge-constants"
       
  3480 Attempt to merge identical constants (string constants and floating point
       
  3481 constants) across compilation units.
       
  3482 .Sp
       
  3483 This option is the default for optimized compilation if the assembler and
       
  3484 linker support it.  Use \fB\-fno\-merge\-constants\fR to inhibit this
       
  3485 behavior.
       
  3486 .Sp
       
  3487 Enabled at levels \fB\-O\fR, \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
       
  3488 .IP "\fB\-fmerge\-all\-constants\fR" 4
       
  3489 .IX Item "-fmerge-all-constants"
       
  3490 Attempt to merge identical constants and identical variables.
       
  3491 .Sp
       
  3492 This option implies \fB\-fmerge\-constants\fR.  In addition to
       
  3493 \&\fB\-fmerge\-constants\fR this considers e.g. even constant initialized
       
  3494 arrays or initialized constant variables with integral or floating point
       
  3495 types.  Languages like C or \*(C+ require each non-automatic variable to
       
  3496 have distinct location, so using this option will result in non-conforming
       
  3497 behavior.
       
  3498 .IP "\fB\-fnew\-ra\fR" 4
       
  3499 .IX Item "-fnew-ra"
       
  3500 Use a graph coloring register allocator.  Currently this option is meant
       
  3501 only for testing.  Users should not specify this option, since it is not
       
  3502 yet ready for production use.
       
  3503 .IP "\fB\-fno\-branch\-count\-reg\fR" 4
       
  3504 .IX Item "-fno-branch-count-reg"
       
  3505 Do not use ``decrement and branch'' instructions on a count register,
       
  3506 but instead generate a sequence of instructions that decrement a
       
  3507 register, compare it against zero, then branch based upon the result.
       
  3508 This option is only meaningful on architectures that support such
       
  3509 instructions, which include x86, PowerPC, \s-1IA\-64\s0 and S/390.
       
  3510 .Sp
       
  3511 The default is \fB\-fbranch\-count\-reg\fR, enabled when
       
  3512 \&\fB\-fstrength\-reduce\fR is enabled.
       
  3513 .IP "\fB\-fno\-function\-cse\fR" 4
       
  3514 .IX Item "-fno-function-cse"
       
  3515 Do not put function addresses in registers; make each instruction that
       
  3516 calls a constant function contain the function's address explicitly.
       
  3517 .Sp
       
  3518 This option results in less efficient code, but some strange hacks
       
  3519 that alter the assembler output may be confused by the optimizations
       
  3520 performed when this option is not used.
       
  3521 .Sp
       
  3522 The default is \fB\-ffunction\-cse\fR
       
  3523 .IP "\fB\-fno\-zero\-initialized\-in\-bss\fR" 4
       
  3524 .IX Item "-fno-zero-initialized-in-bss"
       
  3525 If the target supports a \s-1BSS\s0 section, \s-1GCC\s0 by default puts variables that
       
  3526 are initialized to zero into \s-1BSS\s0.  This can save space in the resulting
       
  3527 code.
       
  3528 .Sp
       
  3529 This option turns off this behavior because some programs explicitly
       
  3530 rely on variables going to the data section.  E.g., so that the
       
  3531 resulting executable can find the beginning of that section and/or make
       
  3532 assumptions based on that.
       
  3533 .Sp
       
  3534 The default is \fB\-fzero\-initialized\-in\-bss\fR.
       
  3535 .IP "\fB\-fstrength\-reduce\fR" 4
       
  3536 .IX Item "-fstrength-reduce"
       
  3537 Perform the optimizations of loop strength reduction and
       
  3538 elimination of iteration variables.
       
  3539 .Sp
       
  3540 Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
       
  3541 .IP "\fB\-fthread\-jumps\fR" 4
       
  3542 .IX Item "-fthread-jumps"
       
  3543 Perform optimizations where we check to see if a jump branches to a
       
  3544 location where another comparison subsumed by the first is found.  If
       
  3545 so, the first branch is redirected to either the destination of the
       
  3546 second branch or a point immediately following it, depending on whether
       
  3547 the condition is known to be true or false.
       
  3548 .Sp
       
  3549 Enabled at levels \fB\-O\fR, \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
       
  3550 .IP "\fB\-fcse\-follow\-jumps\fR" 4
       
  3551 .IX Item "-fcse-follow-jumps"
       
  3552 In common subexpression elimination, scan through jump instructions
       
  3553 when the target of the jump is not reached by any other path.  For
       
  3554 example, when \s-1CSE\s0 encounters an \f(CW\*(C`if\*(C'\fR statement with an
       
  3555 \&\f(CW\*(C`else\*(C'\fR clause, \s-1CSE\s0 will follow the jump when the condition
       
  3556 tested is false.
       
  3557 .Sp
       
  3558 Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
       
  3559 .IP "\fB\-fcse\-skip\-blocks\fR" 4
       
  3560 .IX Item "-fcse-skip-blocks"
       
  3561 This is similar to \fB\-fcse\-follow\-jumps\fR, but causes \s-1CSE\s0 to
       
  3562 follow jumps which conditionally skip over blocks.  When \s-1CSE\s0
       
  3563 encounters a simple \f(CW\*(C`if\*(C'\fR statement with no else clause,
       
  3564 \&\fB\-fcse\-skip\-blocks\fR causes \s-1CSE\s0 to follow the jump around the
       
  3565 body of the \f(CW\*(C`if\*(C'\fR.
       
  3566 .Sp
       
  3567 Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
       
  3568 .IP "\fB\-frerun\-cse\-after\-loop\fR" 4
       
  3569 .IX Item "-frerun-cse-after-loop"
       
  3570 Re-run common subexpression elimination after loop optimizations has been
       
  3571 performed.
       
  3572 .Sp
       
  3573 Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
       
  3574 .IP "\fB\-frerun\-loop\-opt\fR" 4
       
  3575 .IX Item "-frerun-loop-opt"
       
  3576 Run the loop optimizer twice.
       
  3577 .Sp
       
  3578 Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
       
  3579 .IP "\fB\-fgcse\fR" 4
       
  3580 .IX Item "-fgcse"
       
  3581 Perform a global common subexpression elimination pass.
       
  3582 This pass also performs global constant and copy propagation.
       
  3583 .Sp
       
  3584 \&\fINote:\fR When compiling a program using computed gotos, a \s-1GCC\s0
       
  3585 extension, you may get better runtime performance if you disable
       
  3586 the global common subexpression elimination pass by adding
       
  3587 \&\fB\-fno\-gcse\fR to the command line.
       
  3588 .Sp
       
  3589 Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
       
  3590 .IP "\fB\-fgcse\-lm\fR" 4
       
  3591 .IX Item "-fgcse-lm"
       
  3592 When \fB\-fgcse\-lm\fR is enabled, global common subexpression elimination will
       
  3593 attempt to move loads which are only killed by stores into themselves.  This
       
  3594 allows a loop containing a load/store sequence to be changed to a load outside
       
  3595 the loop, and a copy/store within the loop.
       
  3596 .Sp
       
  3597 Enabled by default when gcse is enabled.
       
  3598 .IP "\fB\-fgcse\-sm\fR" 4
       
  3599 .IX Item "-fgcse-sm"
       
  3600 When \fB\-fgcse\-sm\fR is enabled, a store motion pass is run after
       
  3601 global common subexpression elimination.  This pass will attempt to move
       
  3602 stores out of loops.  When used in conjunction with \fB\-fgcse\-lm\fR,
       
  3603 loops containing a load/store sequence can be changed to a load before
       
  3604 the loop and a store after the loop.
       
  3605 .Sp
       
  3606 Enabled by default when gcse is enabled.
       
  3607 .IP "\fB\-fgcse\-las\fR" 4
       
  3608 .IX Item "-fgcse-las"
       
  3609 When \fB\-fgcse\-las\fR is enabled, the global common subexpression
       
  3610 elimination pass eliminates redundant loads that come after stores to the
       
  3611 same memory location (both partial and full redundancies).
       
  3612 .Sp
       
  3613 Enabled by default when gcse is enabled.
       
  3614 .IP "\fB\-floop\-optimize\fR" 4
       
  3615 .IX Item "-floop-optimize"
       
  3616 Perform loop optimizations: move constant expressions out of loops, simplify
       
  3617 exit test conditions and optionally do strength-reduction and loop unrolling as
       
  3618 well.
       
  3619 .Sp
       
  3620 Enabled at levels \fB\-O\fR, \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
       
  3621 .IP "\fB\-fcrossjumping\fR" 4
       
  3622 .IX Item "-fcrossjumping"
       
  3623 Perform cross-jumping transformation. This transformation unifies equivalent code and save code size. The
       
  3624 resulting code may or may not perform better than without cross\-jumping.
       
  3625 .Sp
       
  3626 Enabled at levels \fB\-O\fR, \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
       
  3627 .IP "\fB\-fif\-conversion\fR" 4
       
  3628 .IX Item "-fif-conversion"
       
  3629 Attempt to transform conditional jumps into branch-less equivalents.  This
       
  3630 include use of conditional moves, min, max, set flags and abs instructions, and
       
  3631 some tricks doable by standard arithmetics.  The use of conditional execution
       
  3632 on chips where it is available is controlled by \f(CW\*(C`if\-conversion2\*(C'\fR.
       
  3633 .Sp
       
  3634 Enabled at levels \fB\-O\fR, \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
       
  3635 .IP "\fB\-fif\-conversion2\fR" 4
       
  3636 .IX Item "-fif-conversion2"
       
  3637 Use conditional execution (where available) to transform conditional jumps into
       
  3638 branch-less equivalents.
       
  3639 .Sp
       
  3640 Enabled at levels \fB\-O\fR, \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
       
  3641 .IP "\fB\-fdelete\-null\-pointer\-checks\fR" 4
       
  3642 .IX Item "-fdelete-null-pointer-checks"
       
  3643 Use global dataflow analysis to identify and eliminate useless checks
       
  3644 for null pointers.  The compiler assumes that dereferencing a null
       
  3645 pointer would have halted the program.  If a pointer is checked after
       
  3646 it has already been dereferenced, it cannot be null.
       
  3647 .Sp
       
  3648 In some environments, this assumption is not true, and programs can
       
  3649 safely dereference null pointers.  Use
       
  3650 \&\fB\-fno\-delete\-null\-pointer\-checks\fR to disable this optimization
       
  3651 for programs which depend on that behavior.
       
  3652 .Sp
       
  3653 Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
       
  3654 .IP "\fB\-fexpensive\-optimizations\fR" 4
       
  3655 .IX Item "-fexpensive-optimizations"
       
  3656 Perform a number of minor optimizations that are relatively expensive.
       
  3657 .Sp
       
  3658 Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
       
  3659 .IP "\fB\-foptimize\-register\-move\fR" 4
       
  3660 .IX Item "-foptimize-register-move"
       
  3661 .PD 0
       
  3662 .IP "\fB\-fregmove\fR" 4
       
  3663 .IX Item "-fregmove"
       
  3664 .PD
       
  3665 Attempt to reassign register numbers in move instructions and as
       
  3666 operands of other simple instructions in order to maximize the amount of
       
  3667 register tying.  This is especially helpful on machines with two-operand
       
  3668 instructions.
       
  3669 .Sp
       
  3670 Note \fB\-fregmove\fR and \fB\-foptimize\-register\-move\fR are the same
       
  3671 optimization.
       
  3672 .Sp
       
  3673 Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
       
  3674 .IP "\fB\-fdelayed\-branch\fR" 4
       
  3675 .IX Item "-fdelayed-branch"
       
  3676 If supported for the target machine, attempt to reorder instructions
       
  3677 to exploit instruction slots available after delayed branch
       
  3678 instructions.
       
  3679 .Sp
       
  3680 Enabled at levels \fB\-O\fR, \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
       
  3681 .IP "\fB\-fschedule\-insns\fR" 4
       
  3682 .IX Item "-fschedule-insns"
       
  3683 If supported for the target machine, attempt to reorder instructions to
       
  3684 eliminate execution stalls due to required data being unavailable.  This
       
  3685 helps machines that have slow floating point or memory load instructions
       
  3686 by allowing other instructions to be issued until the result of the load
       
  3687 or floating point instruction is required.
       
  3688 .Sp
       
  3689 Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
       
  3690 .IP "\fB\-fschedule\-insns2\fR" 4
       
  3691 .IX Item "-fschedule-insns2"
       
  3692 Similar to \fB\-fschedule\-insns\fR, but requests an additional pass of
       
  3693 instruction scheduling after register allocation has been done.  This is
       
  3694 especially useful on machines with a relatively small number of
       
  3695 registers and where memory load instructions take more than one cycle.
       
  3696 .Sp
       
  3697 Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
       
  3698 .IP "\fB\-fno\-sched\-interblock\fR" 4
       
  3699 .IX Item "-fno-sched-interblock"
       
  3700 Don't schedule instructions across basic blocks.  This is normally
       
  3701 enabled by default when scheduling before register allocation, i.e.
       
  3702 with \fB\-fschedule\-insns\fR or at \fB\-O2\fR or higher.
       
  3703 .IP "\fB\-fno\-sched\-spec\fR" 4
       
  3704 .IX Item "-fno-sched-spec"
       
  3705 Don't allow speculative motion of non-load instructions.  This is normally
       
  3706 enabled by default when scheduling before register allocation, i.e.
       
  3707 with \fB\-fschedule\-insns\fR or at \fB\-O2\fR or higher.
       
  3708 .IP "\fB\-fsched\-spec\-load\fR" 4
       
  3709 .IX Item "-fsched-spec-load"
       
  3710 Allow speculative motion of some load instructions.  This only makes
       
  3711 sense when scheduling before register allocation, i.e. with
       
  3712 \&\fB\-fschedule\-insns\fR or at \fB\-O2\fR or higher.
       
  3713 .IP "\fB\-fsched\-spec\-load\-dangerous\fR" 4
       
  3714 .IX Item "-fsched-spec-load-dangerous"
       
  3715 Allow speculative motion of more load instructions.  This only makes
       
  3716 sense when scheduling before register allocation, i.e. with
       
  3717 \&\fB\-fschedule\-insns\fR or at \fB\-O2\fR or higher.
       
  3718 .IP "\fB\-fsched\-stalled\-insns=\fR\fIn\fR" 4
       
  3719 .IX Item "-fsched-stalled-insns=n"
       
  3720 Define how many insns (if any) can be moved prematurely from the queue
       
  3721 of stalled insns into the ready list, during the second scheduling pass.
       
  3722 .IP "\fB\-fsched\-stalled\-insns\-dep=\fR\fIn\fR" 4
       
  3723 .IX Item "-fsched-stalled-insns-dep=n"
       
  3724 Define how many insn groups (cycles) will be examined for a dependency
       
  3725 on a stalled insn that is candidate for premature removal from the queue
       
  3726 of stalled insns.  Has an effect only during the second scheduling pass,
       
  3727 and only if \fB\-fsched\-stalled\-insns\fR is used and its value is not zero.
       
  3728 .IP "\fB\-fsched2\-use\-superblocks\fR" 4
       
  3729 .IX Item "-fsched2-use-superblocks"
       
  3730 When scheduling after register allocation, do use superblock scheduling
       
  3731 algorithm.  Superblock scheduling allows motion across basic block boundaries
       
  3732 resulting on faster schedules.  This option is experimental, as not all machine
       
  3733 descriptions used by \s-1GCC\s0 model the \s-1CPU\s0 closely enough to avoid unreliable
       
  3734 results from the algorithm.
       
  3735 .Sp
       
  3736 This only makes sense when scheduling after register allocation, i.e. with
       
  3737 \&\fB\-fschedule\-insns2\fR or at \fB\-O2\fR or higher.
       
  3738 .IP "\fB\-fsched2\-use\-traces\fR" 4
       
  3739 .IX Item "-fsched2-use-traces"
       
  3740 Use \fB\-fsched2\-use\-superblocks\fR algorithm when scheduling after register
       
  3741 allocation and additionally perform code duplication in order to increase the
       
  3742 size of superblocks using tracer pass.  See \fB\-ftracer\fR for details on
       
  3743 trace formation.
       
  3744 .Sp
       
  3745 This mode should produce faster but significantly longer programs.  Also
       
  3746 without \f(CW\*(C`\-fbranch\-probabilities\*(C'\fR the traces constructed may not match the
       
  3747 reality and hurt the performance.  This only makes
       
  3748 sense when scheduling after register allocation, i.e. with
       
  3749 \&\fB\-fschedule\-insns2\fR or at \fB\-O2\fR or higher.
       
  3750 .IP "\fB\-fcaller\-saves\fR" 4
       
  3751 .IX Item "-fcaller-saves"
       
  3752 Enable values to be allocated in registers that will be clobbered by
       
  3753 function calls, by emitting extra instructions to save and restore the
       
  3754 registers around such calls.  Such allocation is done only when it
       
  3755 seems to result in better code than would otherwise be produced.
       
  3756 .Sp
       
  3757 This option is always enabled by default on certain machines, usually
       
  3758 those which have no call-preserved registers to use instead.
       
  3759 .Sp
       
  3760 Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
       
  3761 .IP "\fB\-fmove\-all\-movables\fR" 4
       
  3762 .IX Item "-fmove-all-movables"
       
  3763 Forces all invariant computations in loops to be moved
       
  3764 outside the loop.
       
  3765 .IP "\fB\-freduce\-all\-givs\fR" 4
       
  3766 .IX Item "-freduce-all-givs"
       
  3767 Forces all general-induction variables in loops to be
       
  3768 strength\-reduced.
       
  3769 .Sp
       
  3770 \&\fINote:\fR When compiling programs written in Fortran,
       
  3771 \&\fB\-fmove\-all\-movables\fR and \fB\-freduce\-all\-givs\fR are enabled
       
  3772 by default when you use the optimizer.
       
  3773 .Sp
       
  3774 These options may generate better or worse code; results are highly
       
  3775 dependent on the structure of loops within the source code.
       
  3776 .Sp
       
  3777 These two options are intended to be removed someday, once
       
  3778 they have helped determine the efficacy of various
       
  3779 approaches to improving loop optimizations.
       
  3780 .Sp
       
  3781 Please contact <\[email protected]\fR>, and describe how use of
       
  3782 these options affects the performance of your production code.
       
  3783 Examples of code that runs \fIslower\fR when these options are
       
  3784 \&\fIenabled\fR are very valuable.
       
  3785 .IP "\fB\-fno\-peephole\fR" 4
       
  3786 .IX Item "-fno-peephole"
       
  3787 .PD 0
       
  3788 .IP "\fB\-fno\-peephole2\fR" 4
       
  3789 .IX Item "-fno-peephole2"
       
  3790 .PD
       
  3791 Disable any machine-specific peephole optimizations.  The difference
       
  3792 between \fB\-fno\-peephole\fR and \fB\-fno\-peephole2\fR is in how they
       
  3793 are implemented in the compiler; some targets use one, some use the
       
  3794 other, a few use both.
       
  3795 .Sp
       
  3796 \&\fB\-fpeephole\fR is enabled by default.
       
  3797 \&\fB\-fpeephole2\fR enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
       
  3798 .IP "\fB\-fno\-guess\-branch\-probability\fR" 4
       
  3799 .IX Item "-fno-guess-branch-probability"
       
  3800 Do not guess branch probabilities using a randomized model.
       
  3801 .Sp
       
  3802 Sometimes \s-1GCC\s0 will opt to use a randomized model to guess branch
       
  3803 probabilities, when none are available from either profiling feedback
       
  3804 (\fB\-fprofile\-arcs\fR) or \fB_\|_builtin_expect\fR.  This means that
       
  3805 different runs of the compiler on the same program may produce different
       
  3806 object code.
       
  3807 .Sp
       
  3808 In a hard real-time system, people don't want different runs of the
       
  3809 compiler to produce code that has different behavior; minimizing
       
  3810 non-determinism is of paramount import.  This switch allows users to
       
  3811 reduce non\-determinism, possibly at the expense of inferior
       
  3812 optimization.
       
  3813 .Sp
       
  3814 The default is \fB\-fguess\-branch\-probability\fR at levels
       
  3815 \&\fB\-O\fR, \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
       
  3816 .IP "\fB\-freorder\-blocks\fR" 4
       
  3817 .IX Item "-freorder-blocks"
       
  3818 Reorder basic blocks in the compiled function in order to reduce number of
       
  3819 taken branches and improve code locality.
       
  3820 .Sp
       
  3821 Enabled at levels \fB\-O2\fR, \fB\-O3\fR.
       
  3822 .IP "\fB\-freorder\-functions\fR" 4
       
  3823 .IX Item "-freorder-functions"
       
  3824 Reorder basic blocks in the compiled function in order to reduce number of
       
  3825 taken branches and improve code locality. This is implemented by using special
       
  3826 subsections \f(CW\*(C`.text.hot\*(C'\fR for most frequently executed functions and
       
  3827 \&\f(CW\*(C`.text.unlikely\*(C'\fR for unlikely executed functions.  Reordering is done by
       
  3828 the linker so object file format must support named sections and linker must
       
  3829 place them in a reasonable way.
       
  3830 .Sp
       
  3831 Also profile feedback must be available in to make this option effective.  See
       
  3832 \&\fB\-fprofile\-arcs\fR for details.
       
  3833 .Sp
       
  3834 Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
       
  3835 .IP "\fB\-fstrict\-aliasing\fR" 4
       
  3836 .IX Item "-fstrict-aliasing"
       
  3837 Allows the compiler to assume the strictest aliasing rules applicable to
       
  3838 the language being compiled.  For C (and \*(C+), this activates
       
  3839 optimizations based on the type of expressions.  In particular, an
       
  3840 object of one type is assumed never to reside at the same address as an
       
  3841 object of a different type, unless the types are almost the same.  For
       
  3842 example, an \f(CW\*(C`unsigned int\*(C'\fR can alias an \f(CW\*(C`int\*(C'\fR, but not a
       
  3843 \&\f(CW\*(C`void*\*(C'\fR or a \f(CW\*(C`double\*(C'\fR.  A character type may alias any other
       
  3844 type.
       
  3845 .Sp
       
  3846 Pay special attention to code like this:
       
  3847 .Sp
       
  3848 .Vb 4
       
  3849 \&        union a_union {
       
  3850 \&          int i;
       
  3851 \&          double d;
       
  3852 \&        };
       
  3853 .Ve
       
  3854 .Sp
       
  3855 .Vb 5
       
  3856 \&        int f() {
       
  3857 \&          a_union t;
       
  3858 \&          t.d = 3.0;
       
  3859 \&          return t.i;
       
  3860 \&        }
       
  3861 .Ve
       
  3862 .Sp
       
  3863 The practice of reading from a different union member than the one most
       
  3864 recently written to (called ``type\-punning'') is common.  Even with
       
  3865 \&\fB\-fstrict\-aliasing\fR, type-punning is allowed, provided the memory
       
  3866 is accessed through the union type.  So, the code above will work as
       
  3867 expected.  However, this code might not:
       
  3868 .Sp
       
  3869 .Vb 7
       
  3870 \&        int f() {
       
  3871 \&          a_union t;
       
  3872 \&          int* ip;
       
  3873 \&          t.d = 3.0;
       
  3874 \&          ip = &t.i;
       
  3875 \&          return *ip;
       
  3876 \&        }
       
  3877 .Ve
       
  3878 .Sp
       
  3879 Every language that wishes to perform language-specific alias analysis
       
  3880 should define a function that computes, given an \f(CW\*(C`tree\*(C'\fR
       
  3881 node, an alias set for the node.  Nodes in different alias sets are not
       
  3882 allowed to alias.  For an example, see the C front-end function
       
  3883 \&\f(CW\*(C`c_get_alias_set\*(C'\fR.
       
  3884 .Sp
       
  3885 Enabled at levels \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
       
  3886 .IP "\fB\-falign\-functions\fR" 4
       
  3887 .IX Item "-falign-functions"
       
  3888 .PD 0
       
  3889 .IP "\fB\-falign\-functions=\fR\fIn\fR" 4
       
  3890 .IX Item "-falign-functions=n"
       
  3891 .PD
       
  3892 Align the start of functions to the next power-of-two greater than
       
  3893 \&\fIn\fR, skipping up to \fIn\fR bytes.  For instance,
       
  3894 \&\fB\-falign\-functions=32\fR aligns functions to the next 32\-byte
       
  3895 boundary, but \fB\-falign\-functions=24\fR would align to the next
       
  3896 32\-byte boundary only if this can be done by skipping 23 bytes or less.
       
  3897 .Sp
       
  3898 \&\fB\-fno\-align\-functions\fR and \fB\-falign\-functions=1\fR are
       
  3899 equivalent and mean that functions will not be aligned.
       
  3900 .Sp
       
  3901 Some assemblers only support this flag when \fIn\fR is a power of two;
       
  3902 in that case, it is rounded up.
       
  3903 .Sp
       
  3904 If \fIn\fR is not specified or is zero, use a machine-dependent default.
       
  3905 .Sp
       
  3906 Enabled at levels \fB\-O2\fR, \fB\-O3\fR.
       
  3907 .IP "\fB\-falign\-labels\fR" 4
       
  3908 .IX Item "-falign-labels"
       
  3909 .PD 0
       
  3910 .IP "\fB\-falign\-labels=\fR\fIn\fR" 4
       
  3911 .IX Item "-falign-labels=n"
       
  3912 .PD
       
  3913 Align all branch targets to a power-of-two boundary, skipping up to
       
  3914 \&\fIn\fR bytes like \fB\-falign\-functions\fR.  This option can easily
       
  3915 make code slower, because it must insert dummy operations for when the
       
  3916 branch target is reached in the usual flow of the code.
       
  3917 .Sp
       
  3918 \&\fB\-fno\-align\-labels\fR and \fB\-falign\-labels=1\fR are
       
  3919 equivalent and mean that labels will not be aligned.
       
  3920 .Sp
       
  3921 If \fB\-falign\-loops\fR or \fB\-falign\-jumps\fR are applicable and
       
  3922 are greater than this value, then their values are used instead.
       
  3923 .Sp
       
  3924 If \fIn\fR is not specified or is zero, use a machine-dependent default
       
  3925 which is very likely to be \fB1\fR, meaning no alignment.
       
  3926 .Sp
       
  3927 Enabled at levels \fB\-O2\fR, \fB\-O3\fR.
       
  3928 .IP "\fB\-falign\-loops\fR" 4
       
  3929 .IX Item "-falign-loops"
       
  3930 .PD 0
       
  3931 .IP "\fB\-falign\-loops=\fR\fIn\fR" 4
       
  3932 .IX Item "-falign-loops=n"
       
  3933 .PD
       
  3934 Align loops to a power-of-two boundary, skipping up to \fIn\fR bytes
       
  3935 like \fB\-falign\-functions\fR.  The hope is that the loop will be
       
  3936 executed many times, which will make up for any execution of the dummy
       
  3937 operations.
       
  3938 .Sp
       
  3939 \&\fB\-fno\-align\-loops\fR and \fB\-falign\-loops=1\fR are
       
  3940 equivalent and mean that loops will not be aligned.
       
  3941 .Sp
       
  3942 If \fIn\fR is not specified or is zero, use a machine-dependent default.
       
  3943 .Sp
       
  3944 Enabled at levels \fB\-O2\fR, \fB\-O3\fR.
       
  3945 .IP "\fB\-falign\-jumps\fR" 4
       
  3946 .IX Item "-falign-jumps"
       
  3947 .PD 0
       
  3948 .IP "\fB\-falign\-jumps=\fR\fIn\fR" 4
       
  3949 .IX Item "-falign-jumps=n"
       
  3950 .PD
       
  3951 Align branch targets to a power-of-two boundary, for branch targets
       
  3952 where the targets can only be reached by jumping, skipping up to \fIn\fR
       
  3953 bytes like \fB\-falign\-functions\fR.  In this case, no dummy operations
       
  3954 need be executed.
       
  3955 .Sp
       
  3956 \&\fB\-fno\-align\-jumps\fR and \fB\-falign\-jumps=1\fR are
       
  3957 equivalent and mean that loops will not be aligned.
       
  3958 .Sp
       
  3959 If \fIn\fR is not specified or is zero, use a machine-dependent default.
       
  3960 .Sp
       
  3961 Enabled at levels \fB\-O2\fR, \fB\-O3\fR.
       
  3962 .IP "\fB\-frename\-registers\fR" 4
       
  3963 .IX Item "-frename-registers"
       
  3964 Attempt to avoid false dependencies in scheduled code by making use
       
  3965 of registers left over after register allocation.  This optimization
       
  3966 will most benefit processors with lots of registers.  It can, however,
       
  3967 make debugging impossible, since variables will no longer stay in
       
  3968 a ``home register''.
       
  3969 .IP "\fB\-fweb\fR" 4
       
  3970 .IX Item "-fweb"
       
  3971 Constructs webs as commonly used for register allocation purposes and assign
       
  3972 each web individual pseudo register.  This allows the register allocation pass
       
  3973 to operate on pseudos directly, but also strengthens several other optimization
       
  3974 passes, such as \s-1CSE\s0, loop optimizer and trivial dead code remover.  It can,
       
  3975 however, make debugging impossible, since variables will no longer stay in a
       
  3976 ``home register''.
       
  3977 .Sp
       
  3978 Enabled at levels \fB\-O3\fR.
       
  3979 .IP "\fB\-fno\-cprop\-registers\fR" 4
       
  3980 .IX Item "-fno-cprop-registers"
       
  3981 After register allocation and post-register allocation instruction splitting,
       
  3982 we perform a copy-propagation pass to try to reduce scheduling dependencies
       
  3983 and occasionally eliminate the copy.
       
  3984 .Sp
       
  3985 Disabled at levels \fB\-O\fR, \fB\-O2\fR, \fB\-O3\fR, \fB\-Os\fR.
       
  3986 .IP "\fB\-fprofile\-generate\fR" 4
       
  3987 .IX Item "-fprofile-generate"
       
  3988 Enable options usually used for instrumenting application to produce
       
  3989 profile useful for later recompilation with profile feedback based
       
  3990 optimization.  You must use \f(CW\*(C`\-fprofile\-generate\*(C'\fR both when
       
  3991 compiling and when linking your program.
       
  3992 .Sp
       
  3993 The following options are enabled: \f(CW\*(C`\-fprofile\-arcs\*(C'\fR, \f(CW\*(C`\-fprofile\-values\*(C'\fR, \f(CW\*(C`\-fvpt\*(C'\fR.
       
  3994 .IP "\fB\-fprofile\-use\fR" 4
       
  3995 .IX Item "-fprofile-use"
       
  3996 Enable profile feedback directed optimizations, and optimizations
       
  3997 generally profitable only with profile feedback available.
       
  3998 .Sp
       
  3999 The following options are enabled: \f(CW\*(C`\-fbranch\-probabilities\*(C'\fR,
       
  4000 \&\f(CW\*(C`\-fvpt\*(C'\fR, \f(CW\*(C`\-funroll\-loops\*(C'\fR, \f(CW\*(C`\-fpeel\-loops\*(C'\fR, \f(CW\*(C`\-ftracer\*(C'\fR.
       
  4001 .PP
       
  4002 The following options control compiler behavior regarding floating
       
  4003 point arithmetic.  These options trade off between speed and
       
  4004 correctness.  All must be specifically enabled.
       
  4005 .IP "\fB\-ffloat\-store\fR" 4
       
  4006 .IX Item "-ffloat-store"
       
  4007 Do not store floating point variables in registers, and inhibit other
       
  4008 options that might change whether a floating point value is taken from a
       
  4009 register or memory.
       
  4010 .Sp
       
  4011 This option prevents undesirable excess precision on machines such as
       
  4012 the 68000 where the floating registers (of the 68881) keep more
       
  4013 precision than a \f(CW\*(C`double\*(C'\fR is supposed to have.  Similarly for the
       
  4014 x86 architecture.  For most programs, the excess precision does only
       
  4015 good, but a few programs rely on the precise definition of \s-1IEEE\s0 floating
       
  4016 point.  Use \fB\-ffloat\-store\fR for such programs, after modifying
       
  4017 them to store all pertinent intermediate computations into variables.
       
  4018 .IP "\fB\-ffast\-math\fR" 4
       
  4019 .IX Item "-ffast-math"
       
  4020 Sets \fB\-fno\-math\-errno\fR, \fB\-funsafe\-math\-optimizations\fR, \fB\-fno\-trapping\-math\fR, \fB\-ffinite\-math\-only\fR,
       
  4021 \&\fB\-fno\-rounding\-math\fR and \fB\-fno\-signaling\-nans\fR.
       
  4022 .Sp
       
  4023 This option causes the preprocessor macro \f(CW\*(C`_\|_FAST_MATH_\|_\*(C'\fR to be defined.
       
  4024 .Sp
       
  4025 This option should never be turned on by any \fB\-O\fR option since
       
  4026 it can result in incorrect output for programs which depend on
       
  4027 an exact implementation of \s-1IEEE\s0 or \s-1ISO\s0 rules/specifications for
       
  4028 math functions.
       
  4029 .IP "\fB\-fno\-math\-errno\fR" 4
       
  4030 .IX Item "-fno-math-errno"
       
  4031 Do not set \s-1ERRNO\s0 after calling math functions that are executed
       
  4032 with a single instruction, e.g., sqrt.  A program that relies on
       
  4033 \&\s-1IEEE\s0 exceptions for math error handling may want to use this flag
       
  4034 for speed while maintaining \s-1IEEE\s0 arithmetic compatibility.
       
  4035 .Sp
       
  4036 This option should never be turned on by any \fB\-O\fR option since
       
  4037 it can result in incorrect output for programs which depend on
       
  4038 an exact implementation of \s-1IEEE\s0 or \s-1ISO\s0 rules/specifications for
       
  4039 math functions.
       
  4040 .Sp
       
  4041 The default is \fB\-fmath\-errno\fR.
       
  4042 .IP "\fB\-funsafe\-math\-optimizations\fR" 4
       
  4043 .IX Item "-funsafe-math-optimizations"
       
  4044 Allow optimizations for floating-point arithmetic that (a) assume
       
  4045 that arguments and results are valid and (b) may violate \s-1IEEE\s0 or
       
  4046 \&\s-1ANSI\s0 standards.  When used at link\-time, it may include libraries
       
  4047 or startup files that change the default \s-1FPU\s0 control word or other
       
  4048 similar optimizations.
       
  4049 .Sp
       
  4050 This option should never be turned on by any \fB\-O\fR option since
       
  4051 it can result in incorrect output for programs which depend on
       
  4052 an exact implementation of \s-1IEEE\s0 or \s-1ISO\s0 rules/specifications for
       
  4053 math functions.
       
  4054 .Sp
       
  4055 The default is \fB\-fno\-unsafe\-math\-optimizations\fR.
       
  4056 .IP "\fB\-ffinite\-math\-only\fR" 4
       
  4057 .IX Item "-ffinite-math-only"
       
  4058 Allow optimizations for floating-point arithmetic that assume
       
  4059 that arguments and results are not NaNs or +\-Infs.
       
  4060 .Sp
       
  4061 This option should never be turned on by any \fB\-O\fR option since
       
  4062 it can result in incorrect output for programs which depend on
       
  4063 an exact implementation of \s-1IEEE\s0 or \s-1ISO\s0 rules/specifications.
       
  4064 .Sp
       
  4065 The default is \fB\-fno\-finite\-math\-only\fR.
       
  4066 .IP "\fB\-fno\-trapping\-math\fR" 4
       
  4067 .IX Item "-fno-trapping-math"
       
  4068 Compile code assuming that floating-point operations cannot generate
       
  4069 user-visible traps.  These traps include division by zero, overflow,
       
  4070 underflow, inexact result and invalid operation.  This option implies
       
  4071 \&\fB\-fno\-signaling\-nans\fR.  Setting this option may allow faster
       
  4072 code if one relies on ``non\-stop'' \s-1IEEE\s0 arithmetic, for example.
       
  4073 .Sp
       
  4074 This option should never be turned on by any \fB\-O\fR option since
       
  4075 it can result in incorrect output for programs which depend on
       
  4076 an exact implementation of \s-1IEEE\s0 or \s-1ISO\s0 rules/specifications for
       
  4077 math functions.
       
  4078 .Sp
       
  4079 The default is \fB\-ftrapping\-math\fR.
       
  4080 .IP "\fB\-frounding\-math\fR" 4
       
  4081 .IX Item "-frounding-math"
       
  4082 Disable transformations and optimizations that assume default floating
       
  4083 point rounding behavior.  This is round-to-zero for all floating point
       
  4084 to integer conversions, and round-to-nearest for all other arithmetic
       
  4085 truncations.  This option should be specified for programs that change
       
  4086 the \s-1FP\s0 rounding mode dynamically, or that may be executed with a
       
  4087 non-default rounding mode.  This option disables constant folding of
       
  4088 floating point expressions at compile-time (which may be affected by
       
  4089 rounding mode) and arithmetic transformations that are unsafe in the
       
  4090 presence of sign-dependent rounding modes.
       
  4091 .Sp
       
  4092 The default is \fB\-fno\-rounding\-math\fR.
       
  4093 .Sp
       
  4094 This option is experimental and does not currently guarantee to
       
  4095 disable all \s-1GCC\s0 optimizations that are affected by rounding mode.
       
  4096 Future versions of \s-1GCC\s0 may provide finer control of this setting
       
  4097 using C99's \f(CW\*(C`FENV_ACCESS\*(C'\fR pragma.  This command line option
       
  4098 will be used to specify the default state for \f(CW\*(C`FENV_ACCESS\*(C'\fR.
       
  4099 .IP "\fB\-fsignaling\-nans\fR" 4
       
  4100 .IX Item "-fsignaling-nans"
       
  4101 Compile code assuming that \s-1IEEE\s0 signaling NaNs may generate user-visible
       
  4102 traps during floating-point operations.  Setting this option disables
       
  4103 optimizations that may change the number of exceptions visible with
       
  4104 signaling NaNs.  This option implies \fB\-ftrapping\-math\fR.
       
  4105 .Sp
       
  4106 This option causes the preprocessor macro \f(CW\*(C`_\|_SUPPORT_SNAN_\|_\*(C'\fR to
       
  4107 be defined.
       
  4108 .Sp
       
  4109 The default is \fB\-fno\-signaling\-nans\fR.
       
  4110 .Sp
       
  4111 This option is experimental and does not currently guarantee to
       
  4112 disable all \s-1GCC\s0 optimizations that affect signaling NaN behavior.
       
  4113 .IP "\fB\-fsingle\-precision\-constant\fR" 4
       
  4114 .IX Item "-fsingle-precision-constant"
       
  4115 Treat floating point constant as single precision constant instead of
       
  4116 implicitly converting it to double precision constant.
       
  4117 .PP
       
  4118 The following options control optimizations that may improve
       
  4119 performance, but are not enabled by any \fB\-O\fR options.  This
       
  4120 section includes experimental options that may produce broken code.
       
  4121 .IP "\fB\-fbranch\-probabilities\fR" 4
       
  4122 .IX Item "-fbranch-probabilities"
       
  4123 After running a program compiled with \fB\-fprofile\-arcs\fR, you can compile it a second time using
       
  4124 \&\fB\-fbranch\-probabilities\fR, to improve optimizations based on
       
  4125 the number of times each branch was taken.  When the program
       
  4126 compiled with \fB\-fprofile\-arcs\fR exits it saves arc execution
       
  4127 counts to a file called \fI\fIsourcename\fI.gcda\fR for each source
       
  4128 file  The information in this data file is very dependent on the
       
  4129 structure of the generated code, so you must use the same source code
       
  4130 and the same optimization options for both compilations.
       
  4131 .Sp
       
  4132 With \fB\-fbranch\-probabilities\fR, \s-1GCC\s0 puts a
       
  4133 \&\fB\s-1REG_BR_PROB\s0\fR note on each \fB\s-1JUMP_INSN\s0\fR and \fB\s-1CALL_INSN\s0\fR.
       
  4134 These can be used to improve optimization.  Currently, they are only
       
  4135 used in one place: in \fIreorg.c\fR, instead of guessing which path a
       
  4136 branch is mostly to take, the \fB\s-1REG_BR_PROB\s0\fR values are used to
       
  4137 exactly determine which path is taken more often.
       
  4138 .IP "\fB\-fprofile\-values\fR" 4
       
  4139 .IX Item "-fprofile-values"
       
  4140 If combined with \fB\-fprofile\-arcs\fR, it adds code so that some
       
  4141 data about values of expressions in the program is gathered.
       
  4142 .Sp
       
  4143 With \fB\-fbranch\-probabilities\fR, it reads back the data gathered
       
  4144 from profiling values of expressions and adds \fB\s-1REG_VALUE_PROFILE\s0\fR
       
  4145 notes to instructions for their later usage in optimizations.
       
  4146 .IP "\fB\-fvpt\fR" 4
       
  4147 .IX Item "-fvpt"
       
  4148 If combined with \fB\-fprofile\-arcs\fR, it instructs the compiler to add
       
  4149 a code to gather information about values of expressions.
       
  4150 .Sp
       
  4151 With \fB\-fbranch\-probabilities\fR, it reads back the data gathered
       
  4152 and actually performs the optimizations based on them.
       
  4153 Currently the optimizations include specialization of division operation
       
  4154 using the knowledge about the value of the denominator.
       
  4155 .IP "\fB\-fnew\-ra\fR" 4
       
  4156 .IX Item "-fnew-ra"
       
  4157 Use a graph coloring register allocator.  Currently this option is meant
       
  4158 for testing, so we are interested to hear about miscompilations with
       
  4159 \&\fB\-fnew\-ra\fR.
       
  4160 .IP "\fB\-ftracer\fR" 4
       
  4161 .IX Item "-ftracer"
       
  4162 Perform tail duplication to enlarge superblock size. This transformation
       
  4163 simplifies the control flow of the function allowing other optimizations to do
       
  4164 better job.
       
  4165 .IP "\fB\-funit\-at\-a\-time\fR" 4
       
  4166 .IX Item "-funit-at-a-time"
       
  4167 Parse the whole compilation unit before starting to produce code.
       
  4168 This allows some extra optimizations to take place but consumes more
       
  4169 memory.
       
  4170 .IP "\fB\-funroll\-loops\fR" 4
       
  4171 .IX Item "-funroll-loops"
       
  4172 Unroll loops whose number of iterations can be determined at compile time or
       
  4173 upon entry to the loop.  \fB\-funroll\-loops\fR implies
       
  4174 \&\fB\-frerun\-cse\-after\-loop\fR.  It also turns on complete loop peeling
       
  4175 (i.e. complete removal of loops with small constant number of iterations).
       
  4176 This option makes code larger, and may or may not make it run faster.
       
  4177 .IP "\fB\-funroll\-all\-loops\fR" 4
       
  4178 .IX Item "-funroll-all-loops"
       
  4179 Unroll all loops, even if their number of iterations is uncertain when
       
  4180 the loop is entered.  This usually makes programs run more slowly.
       
  4181 \&\fB\-funroll\-all\-loops\fR implies the same options as
       
  4182 \&\fB\-funroll\-loops\fR.
       
  4183 .IP "\fB\-fpeel\-loops\fR" 4
       
  4184 .IX Item "-fpeel-loops"
       
  4185 Peels the loops for that there is enough information that they do not
       
  4186 roll much (from profile feedback).  It also turns on complete loop peeling
       
  4187 (i.e. complete removal of loops with small constant number of iterations).
       
  4188 .IP "\fB\-funswitch\-loops\fR" 4
       
  4189 .IX Item "-funswitch-loops"
       
  4190 Move branches with loop invariant conditions out of the loop, with duplicates
       
  4191 of the loop on both branches (modified according to result of the condition).
       
  4192 .IP "\fB\-fold\-unroll\-loops\fR" 4
       
  4193 .IX Item "-fold-unroll-loops"
       
  4194 Unroll loops whose number of iterations can be determined at compile
       
  4195 time or upon entry to the loop, using the old loop unroller whose loop
       
  4196 recognition is based on notes from frontend.  \fB\-fold\-unroll\-loops\fR implies
       
  4197 both \fB\-fstrength\-reduce\fR and \fB\-frerun\-cse\-after\-loop\fR.  This
       
  4198 option makes code larger, and may or may not make it run faster.
       
  4199 .IP "\fB\-fold\-unroll\-all\-loops\fR" 4
       
  4200 .IX Item "-fold-unroll-all-loops"
       
  4201 Unroll all loops, even if their number of iterations is uncertain when
       
  4202 the loop is entered. This is done using the old loop unroller whose loop
       
  4203 recognition is based on notes from frontend.  This usually makes programs run more slowly.
       
  4204 \&\fB\-fold\-unroll\-all\-loops\fR implies the same options as
       
  4205 \&\fB\-fold\-unroll\-loops\fR.
       
  4206 .IP "\fB\-funswitch\-loops\fR" 4
       
  4207 .IX Item "-funswitch-loops"
       
  4208 Move branches with loop invariant conditions out of the loop, with duplicates
       
  4209 of the loop on both branches (modified according to result of the condition).
       
  4210 .IP "\fB\-funswitch\-loops\fR" 4
       
  4211 .IX Item "-funswitch-loops"
       
  4212 Move branches with loop invariant conditions out of the loop, with duplicates
       
  4213 of the loop on both branches (modified according to result of the condition).
       
  4214 .IP "\fB\-fprefetch\-loop\-arrays\fR" 4
       
  4215 .IX Item "-fprefetch-loop-arrays"
       
  4216 If supported by the target machine, generate instructions to prefetch
       
  4217 memory to improve the performance of loops that access large arrays.
       
  4218 .Sp
       
  4219 Disabled at level \fB\-Os\fR.
       
  4220 .IP "\fB\-ffunction\-sections\fR" 4
       
  4221 .IX Item "-ffunction-sections"
       
  4222 .PD 0
       
  4223 .IP "\fB\-fdata\-sections\fR" 4
       
  4224 .IX Item "-fdata-sections"
       
  4225 .PD
       
  4226 Place each function or data item into its own section in the output
       
  4227 file if the target supports arbitrary sections.  The name of the
       
  4228 function or the name of the data item determines the section's name
       
  4229 in the output file.
       
  4230 .Sp
       
  4231 Use these options on systems where the linker can perform optimizations
       
  4232 to improve locality of reference in the instruction space.  Most systems
       
  4233 using the \s-1ELF\s0 object format and \s-1SPARC\s0 processors running Solaris 2 have
       
  4234 linkers with such optimizations.  \s-1AIX\s0 may have these optimizations in
       
  4235 the future.
       
  4236 .Sp
       
  4237 Only use these options when there are significant benefits from doing
       
  4238 so.  When you specify these options, the assembler and linker will
       
  4239 create larger object and executable files and will also be slower.
       
  4240 You will not be able to use \f(CW\*(C`gprof\*(C'\fR on all systems if you
       
  4241 specify this option and you may have problems with debugging if
       
  4242 you specify both this option and \fB\-g\fR.
       
  4243 .IP "\fB\-fbranch\-target\-load\-optimize\fR" 4
       
  4244 .IX Item "-fbranch-target-load-optimize"
       
  4245 Perform branch target register load optimization before prologue / epilogue
       
  4246 threading.
       
  4247 The use of target registers can typically be exposed only during reload,
       
  4248 thus hoisting loads out of loops and doing inter-block scheduling needs
       
  4249 a separate optimization pass.
       
  4250 .IP "\fB\-fbranch\-target\-load\-optimize2\fR" 4
       
  4251 .IX Item "-fbranch-target-load-optimize2"
       
  4252 Perform branch target register load optimization after prologue / epilogue
       
  4253 threading.
       
  4254 .IP "\fB\-\-param\fR \fIname\fR\fB=\fR\fIvalue\fR" 4
       
  4255 .IX Item "--param name=value"
       
  4256 In some places, \s-1GCC\s0 uses various constants to control the amount of
       
  4257 optimization that is done.  For example, \s-1GCC\s0 will not inline functions
       
  4258 that contain more that a certain number of instructions.  You can
       
  4259 control some of these constants on the command-line using the
       
  4260 \&\fB\-\-param\fR option.
       
  4261 .Sp
       
  4262 The names of specific parameters, and the meaning of the values, are
       
  4263 tied to the internals of the compiler, and are subject to change
       
  4264 without notice in future releases.
       
  4265 .Sp
       
  4266 In each case, the \fIvalue\fR is an integer.  The allowable choices for
       
  4267 \&\fIname\fR are given in the following table:
       
  4268 .RS 4
       
  4269 .IP "\fBmax-crossjump-edges\fR" 4
       
  4270 .IX Item "max-crossjump-edges"
       
  4271 The maximum number of incoming edges to consider for crossjumping.
       
  4272 The algorithm used by \fB\-fcrossjumping\fR is O(N^2) in
       
  4273 the number of edges incoming to each block.  Increasing values mean
       
  4274 more aggressive optimization, making the compile time increase with
       
  4275 probably small improvement in executable size.
       
  4276 .IP "\fBmax-delay-slot-insn-search\fR" 4
       
  4277 .IX Item "max-delay-slot-insn-search"
       
  4278 The maximum number of instructions to consider when looking for an
       
  4279 instruction to fill a delay slot.  If more than this arbitrary number of
       
  4280 instructions is searched, the time savings from filling the delay slot
       
  4281 will be minimal so stop searching.  Increasing values mean more
       
  4282 aggressive optimization, making the compile time increase with probably
       
  4283 small improvement in executable run time.
       
  4284 .IP "\fBmax-delay-slot-live-search\fR" 4
       
  4285 .IX Item "max-delay-slot-live-search"
       
  4286 When trying to fill delay slots, the maximum number of instructions to
       
  4287 consider when searching for a block with valid live register
       
  4288 information.  Increasing this arbitrarily chosen value means more
       
  4289 aggressive optimization, increasing the compile time.  This parameter
       
  4290 should be removed when the delay slot code is rewritten to maintain the
       
  4291 control-flow graph.
       
  4292 .IP "\fBmax-gcse-memory\fR" 4
       
  4293 .IX Item "max-gcse-memory"
       
  4294 The approximate maximum amount of memory that will be allocated in
       
  4295 order to perform the global common subexpression elimination
       
  4296 optimization.  If more memory than specified is required, the
       
  4297 optimization will not be done.
       
  4298 .IP "\fBmax-gcse-passes\fR" 4
       
  4299 .IX Item "max-gcse-passes"
       
  4300 The maximum number of passes of \s-1GCSE\s0 to run.
       
  4301 .IP "\fBmax-pending-list-length\fR" 4
       
  4302 .IX Item "max-pending-list-length"
       
  4303 The maximum number of pending dependencies scheduling will allow
       
  4304 before flushing the current state and starting over.  Large functions
       
  4305 with few branches or calls can create excessively large lists which
       
  4306 needlessly consume memory and resources.
       
  4307 .IP "\fBmax-inline-insns-single\fR" 4
       
  4308 .IX Item "max-inline-insns-single"
       
  4309 Several parameters control the tree inliner used in gcc.
       
  4310 This number sets the maximum number of instructions (counted in \s-1GCC\s0's
       
  4311 internal representation) in a single function that the tree inliner
       
  4312 will consider for inlining.  This only affects functions declared
       
  4313 inline and methods implemented in a class declaration (\*(C+).
       
  4314 The default value is 500.
       
  4315 .IP "\fBmax-inline-insns-auto\fR" 4
       
  4316 .IX Item "max-inline-insns-auto"
       
  4317 When you use \fB\-finline\-functions\fR (included in \fB\-O3\fR),
       
  4318 a lot of functions that would otherwise not be considered for inlining
       
  4319 by the compiler will be investigated.  To those functions, a different
       
  4320 (more restrictive) limit compared to functions declared inline can
       
  4321 be applied.
       
  4322 The default value is 100.
       
  4323 .IP "\fBlarge-function-insns\fR" 4
       
  4324 .IX Item "large-function-insns"
       
  4325 The limit specifying really large functions.  For functions greater than this
       
  4326 limit inlining is constrained by \fB\-\-param large-function-growth\fR.
       
  4327 This parameter is useful primarily to avoid extreme compilation time caused by non-linear
       
  4328 algorithms used by the backend.
       
  4329 This parameter is ignored when \fB\-funit\-at\-a\-time\fR is not used.
       
  4330 The default value is 3000.
       
  4331 .IP "\fBlarge-function-growth\fR" 4
       
  4332 .IX Item "large-function-growth"
       
  4333 Specifies maximal growth of large function caused by inlining in percents.
       
  4334 This parameter is ignored when \fB\-funit\-at\-a\-time\fR is not used.
       
  4335 The default value is 200.
       
  4336 .IP "\fBinline-unit-growth\fR" 4
       
  4337 .IX Item "inline-unit-growth"
       
  4338 Specifies maximal overall growth of the compilation unit caused by inlining.
       
  4339 This parameter is ignored when \fB\-funit\-at\-a\-time\fR is not used.
       
  4340 The default value is 150.
       
  4341 .IP "\fBmax-inline-insns-rtl\fR" 4
       
  4342 .IX Item "max-inline-insns-rtl"
       
  4343 For languages that use the \s-1RTL\s0 inliner (this happens at a later stage
       
  4344 than tree inlining), you can set the maximum allowable size (counted
       
  4345 in \s-1RTL\s0 instructions) for the \s-1RTL\s0 inliner with this parameter.
       
  4346 The default value is 600.
       
  4347 .IP "\fBmax-unrolled-insns\fR" 4
       
  4348 .IX Item "max-unrolled-insns"
       
  4349 The maximum number of instructions that a loop should have if that loop
       
  4350 is unrolled, and if the loop is unrolled, it determines how many times
       
  4351 the loop code is unrolled.
       
  4352 .IP "\fBmax-average-unrolled-insns\fR" 4
       
  4353 .IX Item "max-average-unrolled-insns"
       
  4354 The maximum number of instructions biased by probabilities of their execution
       
  4355 that a loop should have if that loop is unrolled, and if the loop is unrolled,
       
  4356 it determines how many times the loop code is unrolled.
       
  4357 .IP "\fBmax-unroll-times\fR" 4
       
  4358 .IX Item "max-unroll-times"
       
  4359 The maximum number of unrollings of a single loop.
       
  4360 .IP "\fBmax-peeled-insns\fR" 4
       
  4361 .IX Item "max-peeled-insns"
       
  4362 The maximum number of instructions that a loop should have if that loop
       
  4363 is peeled, and if the loop is peeled, it determines how many times
       
  4364 the loop code is peeled.
       
  4365 .IP "\fBmax-peel-times\fR" 4
       
  4366 .IX Item "max-peel-times"
       
  4367 The maximum number of peelings of a single loop.
       
  4368 .IP "\fBmax-completely-peeled-insns\fR" 4
       
  4369 .IX Item "max-completely-peeled-insns"
       
  4370 The maximum number of insns of a completely peeled loop.
       
  4371 .IP "\fBmax-completely-peel-times\fR" 4
       
  4372 .IX Item "max-completely-peel-times"
       
  4373 The maximum number of iterations of a loop to be suitable for complete peeling.
       
  4374 .IP "\fBmax-unswitch-insns\fR" 4
       
  4375 .IX Item "max-unswitch-insns"
       
  4376 The maximum number of insns of an unswitched loop.
       
  4377 .IP "\fBmax-unswitch-level\fR" 4
       
  4378 .IX Item "max-unswitch-level"
       
  4379 The maximum number of branches unswitched in a single loop.
       
  4380 .IP "\fBhot-bb-count-fraction\fR" 4
       
  4381 .IX Item "hot-bb-count-fraction"
       
  4382 Select fraction of the maximal count of repetitions of basic block in program
       
  4383 given basic block needs to have to be considered hot.
       
  4384 .IP "\fBhot-bb-frequency-fraction\fR" 4
       
  4385 .IX Item "hot-bb-frequency-fraction"
       
  4386 Select fraction of the maximal frequency of executions of basic block in
       
  4387 function given basic block needs to have to be considered hot
       
  4388 .IP "\fBtracer-dynamic-coverage\fR" 4
       
  4389 .IX Item "tracer-dynamic-coverage"
       
  4390 .PD 0
       
  4391 .IP "\fBtracer-dynamic-coverage-feedback\fR" 4
       
  4392 .IX Item "tracer-dynamic-coverage-feedback"
       
  4393 .PD
       
  4394 This value is used to limit superblock formation once the given percentage of
       
  4395 executed instructions is covered.  This limits unnecessary code size
       
  4396 expansion.
       
  4397 .Sp
       
  4398 The \fBtracer-dynamic-coverage-feedback\fR is used only when profile
       
  4399 feedback is available.  The real profiles (as opposed to statically estimated
       
  4400 ones) are much less balanced allowing the threshold to be larger value.
       
  4401 .IP "\fBtracer-max-code-growth\fR" 4
       
  4402 .IX Item "tracer-max-code-growth"
       
  4403 Stop tail duplication once code growth has reached given percentage.  This is
       
  4404 rather hokey argument, as most of the duplicates will be eliminated later in
       
  4405 cross jumping, so it may be set to much higher values than is the desired code
       
  4406 growth.
       
  4407 .IP "\fBtracer-min-branch-ratio\fR" 4
       
  4408 .IX Item "tracer-min-branch-ratio"
       
  4409 Stop reverse growth when the reverse probability of best edge is less than this
       
  4410 threshold (in percent).
       
  4411 .IP "\fBtracer-min-branch-ratio\fR" 4
       
  4412 .IX Item "tracer-min-branch-ratio"
       
  4413 .PD 0
       
  4414 .IP "\fBtracer-min-branch-ratio-feedback\fR" 4
       
  4415 .IX Item "tracer-min-branch-ratio-feedback"
       
  4416 .PD
       
  4417 Stop forward growth if the best edge do have probability lower than this
       
  4418 threshold.
       
  4419 .Sp
       
  4420 Similarly to \fBtracer-dynamic-coverage\fR two values are present, one for
       
  4421 compilation for profile feedback and one for compilation without.  The value
       
  4422 for compilation with profile feedback needs to be more conservative (higher) in
       
  4423 order to make tracer effective.
       
  4424 .IP "\fBmax-cse-path-length\fR" 4
       
  4425 .IX Item "max-cse-path-length"
       
  4426 Maximum number of basic blocks on path that cse considers.
       
  4427 .IP "\fBggc-min-expand\fR" 4
       
  4428 .IX Item "ggc-min-expand"
       
  4429 \&\s-1GCC\s0 uses a garbage collector to manage its own memory allocation.  This
       
  4430 parameter specifies the minimum percentage by which the garbage
       
  4431 collector's heap should be allowed to expand between collections.
       
  4432 Tuning this may improve compilation speed; it has no effect on code
       
  4433 generation.
       
  4434 .Sp
       
  4435 The default is 30% + 70% * (\s-1RAM/1GB\s0) with an upper bound of 100% when
       
  4436 \&\s-1RAM\s0 >= 1GB.  If \f(CW\*(C`getrlimit\*(C'\fR is available, the notion of \*(L"\s-1RAM\s0\*(R" is
       
  4437 the smallest of actual \s-1RAM\s0, \s-1RLIMIT_RSS\s0, \s-1RLIMIT_DATA\s0 and \s-1RLIMIT_AS\s0.  If
       
  4438 \&\s-1GCC\s0 is not able to calculate \s-1RAM\s0 on a particular platform, the lower
       
  4439 bound of 30% is used.  Setting this parameter and
       
  4440 \&\fBggc-min-heapsize\fR to zero causes a full collection to occur at
       
  4441 every opportunity.  This is extremely slow, but can be useful for
       
  4442 debugging.
       
  4443 .IP "\fBggc-min-heapsize\fR" 4
       
  4444 .IX Item "ggc-min-heapsize"
       
  4445 Minimum size of the garbage collector's heap before it begins bothering
       
  4446 to collect garbage.  The first collection occurs after the heap expands
       
  4447 by \fBggc-min-expand\fR% beyond \fBggc-min-heapsize\fR.  Again,
       
  4448 tuning this may improve compilation speed, and has no effect on code
       
  4449 generation.
       
  4450 .Sp
       
  4451 The default is \s-1RAM/8\s0, with a lower bound of 4096 (four megabytes) and an
       
  4452 upper bound of 131072 (128 megabytes).  If \f(CW\*(C`getrlimit\*(C'\fR is
       
  4453 available, the notion of \*(L"\s-1RAM\s0\*(R" is the smallest of actual \s-1RAM\s0,
       
  4454 \&\s-1RLIMIT_RSS\s0, \s-1RLIMIT_DATA\s0 and \s-1RLIMIT_AS\s0.  If \s-1GCC\s0 is not able to calculate
       
  4455 \&\s-1RAM\s0 on a particular platform, the lower bound is used.  Setting this
       
  4456 parameter very large effectively disables garbage collection.  Setting
       
  4457 this parameter and \fBggc-min-expand\fR to zero causes a full
       
  4458 collection to occur at every opportunity.
       
  4459 .IP "\fBmax-reload-search-insns\fR" 4
       
  4460 .IX Item "max-reload-search-insns"
       
  4461 The maximum number of instruction reload should look backward for equivalent
       
  4462 register.  Increasing values mean more aggressive optimization, making the
       
  4463 compile time increase with probably slightly better performance.  The default
       
  4464 value is 100.
       
  4465 .IP "\fBmax-cselib-memory-location\fR" 4
       
  4466 .IX Item "max-cselib-memory-location"
       
  4467 The maximum number of memory locations cselib should take into acount.
       
  4468 Increasing values mean more aggressive optimization, making the compile time
       
  4469 increase with probably slightly better performance.  The default value is 500.
       
  4470 .IP "\fBreorder-blocks-duplicate\fR" 4
       
  4471 .IX Item "reorder-blocks-duplicate"
       
  4472 .PD 0
       
  4473 .IP "\fBreorder-blocks-duplicate-feedback\fR" 4
       
  4474 .IX Item "reorder-blocks-duplicate-feedback"
       
  4475 .PD
       
  4476 Used by basic block reordering pass to decide whether to use unconditional
       
  4477 branch or duplicate the code on its destination.  Code is duplicated when its
       
  4478 estimated size is smaller than this value multiplied by the estimated size of
       
  4479 unconditional jump in the hot spots of the program.
       
  4480 .Sp
       
  4481 The \fBreorder-block-duplicate-feedback\fR is used only when profile
       
  4482 feedback is available and may be set to higher values than
       
  4483 \&\fBreorder-block-duplicate\fR since information about the hot spots is more
       
  4484 accurate.
       
  4485 .RE
       
  4486 .RS 4
       
  4487 .RE
       
  4488 .Sh "Options Controlling the Preprocessor"
       
  4489 .IX Subsection "Options Controlling the Preprocessor"
       
  4490 These options control the C preprocessor, which is run on each C source
       
  4491 file before actual compilation.
       
  4492 .PP
       
  4493 If you use the \fB\-E\fR option, nothing is done except preprocessing.
       
  4494 Some of these options make sense only together with \fB\-E\fR because
       
  4495 they cause the preprocessor output to be unsuitable for actual
       
  4496 compilation.
       
  4497 .Sp
       
  4498 .RS 4
       
  4499 You can use \fB\-Wp,\fR\fIoption\fR to bypass the compiler driver
       
  4500 and pass \fIoption\fR directly through to the preprocessor.  If
       
  4501 \&\fIoption\fR contains commas, it is split into multiple options at the
       
  4502 commas.  However, many options are modified, translated or interpreted
       
  4503 by the compiler driver before being passed to the preprocessor, and
       
  4504 \&\fB\-Wp\fR forcibly bypasses this phase.  The preprocessor's direct
       
  4505 interface is undocumented and subject to change, so whenever possible
       
  4506 you should avoid using \fB\-Wp\fR and let the driver handle the
       
  4507 options instead.
       
  4508 .RE
       
  4509 .IP "\fB\-Xpreprocessor\fR \fIoption\fR" 4
       
  4510 .IX Item "-Xpreprocessor option"
       
  4511 Pass \fIoption\fR as an option to the preprocessor.  You can use this to
       
  4512 supply system-specific preprocessor options which \s-1GCC\s0 does not know how to
       
  4513 recognize.
       
  4514 .Sp
       
  4515 If you want to pass an option that takes an argument, you must use
       
  4516 \&\fB\-Xpreprocessor\fR twice, once for the option and once for the argument.
       
  4517 .IP "\fB\-D\fR \fIname\fR" 4
       
  4518 .IX Item "-D name"
       
  4519 Predefine \fIname\fR as a macro, with definition \f(CW1\fR.
       
  4520 .IP "\fB\-D\fR \fIname\fR\fB=\fR\fIdefinition\fR" 4
       
  4521 .IX Item "-D name=definition"
       
  4522 Predefine \fIname\fR as a macro, with definition \fIdefinition\fR.
       
  4523 The contents of \fIdefinition\fR are tokenized and processed as if
       
  4524 they appeared during translation phase three in a \fB#define\fR
       
  4525 directive.  In particular, the definition will be truncated by
       
  4526 embedded newline characters.
       
  4527 .Sp
       
  4528 If you are invoking the preprocessor from a shell or shell-like
       
  4529 program you may need to use the shell's quoting syntax to protect
       
  4530 characters such as spaces that have a meaning in the shell syntax.
       
  4531 .Sp
       
  4532 If you wish to define a function-like macro on the command line, write
       
  4533 its argument list with surrounding parentheses before the equals sign
       
  4534 (if any).  Parentheses are meaningful to most shells, so you will need
       
  4535 to quote the option.  With \fBsh\fR and \fBcsh\fR,
       
  4536 \&\fB\-D'\fR\fIname\fR\fB(\fR\fIargs...\fR\fB)=\fR\fIdefinition\fR\fB'\fR works.
       
  4537 .Sp
       
  4538 \&\fB\-D\fR and \fB\-U\fR options are processed in the order they
       
  4539 are given on the command line.  All \fB\-imacros\fR \fIfile\fR and
       
  4540 \&\fB\-include\fR \fIfile\fR options are processed after all
       
  4541 \&\fB\-D\fR and \fB\-U\fR options.
       
  4542 .IP "\fB\-U\fR \fIname\fR" 4
       
  4543 .IX Item "-U name"
       
  4544 Cancel any previous definition of \fIname\fR, either built in or
       
  4545 provided with a \fB\-D\fR option.
       
  4546 .IP "\fB\-undef\fR" 4
       
  4547 .IX Item "-undef"
       
  4548 Do not predefine any system-specific or GCC-specific macros.  The
       
  4549 standard predefined macros remain defined.
       
  4550 .IP "\fB\-I\fR \fIdir\fR" 4
       
  4551 .IX Item "-I dir"
       
  4552 Add the directory \fIdir\fR to the list of directories to be searched
       
  4553 for header files.
       
  4554 Directories named by \fB\-I\fR are searched before the standard
       
  4555 system include directories.  If the directory \fIdir\fR is a standard
       
  4556 system include directory, the option is ignored to ensure that the
       
  4557 default search order for system directories and the special treatment
       
  4558 of system headers are not defeated
       
  4559 \&.
       
  4560 .IP "\fB\-o\fR \fIfile\fR" 4
       
  4561 .IX Item "-o file"
       
  4562 Write output to \fIfile\fR.  This is the same as specifying \fIfile\fR
       
  4563 as the second non-option argument to \fBcpp\fR.  \fBgcc\fR has a
       
  4564 different interpretation of a second non-option argument, so you must
       
  4565 use \fB\-o\fR to specify the output file.
       
  4566 .IP "\fB\-Wall\fR" 4
       
  4567 .IX Item "-Wall"
       
  4568 Turns on all optional warnings which are desirable for normal code.
       
  4569 At present this is \fB\-Wcomment\fR, \fB\-Wtrigraphs\fR,
       
  4570 \&\fB\-Wmultichar\fR and a warning about integer promotion causing a
       
  4571 change of sign in \f(CW\*(C`#if\*(C'\fR expressions.  Note that many of the
       
  4572 preprocessor's warnings are on by default and have no options to
       
  4573 control them.
       
  4574 .IP "\fB\-Wcomment\fR" 4
       
  4575 .IX Item "-Wcomment"
       
  4576 .PD 0
       
  4577 .IP "\fB\-Wcomments\fR" 4
       
  4578 .IX Item "-Wcomments"
       
  4579 .PD
       
  4580 Warn whenever a comment-start sequence \fB/*\fR appears in a \fB/*\fR
       
  4581 comment, or whenever a backslash-newline appears in a \fB//\fR comment.
       
  4582 (Both forms have the same effect.)
       
  4583 .IP "\fB\-Wtrigraphs\fR" 4
       
  4584 .IX Item "-Wtrigraphs"
       
  4585 @anchor{Wtrigraphs}
       
  4586 Most trigraphs in comments cannot affect the meaning of the program.
       
  4587 However, a trigraph that would form an escaped newline (\fB??/\fR at
       
  4588 the end of a line) can, by changing where the comment begins or ends.
       
  4589 Therefore, only trigraphs that would form escaped newlines produce
       
  4590 warnings inside a comment.
       
  4591 .Sp
       
  4592 This option is implied by \fB\-Wall\fR.  If \fB\-Wall\fR is not
       
  4593 given, this option is still enabled unless trigraphs are enabled.  To
       
  4594 get trigraph conversion without warnings, but get the other
       
  4595 \&\fB\-Wall\fR warnings, use \fB\-trigraphs \-Wall \-Wno\-trigraphs\fR.
       
  4596 .IP "\fB\-Wtraditional\fR" 4
       
  4597 .IX Item "-Wtraditional"
       
  4598 Warn about certain constructs that behave differently in traditional and
       
  4599 \&\s-1ISO\s0 C.  Also warn about \s-1ISO\s0 C constructs that have no traditional C
       
  4600 equivalent, and problematic constructs which should be avoided.
       
  4601 .IP "\fB\-Wimport\fR" 4
       
  4602 .IX Item "-Wimport"
       
  4603 Warn the first time \fB#import\fR is used.
       
  4604 .IP "\fB\-Wundef\fR" 4
       
  4605 .IX Item "-Wundef"
       
  4606 Warn whenever an identifier which is not a macro is encountered in an
       
  4607 \&\fB#if\fR directive, outside of \fBdefined\fR.  Such identifiers are
       
  4608 replaced with zero.
       
  4609 .IP "\fB\-Wunused\-macros\fR" 4
       
  4610 .IX Item "-Wunused-macros"
       
  4611 Warn about macros defined in the main file that are unused.  A macro
       
  4612 is \fIused\fR if it is expanded or tested for existence at least once.
       
  4613 The preprocessor will also warn if the macro has not been used at the
       
  4614 time it is redefined or undefined.
       
  4615 .Sp
       
  4616 Built-in macros, macros defined on the command line, and macros
       
  4617 defined in include files are not warned about.
       
  4618 .Sp
       
  4619 \&\fBNote:\fR If a macro is actually used, but only used in skipped
       
  4620 conditional blocks, then \s-1CPP\s0 will report it as unused.  To avoid the
       
  4621 warning in such a case, you might improve the scope of the macro's
       
  4622 definition by, for example, moving it into the first skipped block.
       
  4623 Alternatively, you could provide a dummy use with something like:
       
  4624 .Sp
       
  4625 .Vb 2
       
  4626 \&        #if defined the_macro_causing_the_warning
       
  4627 \&        #endif
       
  4628 .Ve
       
  4629 .IP "\fB\-Wendif\-labels\fR" 4
       
  4630 .IX Item "-Wendif-labels"
       
  4631 Warn whenever an \fB#else\fR or an \fB#endif\fR are followed by text.
       
  4632 This usually happens in code of the form
       
  4633 .Sp
       
  4634 .Vb 5
       
  4635 \&        #if FOO
       
  4636 \&        ...
       
  4637 \&        #else FOO
       
  4638 \&        ...
       
  4639 \&        #endif FOO
       
  4640 .Ve
       
  4641 .Sp
       
  4642 The second and third \f(CW\*(C`FOO\*(C'\fR should be in comments, but often are not
       
  4643 in older programs.  This warning is on by default.
       
  4644 .IP "\fB\-Werror\fR" 4
       
  4645 .IX Item "-Werror"
       
  4646 Make all warnings into hard errors.  Source code which triggers warnings
       
  4647 will be rejected.
       
  4648 .IP "\fB\-Wsystem\-headers\fR" 4
       
  4649 .IX Item "-Wsystem-headers"
       
  4650 Issue warnings for code in system headers.  These are normally unhelpful
       
  4651 in finding bugs in your own code, therefore suppressed.  If you are
       
  4652 responsible for the system library, you may want to see them.
       
  4653 .IP "\fB\-w\fR" 4
       
  4654 .IX Item "-w"
       
  4655 Suppress all warnings, including those which \s-1GNU\s0 \s-1CPP\s0 issues by default.
       
  4656 .IP "\fB\-pedantic\fR" 4
       
  4657 .IX Item "-pedantic"
       
  4658 Issue all the mandatory diagnostics listed in the C standard.  Some of
       
  4659 them are left out by default, since they trigger frequently on harmless
       
  4660 code.
       
  4661 .IP "\fB\-pedantic\-errors\fR" 4
       
  4662 .IX Item "-pedantic-errors"
       
  4663 Issue all the mandatory diagnostics, and make all mandatory diagnostics
       
  4664 into errors.  This includes mandatory diagnostics that \s-1GCC\s0 issues
       
  4665 without \fB\-pedantic\fR but treats as warnings.
       
  4666 .IP "\fB\-M\fR" 4
       
  4667 .IX Item "-M"
       
  4668 Instead of outputting the result of preprocessing, output a rule
       
  4669 suitable for \fBmake\fR describing the dependencies of the main
       
  4670 source file.  The preprocessor outputs one \fBmake\fR rule containing
       
  4671 the object file name for that source file, a colon, and the names of all
       
  4672 the included files, including those coming from \fB\-include\fR or
       
  4673 \&\fB\-imacros\fR command line options.
       
  4674 .Sp
       
  4675 Unless specified explicitly (with \fB\-MT\fR or \fB\-MQ\fR), the
       
  4676 object file name consists of the basename of the source file with any
       
  4677 suffix replaced with object file suffix.  If there are many included
       
  4678 files then the rule is split into several lines using \fB\e\fR\-newline.
       
  4679 The rule has no commands.
       
  4680 .Sp
       
  4681 This option does not suppress the preprocessor's debug output, such as
       
  4682 \&\fB\-dM\fR.  To avoid mixing such debug output with the dependency
       
  4683 rules you should explicitly specify the dependency output file with
       
  4684 \&\fB\-MF\fR, or use an environment variable like
       
  4685 \&\fB\s-1DEPENDENCIES_OUTPUT\s0\fR.  Debug output
       
  4686 will still be sent to the regular output stream as normal.
       
  4687 .Sp
       
  4688 Passing \fB\-M\fR to the driver implies \fB\-E\fR, and suppresses
       
  4689 warnings with an implicit \fB\-w\fR.
       
  4690 .IP "\fB\-MM\fR" 4
       
  4691 .IX Item "-MM"
       
  4692 Like \fB\-M\fR but do not mention header files that are found in
       
  4693 system header directories, nor header files that are included,
       
  4694 directly or indirectly, from such a header.
       
  4695 .Sp
       
  4696 This implies that the choice of angle brackets or double quotes in an
       
  4697 \&\fB#include\fR directive does not in itself determine whether that
       
  4698 header will appear in \fB\-MM\fR dependency output.  This is a
       
  4699 slight change in semantics from \s-1GCC\s0 versions 3.0 and earlier.
       
  4700 .Sp
       
  4701 @anchor{dashMF}
       
  4702 .IP "\fB\-MF\fR \fIfile\fR" 4
       
  4703 .IX Item "-MF file"
       
  4704 When used with \fB\-M\fR or \fB\-MM\fR, specifies a
       
  4705 file to write the dependencies to.  If no \fB\-MF\fR switch is given
       
  4706 the preprocessor sends the rules to the same place it would have sent
       
  4707 preprocessed output.
       
  4708 .Sp
       
  4709 When used with the driver options \fB\-MD\fR or \fB\-MMD\fR,
       
  4710 \&\fB\-MF\fR overrides the default dependency output file.
       
  4711 .IP "\fB\-MG\fR" 4
       
  4712 .IX Item "-MG"
       
  4713 In conjunction with an option such as \fB\-M\fR requesting
       
  4714 dependency generation, \fB\-MG\fR assumes missing header files are
       
  4715 generated files and adds them to the dependency list without raising
       
  4716 an error.  The dependency filename is taken directly from the
       
  4717 \&\f(CW\*(C`#include\*(C'\fR directive without prepending any path.  \fB\-MG\fR
       
  4718 also suppresses preprocessed output, as a missing header file renders
       
  4719 this useless.
       
  4720 .Sp
       
  4721 This feature is used in automatic updating of makefiles.
       
  4722 .IP "\fB\-MP\fR" 4
       
  4723 .IX Item "-MP"
       
  4724 This option instructs \s-1CPP\s0 to add a phony target for each dependency
       
  4725 other than the main file, causing each to depend on nothing.  These
       
  4726 dummy rules work around errors \fBmake\fR gives if you remove header
       
  4727 files without updating the \fIMakefile\fR to match.
       
  4728 .Sp
       
  4729 This is typical output:
       
  4730 .Sp
       
  4731 .Vb 1
       
  4732 \&        test.o: test.c test.h
       
  4733 .Ve
       
  4734 .Sp
       
  4735 .Vb 1
       
  4736 \&        test.h:
       
  4737 .Ve
       
  4738 .IP "\fB\-MT\fR \fItarget\fR" 4
       
  4739 .IX Item "-MT target"
       
  4740 Change the target of the rule emitted by dependency generation.  By
       
  4741 default \s-1CPP\s0 takes the name of the main input file, including any path,
       
  4742 deletes any file suffix such as \fB.c\fR, and appends the platform's
       
  4743 usual object suffix.  The result is the target.
       
  4744 .Sp
       
  4745 An \fB\-MT\fR option will set the target to be exactly the string you
       
  4746 specify.  If you want multiple targets, you can specify them as a single
       
  4747 argument to \fB\-MT\fR, or use multiple \fB\-MT\fR options.
       
  4748 .Sp
       
  4749 For example, \fB\-MT\ '$(objpfx)foo.o'\fR might give
       
  4750 .Sp
       
  4751 .Vb 1
       
  4752 \&        $(objpfx)foo.o: foo.c
       
  4753 .Ve
       
  4754 .IP "\fB\-MQ\fR \fItarget\fR" 4
       
  4755 .IX Item "-MQ target"
       
  4756 Same as \fB\-MT\fR, but it quotes any characters which are special to
       
  4757 Make.  \fB\-MQ\ '$(objpfx)foo.o'\fR gives
       
  4758 .Sp
       
  4759 .Vb 1
       
  4760 \&        $$(objpfx)foo.o: foo.c
       
  4761 .Ve
       
  4762 .Sp
       
  4763 The default target is automatically quoted, as if it were given with
       
  4764 \&\fB\-MQ\fR.
       
  4765 .IP "\fB\-MD\fR" 4
       
  4766 .IX Item "-MD"
       
  4767 \&\fB\-MD\fR is equivalent to \fB\-M \-MF\fR \fIfile\fR, except that
       
  4768 \&\fB\-E\fR is not implied.  The driver determines \fIfile\fR based on
       
  4769 whether an \fB\-o\fR option is given.  If it is, the driver uses its
       
  4770 argument but with a suffix of \fI.d\fR, otherwise it take the
       
  4771 basename of the input file and applies a \fI.d\fR suffix.
       
  4772 .Sp
       
  4773 If \fB\-MD\fR is used in conjunction with \fB\-E\fR, any
       
  4774 \&\fB\-o\fR switch is understood to specify the dependency output file
       
  4775 (but \f(CW@pxref\fR{dashMF,,\-MF}), but if used without \fB\-E\fR, each \fB\-o\fR
       
  4776 is understood to specify a target object file.
       
  4777 .Sp
       
  4778 Since \fB\-E\fR is not implied, \fB\-MD\fR can be used to generate
       
  4779 a dependency output file as a side-effect of the compilation process.
       
  4780 .IP "\fB\-MMD\fR" 4
       
  4781 .IX Item "-MMD"
       
  4782 Like \fB\-MD\fR except mention only user header files, not system
       
  4783 \&\-header files.
       
  4784 .IP "\fB\-fpch\-deps\fR" 4
       
  4785 .IX Item "-fpch-deps"
       
  4786 When using precompiled headers, this flag
       
  4787 will cause the dependency-output flags to also list the files from the
       
  4788 precompiled header's dependencies.  If not specified only the
       
  4789 precompiled header would be listed and not the files that were used to
       
  4790 create it because those files are not consulted when a precompiled
       
  4791 header is used.
       
  4792 .IP "\fB\-x c\fR" 4
       
  4793 .IX Item "-x c"
       
  4794 .PD 0
       
  4795 .IP "\fB\-x c++\fR" 4
       
  4796 .IX Item "-x c++"
       
  4797 .IP "\fB\-x objective-c\fR" 4
       
  4798 .IX Item "-x objective-c"
       
  4799 .IP "\fB\-x assembler-with-cpp\fR" 4
       
  4800 .IX Item "-x assembler-with-cpp"
       
  4801 .PD
       
  4802 Specify the source language: C, \*(C+, Objective\-C, or assembly.  This has
       
  4803 nothing to do with standards conformance or extensions; it merely
       
  4804 selects which base syntax to expect.  If you give none of these options,
       
  4805 cpp will deduce the language from the extension of the source file:
       
  4806 \&\fB.c\fR, \fB.cc\fR, \fB.m\fR, or \fB.S\fR.  Some other common
       
  4807 extensions for \*(C+ and assembly are also recognized.  If cpp does not
       
  4808 recognize the extension, it will treat the file as C; this is the most
       
  4809 generic mode.
       
  4810 .Sp
       
  4811 \&\fBNote:\fR Previous versions of cpp accepted a \fB\-lang\fR option
       
  4812 which selected both the language and the standards conformance level.
       
  4813 This option has been removed, because it conflicts with the \fB\-l\fR
       
  4814 option.
       
  4815 .IP "\fB\-std=\fR\fIstandard\fR" 4
       
  4816 .IX Item "-std=standard"
       
  4817 .PD 0
       
  4818 .IP "\fB\-ansi\fR" 4
       
  4819 .IX Item "-ansi"
       
  4820 .PD
       
  4821 Specify the standard to which the code should conform.  Currently \s-1CPP\s0
       
  4822 knows about C and \*(C+ standards; others may be added in the future.
       
  4823 .Sp
       
  4824 \&\fIstandard\fR
       
  4825 may be one of:
       
  4826 .RS 4
       
  4827 .ie n .IP """iso9899:1990""" 4
       
  4828 .el .IP "\f(CWiso9899:1990\fR" 4
       
  4829 .IX Item "iso9899:1990"
       
  4830 .PD 0
       
  4831 .ie n .IP """c89""" 4
       
  4832 .el .IP "\f(CWc89\fR" 4
       
  4833 .IX Item "c89"
       
  4834 .PD
       
  4835 The \s-1ISO\s0 C standard from 1990.  \fBc89\fR is the customary shorthand for
       
  4836 this version of the standard.
       
  4837 .Sp
       
  4838 The \fB\-ansi\fR option is equivalent to \fB\-std=c89\fR.
       
  4839 .ie n .IP """iso9899:199409""" 4
       
  4840 .el .IP "\f(CWiso9899:199409\fR" 4
       
  4841 .IX Item "iso9899:199409"
       
  4842 The 1990 C standard, as amended in 1994.
       
  4843 .ie n .IP """iso9899:1999""" 4
       
  4844 .el .IP "\f(CWiso9899:1999\fR" 4
       
  4845 .IX Item "iso9899:1999"
       
  4846 .PD 0
       
  4847 .ie n .IP """c99""" 4
       
  4848 .el .IP "\f(CWc99\fR" 4
       
  4849 .IX Item "c99"
       
  4850 .ie n .IP """iso9899:199x""" 4
       
  4851 .el .IP "\f(CWiso9899:199x\fR" 4
       
  4852 .IX Item "iso9899:199x"
       
  4853 .ie n .IP """c9x""" 4
       
  4854 .el .IP "\f(CWc9x\fR" 4
       
  4855 .IX Item "c9x"
       
  4856 .PD
       
  4857 The revised \s-1ISO\s0 C standard, published in December 1999.  Before
       
  4858 publication, this was known as C9X.
       
  4859 .ie n .IP """gnu89""" 4
       
  4860 .el .IP "\f(CWgnu89\fR" 4
       
  4861 .IX Item "gnu89"
       
  4862 The 1990 C standard plus \s-1GNU\s0 extensions.  This is the default.
       
  4863 .ie n .IP """gnu99""" 4
       
  4864 .el .IP "\f(CWgnu99\fR" 4
       
  4865 .IX Item "gnu99"
       
  4866 .PD 0
       
  4867 .ie n .IP """gnu9x""" 4
       
  4868 .el .IP "\f(CWgnu9x\fR" 4
       
  4869 .IX Item "gnu9x"
       
  4870 .PD
       
  4871 The 1999 C standard plus \s-1GNU\s0 extensions.
       
  4872 .ie n .IP """c++98""" 4
       
  4873 .el .IP "\f(CWc++98\fR" 4
       
  4874 .IX Item "c++98"
       
  4875 The 1998 \s-1ISO\s0 \*(C+ standard plus amendments.
       
  4876 .ie n .IP """gnu++98""" 4
       
  4877 .el .IP "\f(CWgnu++98\fR" 4
       
  4878 .IX Item "gnu++98"
       
  4879 The same as \fB\-std=c++98\fR plus \s-1GNU\s0 extensions.  This is the
       
  4880 default for \*(C+ code.
       
  4881 .RE
       
  4882 .RS 4
       
  4883 .RE
       
  4884 .IP "\fB\-I\-\fR" 4
       
  4885 .IX Item "-I-"
       
  4886 Split the include path.  Any directories specified with \fB\-I\fR
       
  4887 options before \fB\-I\-\fR are searched only for headers requested with
       
  4888 \&\f(CW\*(C`#include\ "\f(CIfile\f(CW"\*(C'\fR; they are not searched for
       
  4889 \&\f(CW\*(C`#include\ <\f(CIfile\f(CW>\*(C'\fR.  If additional directories are
       
  4890 specified with \fB\-I\fR options after the \fB\-I\-\fR, those
       
  4891 directories are searched for all \fB#include\fR directives.
       
  4892 .Sp
       
  4893 In addition, \fB\-I\-\fR inhibits the use of the directory of the current
       
  4894 file directory as the first search directory for \f(CW\*(C`#include\ "\f(CIfile\f(CW"\*(C'\fR.
       
  4895 .IP "\fB\-nostdinc\fR" 4
       
  4896 .IX Item "-nostdinc"
       
  4897 Do not search the standard system directories for header files.
       
  4898 Only the directories you have specified with \fB\-I\fR options
       
  4899 (and the directory of the current file, if appropriate) are searched.
       
  4900 .IP "\fB\-nostdinc++\fR" 4
       
  4901 .IX Item "-nostdinc++"
       
  4902 Do not search for header files in the \*(C+\-specific standard directories,
       
  4903 but do still search the other standard directories.  (This option is
       
  4904 used when building the \*(C+ library.)
       
  4905 .IP "\fB\-include\fR \fIfile\fR" 4
       
  4906 .IX Item "-include file"
       
  4907 Process \fIfile\fR as if \f(CW\*(C`#include "file"\*(C'\fR appeared as the first
       
  4908 line of the primary source file.  However, the first directory searched
       
  4909 for \fIfile\fR is the preprocessor's working directory \fIinstead of\fR
       
  4910 the directory containing the main source file.  If not found there, it
       
  4911 is searched for in the remainder of the \f(CW\*(C`#include "..."\*(C'\fR search
       
  4912 chain as normal.
       
  4913 .Sp
       
  4914 If multiple \fB\-include\fR options are given, the files are included
       
  4915 in the order they appear on the command line.
       
  4916 .IP "\fB\-imacros\fR \fIfile\fR" 4
       
  4917 .IX Item "-imacros file"
       
  4918 Exactly like \fB\-include\fR, except that any output produced by
       
  4919 scanning \fIfile\fR is thrown away.  Macros it defines remain defined.
       
  4920 This allows you to acquire all the macros from a header without also
       
  4921 processing its declarations.
       
  4922 .Sp
       
  4923 All files specified by \fB\-imacros\fR are processed before all files
       
  4924 specified by \fB\-include\fR.
       
  4925 .IP "\fB\-idirafter\fR \fIdir\fR" 4
       
  4926 .IX Item "-idirafter dir"
       
  4927 Search \fIdir\fR for header files, but do it \fIafter\fR all
       
  4928 directories specified with \fB\-I\fR and the standard system directories
       
  4929 have been exhausted.  \fIdir\fR is treated as a system include directory.
       
  4930 .IP "\fB\-iprefix\fR \fIprefix\fR" 4
       
  4931 .IX Item "-iprefix prefix"
       
  4932 Specify \fIprefix\fR as the prefix for subsequent \fB\-iwithprefix\fR
       
  4933 options.  If the prefix represents a directory, you should include the
       
  4934 final \fB/\fR.
       
  4935 .IP "\fB\-iwithprefix\fR \fIdir\fR" 4
       
  4936 .IX Item "-iwithprefix dir"
       
  4937 .PD 0
       
  4938 .IP "\fB\-iwithprefixbefore\fR \fIdir\fR" 4
       
  4939 .IX Item "-iwithprefixbefore dir"
       
  4940 .PD
       
  4941 Append \fIdir\fR to the prefix specified previously with
       
  4942 \&\fB\-iprefix\fR, and add the resulting directory to the include search
       
  4943 path.  \fB\-iwithprefixbefore\fR puts it in the same place \fB\-I\fR
       
  4944 would; \fB\-iwithprefix\fR puts it where \fB\-idirafter\fR would.
       
  4945 .IP "\fB\-isystem\fR \fIdir\fR" 4
       
  4946 .IX Item "-isystem dir"
       
  4947 Search \fIdir\fR for header files, after all directories specified by
       
  4948 \&\fB\-I\fR but before the standard system directories.  Mark it
       
  4949 as a system directory, so that it gets the same special treatment as
       
  4950 is applied to the standard system directories.
       
  4951 .IP "\fB\-fdollars\-in\-identifiers\fR" 4
       
  4952 .IX Item "-fdollars-in-identifiers"
       
  4953 @anchor{fdollars\-in\-identifiers}
       
  4954 Accept \fB$\fR in identifiers.
       
  4955 .IP "\fB\-fpreprocessed\fR" 4
       
  4956 .IX Item "-fpreprocessed"
       
  4957 Indicate to the preprocessor that the input file has already been
       
  4958 preprocessed.  This suppresses things like macro expansion, trigraph
       
  4959 conversion, escaped newline splicing, and processing of most directives.
       
  4960 The preprocessor still recognizes and removes comments, so that you can
       
  4961 pass a file preprocessed with \fB\-C\fR to the compiler without
       
  4962 problems.  In this mode the integrated preprocessor is little more than
       
  4963 a tokenizer for the front ends.
       
  4964 .Sp
       
  4965 \&\fB\-fpreprocessed\fR is implicit if the input file has one of the
       
  4966 extensions \fB.i\fR, \fB.ii\fR or \fB.mi\fR.  These are the
       
  4967 extensions that \s-1GCC\s0 uses for preprocessed files created by
       
  4968 \&\fB\-save\-temps\fR.
       
  4969 .IP "\fB\-ftabstop=\fR\fIwidth\fR" 4
       
  4970 .IX Item "-ftabstop=width"
       
  4971 Set the distance between tab stops.  This helps the preprocessor report
       
  4972 correct column numbers in warnings or errors, even if tabs appear on the
       
  4973 line.  If the value is less than 1 or greater than 100, the option is
       
  4974 ignored.  The default is 8.
       
  4975 .IP "\fB\-fexec\-charset=\fR\fIcharset\fR" 4
       
  4976 .IX Item "-fexec-charset=charset"
       
  4977 Set the execution character set, used for string and character
       
  4978 constants.  The default is \s-1UTF\-8\s0.  \fIcharset\fR can be any encoding
       
  4979 supported by the system's \f(CW\*(C`iconv\*(C'\fR library routine.
       
  4980 .IP "\fB\-fwide\-exec\-charset=\fR\fIcharset\fR" 4
       
  4981 .IX Item "-fwide-exec-charset=charset"
       
  4982 Set the wide execution character set, used for wide string and
       
  4983 character constants.  The default is \s-1UTF\-32\s0 or \s-1UTF\-16\s0, whichever
       
  4984 corresponds to the width of \f(CW\*(C`wchar_t\*(C'\fR.  As with
       
  4985 \&\fB\-ftarget\-charset\fR, \fIcharset\fR can be any encoding supported
       
  4986 by the system's \f(CW\*(C`iconv\*(C'\fR library routine; however, you will have
       
  4987 problems with encodings that do not fit exactly in \f(CW\*(C`wchar_t\*(C'\fR.
       
  4988 .IP "\fB\-finput\-charset=\fR\fIcharset\fR" 4
       
  4989 .IX Item "-finput-charset=charset"
       
  4990 Set the input character set, used for translation from the character
       
  4991 set of the input file to the source character set used by \s-1GCC\s0. If the
       
  4992 locale does not specify, or \s-1GCC\s0 cannot get this information from the
       
  4993 locale, the default is \s-1UTF\-8\s0. This can be overridden by either the locale
       
  4994 or this command line option. Currently the command line option takes
       
  4995 precedence if there's a conflict. \fIcharset\fR can be any encoding
       
  4996 supported by the system's \f(CW\*(C`iconv\*(C'\fR library routine.
       
  4997 .IP "\fB\-fworking\-directory\fR" 4
       
  4998 .IX Item "-fworking-directory"
       
  4999 Enable generation of linemarkers in the preprocessor output that will
       
  5000 let the compiler know the current working directory at the time of
       
  5001 preprocessing.  When this option is enabled, the preprocessor will
       
  5002 emit, after the initial linemarker, a second linemarker with the
       
  5003 current working directory followed by two slashes.  \s-1GCC\s0 will use this
       
  5004 directory, when it's present in the preprocessed input, as the
       
  5005 directory emitted as the current working directory in some debugging
       
  5006 information formats.  This option is implicitly enabled if debugging
       
  5007 information is enabled, but this can be inhibited with the negated
       
  5008 form \fB\-fno\-working\-directory\fR.  If the \fB\-P\fR flag is
       
  5009 present in the command line, this option has no effect, since no
       
  5010 \&\f(CW\*(C`#line\*(C'\fR directives are emitted whatsoever.
       
  5011 .IP "\fB\-fno\-show\-column\fR" 4
       
  5012 .IX Item "-fno-show-column"
       
  5013 Do not print column numbers in diagnostics.  This may be necessary if
       
  5014 diagnostics are being scanned by a program that does not understand the
       
  5015 column numbers, such as \fBdejagnu\fR.
       
  5016 .IP "\fB\-A\fR \fIpredicate\fR\fB=\fR\fIanswer\fR" 4
       
  5017 .IX Item "-A predicate=answer"
       
  5018 Make an assertion with the predicate \fIpredicate\fR and answer
       
  5019 \&\fIanswer\fR.  This form is preferred to the older form \fB\-A\fR
       
  5020 \&\fIpredicate\fR\fB(\fR\fIanswer\fR\fB)\fR, which is still supported, because
       
  5021 it does not use shell special characters.
       
  5022 .IP "\fB\-A \-\fR\fIpredicate\fR\fB=\fR\fIanswer\fR" 4
       
  5023 .IX Item "-A -predicate=answer"
       
  5024 Cancel an assertion with the predicate \fIpredicate\fR and answer
       
  5025 \&\fIanswer\fR.
       
  5026 .IP "\fB\-dCHARS\fR" 4
       
  5027 .IX Item "-dCHARS"
       
  5028 \&\fI\s-1CHARS\s0\fR is a sequence of one or more of the following characters,
       
  5029 and must not be preceded by a space.  Other characters are interpreted
       
  5030 by the compiler proper, or reserved for future versions of \s-1GCC\s0, and so
       
  5031 are silently ignored.  If you specify characters whose behavior
       
  5032 conflicts, the result is undefined.
       
  5033 .RS 4
       
  5034 .IP "\fBM\fR" 4
       
  5035 .IX Item "M"
       
  5036 Instead of the normal output, generate a list of \fB#define\fR
       
  5037 directives for all the macros defined during the execution of the
       
  5038 preprocessor, including predefined macros.  This gives you a way of
       
  5039 finding out what is predefined in your version of the preprocessor.
       
  5040 Assuming you have no file \fIfoo.h\fR, the command
       
  5041 .Sp
       
  5042 .Vb 1
       
  5043 \&        touch foo.h; cpp -dM foo.h
       
  5044 .Ve
       
  5045 .Sp
       
  5046 will show all the predefined macros.
       
  5047 .IP "\fBD\fR" 4
       
  5048 .IX Item "D"
       
  5049 Like \fBM\fR except in two respects: it does \fInot\fR include the
       
  5050 predefined macros, and it outputs \fIboth\fR the \fB#define\fR
       
  5051 directives and the result of preprocessing.  Both kinds of output go to
       
  5052 the standard output file.
       
  5053 .IP "\fBN\fR" 4
       
  5054 .IX Item "N"
       
  5055 Like \fBD\fR, but emit only the macro names, not their expansions.
       
  5056 .IP "\fBI\fR" 4
       
  5057 .IX Item "I"
       
  5058 Output \fB#include\fR directives in addition to the result of
       
  5059 preprocessing.
       
  5060 .RE
       
  5061 .RS 4
       
  5062 .RE
       
  5063 .IP "\fB\-P\fR" 4
       
  5064 .IX Item "-P"
       
  5065 Inhibit generation of linemarkers in the output from the preprocessor.
       
  5066 This might be useful when running the preprocessor on something that is
       
  5067 not C code, and will be sent to a program which might be confused by the
       
  5068 linemarkers.
       
  5069 .IP "\fB\-C\fR" 4
       
  5070 .IX Item "-C"
       
  5071 Do not discard comments.  All comments are passed through to the output
       
  5072 file, except for comments in processed directives, which are deleted
       
  5073 along with the directive.
       
  5074 .Sp
       
  5075 You should be prepared for side effects when using \fB\-C\fR; it
       
  5076 causes the preprocessor to treat comments as tokens in their own right.
       
  5077 For example, comments appearing at the start of what would be a
       
  5078 directive line have the effect of turning that line into an ordinary
       
  5079 source line, since the first token on the line is no longer a \fB#\fR.
       
  5080 .IP "\fB\-CC\fR" 4
       
  5081 .IX Item "-CC"
       
  5082 Do not discard comments, including during macro expansion.  This is
       
  5083 like \fB\-C\fR, except that comments contained within macros are
       
  5084 also passed through to the output file where the macro is expanded.
       
  5085 .Sp
       
  5086 In addition to the side-effects of the \fB\-C\fR option, the
       
  5087 \&\fB\-CC\fR option causes all \*(C+\-style comments inside a macro
       
  5088 to be converted to C\-style comments.  This is to prevent later use
       
  5089 of that macro from inadvertently commenting out the remainder of
       
  5090 the source line.
       
  5091 .Sp
       
  5092 The \fB\-CC\fR option is generally used to support lint comments.
       
  5093 .IP "\fB\-traditional\-cpp\fR" 4
       
  5094 .IX Item "-traditional-cpp"
       
  5095 Try to imitate the behavior of old-fashioned C preprocessors, as
       
  5096 opposed to \s-1ISO\s0 C preprocessors.
       
  5097 .IP "\fB\-trigraphs\fR" 4
       
  5098 .IX Item "-trigraphs"
       
  5099 Process trigraph sequences.
       
  5100 These are three-character sequences, all starting with \fB??\fR, that
       
  5101 are defined by \s-1ISO\s0 C to stand for single characters.  For example,
       
  5102 \&\fB??/\fR stands for \fB\e\fR, so \fB'??/n'\fR is a character
       
  5103 constant for a newline.  By default, \s-1GCC\s0 ignores trigraphs, but in
       
  5104 standard-conforming modes it converts them.  See the \fB\-std\fR and
       
  5105 \&\fB\-ansi\fR options.
       
  5106 .Sp
       
  5107 The nine trigraphs and their replacements are
       
  5108 .Sp
       
  5109 .Vb 2
       
  5110 \&        Trigraph:       ??(  ??)  ??<  ??>  ??=  ??/  ??'  ??!  ??-
       
  5111 \&        Replacement:      [    ]    {    }    #    \e    ^    |    ~
       
  5112 .Ve
       
  5113 .IP "\fB\-remap\fR" 4
       
  5114 .IX Item "-remap"
       
  5115 Enable special code to work around file systems which only permit very
       
  5116 short file names, such as \s-1MS\-DOS\s0.
       
  5117 .IP "\fB\-\-help\fR" 4
       
  5118 .IX Item "--help"
       
  5119 .PD 0
       
  5120 .IP "\fB\-\-target\-help\fR" 4
       
  5121 .IX Item "--target-help"
       
  5122 .PD
       
  5123 Print text describing all the command line options instead of
       
  5124 preprocessing anything.
       
  5125 .IP "\fB\-v\fR" 4
       
  5126 .IX Item "-v"
       
  5127 Verbose mode.  Print out \s-1GNU\s0 \s-1CPP\s0's version number at the beginning of
       
  5128 execution, and report the final form of the include path.
       
  5129 .IP "\fB\-H\fR" 4
       
  5130 .IX Item "-H"
       
  5131 Print the name of each header file used, in addition to other normal
       
  5132 activities.  Each name is indented to show how deep in the
       
  5133 \&\fB#include\fR stack it is.  Precompiled header files are also
       
  5134 printed, even if they are found to be invalid; an invalid precompiled
       
  5135 header file is printed with \fB...x\fR and a valid one with \fB...!\fR .
       
  5136 .IP "\fB\-version\fR" 4
       
  5137 .IX Item "-version"
       
  5138 .PD 0
       
  5139 .IP "\fB\-\-version\fR" 4
       
  5140 .IX Item "--version"
       
  5141 .PD
       
  5142 Print out \s-1GNU\s0 \s-1CPP\s0's version number.  With one dash, proceed to
       
  5143 preprocess as normal.  With two dashes, exit immediately.
       
  5144 .Sh "Passing Options to the Assembler"
       
  5145 .IX Subsection "Passing Options to the Assembler"
       
  5146 You can pass options to the assembler.
       
  5147 .IP "\fB\-Wa,\fR\fIoption\fR" 4
       
  5148 .IX Item "-Wa,option"
       
  5149 Pass \fIoption\fR as an option to the assembler.  If \fIoption\fR
       
  5150 contains commas, it is split into multiple options at the commas.
       
  5151 .IP "\fB\-Xassembler\fR \fIoption\fR" 4
       
  5152 .IX Item "-Xassembler option"
       
  5153 Pass \fIoption\fR as an option to the assembler.  You can use this to
       
  5154 supply system-specific assembler options which \s-1GCC\s0 does not know how to
       
  5155 recognize.
       
  5156 .Sp
       
  5157 If you want to pass an option that takes an argument, you must use
       
  5158 \&\fB\-Xassembler\fR twice, once for the option and once for the argument.
       
  5159 .Sh "Options for Linking"
       
  5160 .IX Subsection "Options for Linking"
       
  5161 These options come into play when the compiler links object files into
       
  5162 an executable output file.  They are meaningless if the compiler is
       
  5163 not doing a link step.
       
  5164 .IP "\fIobject-file-name\fR" 4
       
  5165 .IX Item "object-file-name"
       
  5166 A file name that does not end in a special recognized suffix is
       
  5167 considered to name an object file or library.  (Object files are
       
  5168 distinguished from libraries by the linker according to the file
       
  5169 contents.)  If linking is done, these object files are used as input
       
  5170 to the linker.
       
  5171 .IP "\fB\-c\fR" 4
       
  5172 .IX Item "-c"
       
  5173 .PD 0
       
  5174 .IP "\fB\-S\fR" 4
       
  5175 .IX Item "-S"
       
  5176 .IP "\fB\-E\fR" 4
       
  5177 .IX Item "-E"
       
  5178 .PD
       
  5179 If any of these options is used, then the linker is not run, and
       
  5180 object file names should not be used as arguments.  
       
  5181 .IP "\fB\-l\fR\fIlibrary\fR" 4
       
  5182 .IX Item "-llibrary"
       
  5183 .PD 0
       
  5184 .IP "\fB\-l\fR \fIlibrary\fR" 4
       
  5185 .IX Item "-l library"
       
  5186 .PD
       
  5187 Search the library named \fIlibrary\fR when linking.  (The second
       
  5188 alternative with the library as a separate argument is only for
       
  5189 \&\s-1POSIX\s0 compliance and is not recommended.)
       
  5190 .Sp
       
  5191 It makes a difference where in the command you write this option; the
       
  5192 linker searches and processes libraries and object files in the order they
       
  5193 are specified.  Thus, \fBfoo.o \-lz bar.o\fR searches library \fBz\fR
       
  5194 after file \fIfoo.o\fR but before \fIbar.o\fR.  If \fIbar.o\fR refers
       
  5195 to functions in \fBz\fR, those functions may not be loaded.
       
  5196 .Sp
       
  5197 The linker searches a standard list of directories for the library,
       
  5198 which is actually a file named \fIlib\fIlibrary\fI.a\fR.  The linker
       
  5199 then uses this file as if it had been specified precisely by name.
       
  5200 .Sp
       
  5201 The directories searched include several standard system directories
       
  5202 plus any that you specify with \fB\-L\fR.
       
  5203 .Sp
       
  5204 Normally the files found this way are library files\-\-\-archive files
       
  5205 whose members are object files.  The linker handles an archive file by
       
  5206 scanning through it for members which define symbols that have so far
       
  5207 been referenced but not defined.  But if the file that is found is an
       
  5208 ordinary object file, it is linked in the usual fashion.  The only
       
  5209 difference between using an \fB\-l\fR option and specifying a file name
       
  5210 is that \fB\-l\fR surrounds \fIlibrary\fR with \fBlib\fR and \fB.a\fR
       
  5211 and searches several directories.
       
  5212 .IP "\fB\-lobjc\fR" 4
       
  5213 .IX Item "-lobjc"
       
  5214 You need this special case of the \fB\-l\fR option in order to
       
  5215 link an Objective-C program.
       
  5216 .IP "\fB\-nostartfiles\fR" 4
       
  5217 .IX Item "-nostartfiles"
       
  5218 Do not use the standard system startup files when linking.
       
  5219 The standard system libraries are used normally, unless \fB\-nostdlib\fR
       
  5220 or \fB\-nodefaultlibs\fR is used.
       
  5221 .IP "\fB\-nodefaultlibs\fR" 4
       
  5222 .IX Item "-nodefaultlibs"
       
  5223 Do not use the standard system libraries when linking.
       
  5224 Only the libraries you specify will be passed to the linker.
       
  5225 The standard startup files are used normally, unless \fB\-nostartfiles\fR
       
  5226 is used.  The compiler may generate calls to memcmp, memset, and memcpy
       
  5227 for System V (and \s-1ISO\s0 C) environments or to bcopy and bzero for
       
  5228 \&\s-1BSD\s0 environments.  These entries are usually resolved by entries in
       
  5229 libc.  These entry points should be supplied through some other
       
  5230 mechanism when this option is specified.
       
  5231 .IP "\fB\-nostdlib\fR" 4
       
  5232 .IX Item "-nostdlib"
       
  5233 Do not use the standard system startup files or libraries when linking.
       
  5234 No startup files and only the libraries you specify will be passed to
       
  5235 the linker.  The compiler may generate calls to memcmp, memset, and memcpy
       
  5236 for System V (and \s-1ISO\s0 C) environments or to bcopy and bzero for
       
  5237 \&\s-1BSD\s0 environments.  These entries are usually resolved by entries in
       
  5238 libc.  These entry points should be supplied through some other
       
  5239 mechanism when this option is specified.
       
  5240 .Sp
       
  5241 One of the standard libraries bypassed by \fB\-nostdlib\fR and
       
  5242 \&\fB\-nodefaultlibs\fR is \fIlibgcc.a\fR, a library of internal subroutines
       
  5243 that \s-1GCC\s0 uses to overcome shortcomings of particular machines, or special
       
  5244 needs for some languages.
       
  5245 .Sp
       
  5246 In most cases, you need \fIlibgcc.a\fR even when you want to avoid
       
  5247 other standard libraries.  In other words, when you specify \fB\-nostdlib\fR
       
  5248 or \fB\-nodefaultlibs\fR you should usually specify \fB\-lgcc\fR as well.
       
  5249 This ensures that you have no unresolved references to internal \s-1GCC\s0
       
  5250 library subroutines.  (For example, \fB_\|_main\fR, used to ensure \*(C+
       
  5251 constructors will be called.)
       
  5252 .IP "\fB\-pie\fR" 4
       
  5253 .IX Item "-pie"
       
  5254 Produce a position independent executable on targets which support it.
       
  5255 For predictable results, you must also specify the same set of options
       
  5256 that were used to generate code (\fB\-fpie\fR, \fB\-fPIE\fR,
       
  5257 or model suboptions) when you specify this option.
       
  5258 .IP "\fB\-s\fR" 4
       
  5259 .IX Item "-s"
       
  5260 Remove all symbol table and relocation information from the executable.
       
  5261 .IP "\fB\-static\fR" 4
       
  5262 .IX Item "-static"
       
  5263 On systems that support dynamic linking, this prevents linking with the shared
       
  5264 libraries.  On other systems, this option has no effect.
       
  5265 .IP "\fB\-shared\fR" 4
       
  5266 .IX Item "-shared"
       
  5267 Produce a shared object which can then be linked with other objects to
       
  5268 form an executable.  Not all systems support this option.  For predictable
       
  5269 results, you must also specify the same set of options that were used to
       
  5270 generate code (\fB\-fpic\fR, \fB\-fPIC\fR, or model suboptions)
       
  5271 when you specify this option.[1]
       
  5272 .IP "\fB\-shared\-libgcc\fR" 4
       
  5273 .IX Item "-shared-libgcc"
       
  5274 .PD 0
       
  5275 .IP "\fB\-static\-libgcc\fR" 4
       
  5276 .IX Item "-static-libgcc"
       
  5277 .PD
       
  5278 On systems that provide \fIlibgcc\fR as a shared library, these options
       
  5279 force the use of either the shared or static version respectively.
       
  5280 If no shared version of \fIlibgcc\fR was built when the compiler was
       
  5281 configured, these options have no effect.
       
  5282 .Sp
       
  5283 There are several situations in which an application should use the
       
  5284 shared \fIlibgcc\fR instead of the static version.  The most common
       
  5285 of these is when the application wishes to throw and catch exceptions
       
  5286 across different shared libraries.  In that case, each of the libraries
       
  5287 as well as the application itself should use the shared \fIlibgcc\fR.
       
  5288 .Sp
       
  5289 Therefore, the G++ and \s-1GCJ\s0 drivers automatically add
       
  5290 \&\fB\-shared\-libgcc\fR whenever you build a shared library or a main
       
  5291 executable, because \*(C+ and Java programs typically use exceptions, so
       
  5292 this is the right thing to do.
       
  5293 .Sp
       
  5294 If, instead, you use the \s-1GCC\s0 driver to create shared libraries, you may
       
  5295 find that they will not always be linked with the shared \fIlibgcc\fR.
       
  5296 If \s-1GCC\s0 finds, at its configuration time, that you have a non-GNU linker
       
  5297 or a \s-1GNU\s0 linker that does not support option \fB\-\-eh\-frame\-hdr\fR,
       
  5298 it will link the shared version of \fIlibgcc\fR into shared libraries
       
  5299 by default.  Otherwise, it will take advantage of the linker and optimize
       
  5300 away the linking with the shared version of \fIlibgcc\fR, linking with
       
  5301 the static version of libgcc by default.  This allows exceptions to
       
  5302 propagate through such shared libraries, without incurring relocation
       
  5303 costs at library load time.
       
  5304 .Sp
       
  5305 However, if a library or main executable is supposed to throw or catch
       
  5306 exceptions, you must link it using the G++ or \s-1GCJ\s0 driver, as appropriate
       
  5307 for the languages used in the program, or using the option
       
  5308 \&\fB\-shared\-libgcc\fR, such that it is linked with the shared
       
  5309 \&\fIlibgcc\fR.
       
  5310 .IP "\fB\-symbolic\fR" 4
       
  5311 .IX Item "-symbolic"
       
  5312 Bind references to global symbols when building a shared object.  Warn
       
  5313 about any unresolved references (unless overridden by the link editor
       
  5314 option \fB\-Xlinker \-z \-Xlinker defs\fR).  Only a few systems support
       
  5315 this option.
       
  5316 .IP "\fB\-Xlinker\fR \fIoption\fR" 4
       
  5317 .IX Item "-Xlinker option"
       
  5318 Pass \fIoption\fR as an option to the linker.  You can use this to
       
  5319 supply system-specific linker options which \s-1GCC\s0 does not know how to
       
  5320 recognize.
       
  5321 .Sp
       
  5322 If you want to pass an option that takes an argument, you must use
       
  5323 \&\fB\-Xlinker\fR twice, once for the option and once for the argument.
       
  5324 For example, to pass \fB\-assert definitions\fR, you must write
       
  5325 \&\fB\-Xlinker \-assert \-Xlinker definitions\fR.  It does not work to write
       
  5326 \&\fB\-Xlinker \*(L"\-assert definitions\*(R"\fR, because this passes the entire
       
  5327 string as a single argument, which is not what the linker expects.
       
  5328 .IP "\fB\-Wl,\fR\fIoption\fR" 4
       
  5329 .IX Item "-Wl,option"
       
  5330 Pass \fIoption\fR as an option to the linker.  If \fIoption\fR contains
       
  5331 commas, it is split into multiple options at the commas.
       
  5332 .IP "\fB\-u\fR \fIsymbol\fR" 4
       
  5333 .IX Item "-u symbol"
       
  5334 Pretend the symbol \fIsymbol\fR is undefined, to force linking of
       
  5335 library modules to define it.  You can use \fB\-u\fR multiple times with
       
  5336 different symbols to force loading of additional library modules.
       
  5337 .Sh "Options for Directory Search"
       
  5338 .IX Subsection "Options for Directory Search"
       
  5339 These options specify directories to search for header files, for
       
  5340 libraries and for parts of the compiler:
       
  5341 .IP "\fB\-I\fR\fIdir\fR" 4
       
  5342 .IX Item "-Idir"
       
  5343 Add the directory \fIdir\fR to the head of the list of directories to be
       
  5344 searched for header files.  This can be used to override a system header
       
  5345 file, substituting your own version, since these directories are
       
  5346 searched before the system header file directories.  However, you should
       
  5347 not use this option to add directories that contain vendor-supplied
       
  5348 system header files (use \fB\-isystem\fR for that).  If you use more than
       
  5349 one \fB\-I\fR option, the directories are scanned in left-to-right
       
  5350 order; the standard system directories come after.
       
  5351 .Sp
       
  5352 If a standard system include directory, or a directory specified with
       
  5353 \&\fB\-isystem\fR, is also specified with \fB\-I\fR, the \fB\-I\fR
       
  5354 option will be ignored.  The directory will still be searched but as a
       
  5355 system directory at its normal position in the system include chain.
       
  5356 This is to ensure that \s-1GCC\s0's procedure to fix buggy system headers and
       
  5357 the ordering for the include_next directive are not inadvertently changed.
       
  5358 If you really need to change the search order for system directories,
       
  5359 use the \fB\-nostdinc\fR and/or \fB\-isystem\fR options.
       
  5360 .IP "\fB\-I\-\fR" 4
       
  5361 .IX Item "-I-"
       
  5362 Any directories you specify with \fB\-I\fR options before the \fB\-I\-\fR
       
  5363 option are searched only for the case of \fB#include "\fR\fIfile\fR\fB"\fR;
       
  5364 they are not searched for \fB#include <\fR\fIfile\fR\fB>\fR.
       
  5365 .Sp
       
  5366 If additional directories are specified with \fB\-I\fR options after
       
  5367 the \fB\-I\-\fR, these directories are searched for all \fB#include\fR
       
  5368 directives.  (Ordinarily \fIall\fR \fB\-I\fR directories are used
       
  5369 this way.)
       
  5370 .Sp
       
  5371 In addition, the \fB\-I\-\fR option inhibits the use of the current
       
  5372 directory (where the current input file came from) as the first search
       
  5373 directory for \fB#include "\fR\fIfile\fR\fB"\fR.  There is no way to
       
  5374 override this effect of \fB\-I\-\fR.  With \fB\-I.\fR you can specify
       
  5375 searching the directory which was current when the compiler was
       
  5376 invoked.  That is not exactly the same as what the preprocessor does
       
  5377 by default, but it is often satisfactory.
       
  5378 .Sp
       
  5379 \&\fB\-I\-\fR does not inhibit the use of the standard system directories
       
  5380 for header files.  Thus, \fB\-I\-\fR and \fB\-nostdinc\fR are
       
  5381 independent.
       
  5382 .IP "\fB\-L\fR\fIdir\fR" 4
       
  5383 .IX Item "-Ldir"
       
  5384 Add directory \fIdir\fR to the list of directories to be searched
       
  5385 for \fB\-l\fR.
       
  5386 .IP "\fB\-B\fR\fIprefix\fR" 4
       
  5387 .IX Item "-Bprefix"
       
  5388 This option specifies where to find the executables, libraries,
       
  5389 include files, and data files of the compiler itself.
       
  5390 .Sp
       
  5391 The compiler driver program runs one or more of the subprograms
       
  5392 \&\fIcpp\fR, \fIcc1\fR, \fIas\fR and \fIld\fR.  It tries
       
  5393 \&\fIprefix\fR as a prefix for each program it tries to run, both with and
       
  5394 without \fImachine\fR\fB/\fR\fIversion\fR\fB/\fR.
       
  5395 .Sp
       
  5396 For each subprogram to be run, the compiler driver first tries the
       
  5397 \&\fB\-B\fR prefix, if any.  If that name is not found, or if \fB\-B\fR
       
  5398 was not specified, the driver tries two standard prefixes, which are
       
  5399 \&\fI/usr/lib/gcc/\fR and \fI/usr/local/lib/gcc/\fR.  If neither of
       
  5400 those results in a file name that is found, the unmodified program
       
  5401 name is searched for using the directories specified in your
       
  5402 \&\fB\s-1PATH\s0\fR environment variable.
       
  5403 .Sp
       
  5404 The compiler will check to see if the path provided by the \fB\-B\fR
       
  5405 refers to a directory, and if necessary it will add a directory
       
  5406 separator character at the end of the path.
       
  5407 .Sp
       
  5408 \&\fB\-B\fR prefixes that effectively specify directory names also apply
       
  5409 to libraries in the linker, because the compiler translates these
       
  5410 options into \fB\-L\fR options for the linker.  They also apply to
       
  5411 includes files in the preprocessor, because the compiler translates these
       
  5412 options into \fB\-isystem\fR options for the preprocessor.  In this case,
       
  5413 the compiler appends \fBinclude\fR to the prefix.
       
  5414 .Sp
       
  5415 The run-time support file \fIlibgcc.a\fR can also be searched for using
       
  5416 the \fB\-B\fR prefix, if needed.  If it is not found there, the two
       
  5417 standard prefixes above are tried, and that is all.  The file is left
       
  5418 out of the link if it is not found by those means.
       
  5419 .Sp
       
  5420 Another way to specify a prefix much like the \fB\-B\fR prefix is to use
       
  5421 the environment variable \fB\s-1GCC_EXEC_PREFIX\s0\fR.  
       
  5422 .Sp
       
  5423 As a special kludge, if the path provided by \fB\-B\fR is
       
  5424 \&\fI[dir/]stage\fIN\fI/\fR, where \fIN\fR is a number in the range 0 to
       
  5425 9, then it will be replaced by \fI[dir/]include\fR.  This is to help
       
  5426 with boot-strapping the compiler.
       
  5427 .IP "\fB\-specs=\fR\fIfile\fR" 4
       
  5428 .IX Item "-specs=file"
       
  5429 Process \fIfile\fR after the compiler reads in the standard \fIspecs\fR
       
  5430 file, in order to override the defaults that the \fIgcc\fR driver
       
  5431 program uses when determining what switches to pass to \fIcc1\fR,
       
  5432 \&\fIcc1plus\fR, \fIas\fR, \fIld\fR, etc.  More than one
       
  5433 \&\fB\-specs=\fR\fIfile\fR can be specified on the command line, and they
       
  5434 are processed in order, from left to right.
       
  5435 .Sh "Specifying Target Machine and Compiler Version"
       
  5436 .IX Subsection "Specifying Target Machine and Compiler Version"
       
  5437 The usual way to run \s-1GCC\s0 is to run the executable called \fIgcc\fR, or
       
  5438 \&\fI<machine>\-gcc\fR when cross\-compiling, or
       
  5439 \&\fI<machine>\-gcc\-<version>\fR to run a version other than the one that
       
  5440 was installed last.  Sometimes this is inconvenient, so \s-1GCC\s0 provides
       
  5441 options that will switch to another cross-compiler or version.
       
  5442 .IP "\fB\-b\fR \fImachine\fR" 4
       
  5443 .IX Item "-b machine"
       
  5444 The argument \fImachine\fR specifies the target machine for compilation.
       
  5445 .Sp
       
  5446 The value to use for \fImachine\fR is the same as was specified as the
       
  5447 machine type when configuring \s-1GCC\s0 as a cross\-compiler.  For
       
  5448 example, if a cross-compiler was configured with \fBconfigure
       
  5449 i386v\fR, meaning to compile for an 80386 running System V, then you
       
  5450 would specify \fB\-b i386v\fR to run that cross compiler.
       
  5451 .IP "\fB\-V\fR \fIversion\fR" 4
       
  5452 .IX Item "-V version"
       
  5453 The argument \fIversion\fR specifies which version of \s-1GCC\s0 to run.
       
  5454 This is useful when multiple versions are installed.  For example,
       
  5455 \&\fIversion\fR might be \fB2.0\fR, meaning to run \s-1GCC\s0 version 2.0.
       
  5456 .PP
       
  5457 The \fB\-V\fR and \fB\-b\fR options work by running the
       
  5458 \&\fI<machine>\-gcc\-<version>\fR executable, so there's no real reason to
       
  5459 use them if you can just run that directly.
       
  5460 .Sh "Hardware Models and Configurations"
       
  5461 .IX Subsection "Hardware Models and Configurations"
       
  5462 Earlier we discussed the standard option \fB\-b\fR which chooses among
       
  5463 different installed compilers for completely different target
       
  5464 machines, such as \s-1VAX\s0 vs. 68000 vs. 80386.
       
  5465 .PP
       
  5466 In addition, each of these target machine types can have its own
       
  5467 special options, starting with \fB\-m\fR, to choose among various
       
  5468 hardware models or configurations\-\-\-for example, 68010 vs 68020,
       
  5469 floating coprocessor or none.  A single installed version of the
       
  5470 compiler can compile for any model or configuration, according to the
       
  5471 options specified.
       
  5472 .PP
       
  5473 Some configurations of the compiler also support additional special
       
  5474 options, usually for compatibility with other compilers on the same
       
  5475 platform.
       
  5476 .PP
       
  5477 These options are defined by the macro \f(CW\*(C`TARGET_SWITCHES\*(C'\fR in the
       
  5478 machine description.  The default for the options is also defined by
       
  5479 that macro, which enables you to change the defaults.
       
  5480 .PP
       
  5481 \fIM680x0 Options\fR
       
  5482 .IX Subsection "M680x0 Options"
       
  5483 .PP
       
  5484 These are the \fB\-m\fR options defined for the 68000 series.  The default
       
  5485 values for these options depends on which style of 68000 was selected when
       
  5486 the compiler was configured; the defaults for the most common choices are
       
  5487 given below.
       
  5488 .IP "\fB\-m68000\fR" 4
       
  5489 .IX Item "-m68000"
       
  5490 .PD 0
       
  5491 .IP "\fB\-mc68000\fR" 4
       
  5492 .IX Item "-mc68000"
       
  5493 .PD
       
  5494 Generate output for a 68000.  This is the default
       
  5495 when the compiler is configured for 68000\-based systems.
       
  5496 .Sp
       
  5497 Use this option for microcontrollers with a 68000 or \s-1EC000\s0 core,
       
  5498 including the 68008, 68302, 68306, 68307, 68322, 68328 and 68356.
       
  5499 .IP "\fB\-m68020\fR" 4
       
  5500 .IX Item "-m68020"
       
  5501 .PD 0
       
  5502 .IP "\fB\-mc68020\fR" 4
       
  5503 .IX Item "-mc68020"
       
  5504 .PD
       
  5505 Generate output for a 68020.  This is the default
       
  5506 when the compiler is configured for 68020\-based systems.
       
  5507 .IP "\fB\-m68881\fR" 4
       
  5508 .IX Item "-m68881"
       
  5509 Generate output containing 68881 instructions for floating point.
       
  5510 This is the default for most 68020 systems unless \fB\-\-nfp\fR was
       
  5511 specified when the compiler was configured.
       
  5512 .IP "\fB\-m68030\fR" 4
       
  5513 .IX Item "-m68030"
       
  5514 Generate output for a 68030.  This is the default when the compiler is
       
  5515 configured for 68030\-based systems.
       
  5516 .IP "\fB\-m68040\fR" 4
       
  5517 .IX Item "-m68040"
       
  5518 Generate output for a 68040.  This is the default when the compiler is
       
  5519 configured for 68040\-based systems.
       
  5520 .Sp
       
  5521 This option inhibits the use of 68881/68882 instructions that have to be
       
  5522 emulated by software on the 68040.  Use this option if your 68040 does not
       
  5523 have code to emulate those instructions.
       
  5524 .IP "\fB\-m68060\fR" 4
       
  5525 .IX Item "-m68060"
       
  5526 Generate output for a 68060.  This is the default when the compiler is
       
  5527 configured for 68060\-based systems.
       
  5528 .Sp
       
  5529 This option inhibits the use of 68020 and 68881/68882 instructions that
       
  5530 have to be emulated by software on the 68060.  Use this option if your 68060
       
  5531 does not have code to emulate those instructions.
       
  5532 .IP "\fB\-mcpu32\fR" 4
       
  5533 .IX Item "-mcpu32"
       
  5534 Generate output for a \s-1CPU32\s0.  This is the default
       
  5535 when the compiler is configured for CPU32\-based systems.
       
  5536 .Sp
       
  5537 Use this option for microcontrollers with a
       
  5538 \&\s-1CPU32\s0 or \s-1CPU32+\s0 core, including the 68330, 68331, 68332, 68333, 68334,
       
  5539 68336, 68340, 68341, 68349 and 68360.
       
  5540 .IP "\fB\-m5200\fR" 4
       
  5541 .IX Item "-m5200"
       
  5542 Generate output for a 520X ``coldfire'' family cpu.  This is the default
       
  5543 when the compiler is configured for 520X\-based systems.
       
  5544 .Sp
       
  5545 Use this option for microcontroller with a 5200 core, including
       
  5546 the \s-1MCF5202\s0, \s-1MCF5203\s0, \s-1MCF5204\s0 and \s-1MCF5202\s0.
       
  5547 .IP "\fB\-m68020\-40\fR" 4
       
  5548 .IX Item "-m68020-40"
       
  5549 Generate output for a 68040, without using any of the new instructions.
       
  5550 This results in code which can run relatively efficiently on either a
       
  5551 68020/68881 or a 68030 or a 68040.  The generated code does use the
       
  5552 68881 instructions that are emulated on the 68040.
       
  5553 .IP "\fB\-m68020\-60\fR" 4
       
  5554 .IX Item "-m68020-60"
       
  5555 Generate output for a 68060, without using any of the new instructions.
       
  5556 This results in code which can run relatively efficiently on either a
       
  5557 68020/68881 or a 68030 or a 68040.  The generated code does use the
       
  5558 68881 instructions that are emulated on the 68060.
       
  5559 .IP "\fB\-msoft\-float\fR" 4
       
  5560 .IX Item "-msoft-float"
       
  5561 Generate output containing library calls for floating point.
       
  5562 \&\fBWarning:\fR the requisite libraries are not available for all m68k
       
  5563 targets.  Normally the facilities of the machine's usual C compiler are
       
  5564 used, but this can't be done directly in cross\-compilation.  You must
       
  5565 make your own arrangements to provide suitable library functions for
       
  5566 cross\-compilation.  The embedded targets \fBm68k\-*\-aout\fR and
       
  5567 \&\fBm68k\-*\-coff\fR do provide software floating point support.
       
  5568 .IP "\fB\-mshort\fR" 4
       
  5569 .IX Item "-mshort"
       
  5570 Consider type \f(CW\*(C`int\*(C'\fR to be 16 bits wide, like \f(CW\*(C`short int\*(C'\fR.
       
  5571 .IP "\fB\-mnobitfield\fR" 4
       
  5572 .IX Item "-mnobitfield"
       
  5573 Do not use the bit-field instructions.  The \fB\-m68000\fR, \fB\-mcpu32\fR
       
  5574 and \fB\-m5200\fR options imply \fB\-mnobitfield\fR.
       
  5575 .IP "\fB\-mbitfield\fR" 4
       
  5576 .IX Item "-mbitfield"
       
  5577 Do use the bit-field instructions.  The \fB\-m68020\fR option implies
       
  5578 \&\fB\-mbitfield\fR.  This is the default if you use a configuration
       
  5579 designed for a 68020.
       
  5580 .IP "\fB\-mrtd\fR" 4
       
  5581 .IX Item "-mrtd"
       
  5582 Use a different function-calling convention, in which functions
       
  5583 that take a fixed number of arguments return with the \f(CW\*(C`rtd\*(C'\fR
       
  5584 instruction, which pops their arguments while returning.  This
       
  5585 saves one instruction in the caller since there is no need to pop
       
  5586 the arguments there.
       
  5587 .Sp
       
  5588 This calling convention is incompatible with the one normally
       
  5589 used on Unix, so you cannot use it if you need to call libraries
       
  5590 compiled with the Unix compiler.
       
  5591 .Sp
       
  5592 Also, you must provide function prototypes for all functions that
       
  5593 take variable numbers of arguments (including \f(CW\*(C`printf\*(C'\fR);
       
  5594 otherwise incorrect code will be generated for calls to those
       
  5595 functions.
       
  5596 .Sp
       
  5597 In addition, seriously incorrect code will result if you call a
       
  5598 function with too many arguments.  (Normally, extra arguments are
       
  5599 harmlessly ignored.)
       
  5600 .Sp
       
  5601 The \f(CW\*(C`rtd\*(C'\fR instruction is supported by the 68010, 68020, 68030,
       
  5602 68040, 68060 and \s-1CPU32\s0 processors, but not by the 68000 or 5200.
       
  5603 .IP "\fB\-malign\-int\fR" 4
       
  5604 .IX Item "-malign-int"
       
  5605 .PD 0
       
  5606 .IP "\fB\-mno\-align\-int\fR" 4
       
  5607 .IX Item "-mno-align-int"
       
  5608 .PD
       
  5609 Control whether \s-1GCC\s0 aligns \f(CW\*(C`int\*(C'\fR, \f(CW\*(C`long\*(C'\fR, \f(CW\*(C`long long\*(C'\fR,
       
  5610 \&\f(CW\*(C`float\*(C'\fR, \f(CW\*(C`double\*(C'\fR, and \f(CW\*(C`long double\*(C'\fR variables on a 32\-bit
       
  5611 boundary (\fB\-malign\-int\fR) or a 16\-bit boundary (\fB\-mno\-align\-int\fR).
       
  5612 Aligning variables on 32\-bit boundaries produces code that runs somewhat
       
  5613 faster on processors with 32\-bit busses at the expense of more memory.
       
  5614 .Sp
       
  5615 \&\fBWarning:\fR if you use the \fB\-malign\-int\fR switch, \s-1GCC\s0 will
       
  5616 align structures containing the above types  differently than
       
  5617 most published application binary interface specifications for the m68k.
       
  5618 .IP "\fB\-mpcrel\fR" 4
       
  5619 .IX Item "-mpcrel"
       
  5620 Use the pc-relative addressing mode of the 68000 directly, instead of
       
  5621 using a global offset table.  At present, this option implies \fB\-fpic\fR,
       
  5622 allowing at most a 16\-bit offset for pc-relative addressing.  \fB\-fPIC\fR is
       
  5623 not presently supported with \fB\-mpcrel\fR, though this could be supported for
       
  5624 68020 and higher processors.
       
  5625 .IP "\fB\-mno\-strict\-align\fR" 4
       
  5626 .IX Item "-mno-strict-align"
       
  5627 .PD 0
       
  5628 .IP "\fB\-mstrict\-align\fR" 4
       
  5629 .IX Item "-mstrict-align"
       
  5630 .PD
       
  5631 Do not (do) assume that unaligned memory references will be handled by
       
  5632 the system.
       
  5633 .IP "\fB\-msep\-data\fR" 4
       
  5634 .IX Item "-msep-data"
       
  5635 Generate code that allows the data segment to be located in a different
       
  5636 area of memory from the text segment.  This allows for execute in place in
       
  5637 an environment without virtual memory management.  This option implies \-fPIC.
       
  5638 .IP "\fB\-mno\-sep\-data\fR" 4
       
  5639 .IX Item "-mno-sep-data"
       
  5640 Generate code that assumes that the data segment follows the text segment.
       
  5641 This is the default.
       
  5642 .IP "\fB\-mid\-shared\-library\fR" 4
       
  5643 .IX Item "-mid-shared-library"
       
  5644 Generate code that supports shared libraries via the library \s-1ID\s0 method.
       
  5645 This allows for execute in place and shared libraries in an environment
       
  5646 without virtual memory management.  This option implies \-fPIC.
       
  5647 .IP "\fB\-mno\-id\-shared\-library\fR" 4
       
  5648 .IX Item "-mno-id-shared-library"
       
  5649 Generate code that doesn't assume \s-1ID\s0 based shared libraries are being used.
       
  5650 This is the default.
       
  5651 .IP "\fB\-mshared\-library\-id=n\fR" 4
       
  5652 .IX Item "-mshared-library-id=n"
       
  5653 Specified the identification number of the \s-1ID\s0 based shared library being
       
  5654 compiled.  Specifying a value of 0 will generate more compact code, specifying
       
  5655 other values will force the allocation of that number to the current
       
  5656 library but is no more space or time efficient than omitting this option.
       
  5657 .PP
       
  5658 \fIM68hc1x Options\fR
       
  5659 .IX Subsection "M68hc1x Options"
       
  5660 .PP
       
  5661 These are the \fB\-m\fR options defined for the 68hc11 and 68hc12
       
  5662 microcontrollers.  The default values for these options depends on
       
  5663 which style of microcontroller was selected when the compiler was configured;
       
  5664 the defaults for the most common choices are given below.
       
  5665 .IP "\fB\-m6811\fR" 4
       
  5666 .IX Item "-m6811"
       
  5667 .PD 0
       
  5668 .IP "\fB\-m68hc11\fR" 4
       
  5669 .IX Item "-m68hc11"
       
  5670 .PD
       
  5671 Generate output for a 68HC11.  This is the default
       
  5672 when the compiler is configured for 68HC11\-based systems.
       
  5673 .IP "\fB\-m6812\fR" 4
       
  5674 .IX Item "-m6812"
       
  5675 .PD 0
       
  5676 .IP "\fB\-m68hc12\fR" 4
       
  5677 .IX Item "-m68hc12"
       
  5678 .PD
       
  5679 Generate output for a 68HC12.  This is the default
       
  5680 when the compiler is configured for 68HC12\-based systems.
       
  5681 .IP "\fB\-m68S12\fR" 4
       
  5682 .IX Item "-m68S12"
       
  5683 .PD 0
       
  5684 .IP "\fB\-m68hcs12\fR" 4
       
  5685 .IX Item "-m68hcs12"
       
  5686 .PD
       
  5687 Generate output for a 68HCS12.
       
  5688 .IP "\fB\-mauto\-incdec\fR" 4
       
  5689 .IX Item "-mauto-incdec"
       
  5690 Enable the use of 68HC12 pre and post auto-increment and auto-decrement
       
  5691 addressing modes.
       
  5692 .IP "\fB\-minmax\fR" 4
       
  5693 .IX Item "-minmax"
       
  5694 .PD 0
       
  5695 .IP "\fB\-nominmax\fR" 4
       
  5696 .IX Item "-nominmax"
       
  5697 .PD
       
  5698 Enable the use of 68HC12 min and max instructions.
       
  5699 .IP "\fB\-mlong\-calls\fR" 4
       
  5700 .IX Item "-mlong-calls"
       
  5701 .PD 0
       
  5702 .IP "\fB\-mno\-long\-calls\fR" 4
       
  5703 .IX Item "-mno-long-calls"
       
  5704 .PD
       
  5705 Treat all calls as being far away (near).  If calls are assumed to be
       
  5706 far away, the compiler will use the \f(CW\*(C`call\*(C'\fR instruction to
       
  5707 call a function and the \f(CW\*(C`rtc\*(C'\fR instruction for returning.
       
  5708 .IP "\fB\-mshort\fR" 4
       
  5709 .IX Item "-mshort"
       
  5710 Consider type \f(CW\*(C`int\*(C'\fR to be 16 bits wide, like \f(CW\*(C`short int\*(C'\fR.
       
  5711 .IP "\fB\-msoft\-reg\-count=\fR\fIcount\fR" 4
       
  5712 .IX Item "-msoft-reg-count=count"
       
  5713 Specify the number of pseudo-soft registers which are used for the
       
  5714 code generation.  The maximum number is 32.  Using more pseudo-soft
       
  5715 register may or may not result in better code depending on the program.
       
  5716 The default is 4 for 68HC11 and 2 for 68HC12.
       
  5717 .PP
       
  5718 \fI\s-1VAX\s0 Options\fR
       
  5719 .IX Subsection "VAX Options"
       
  5720 .PP
       
  5721 These \fB\-m\fR options are defined for the \s-1VAX:\s0
       
  5722 .IP "\fB\-munix\fR" 4
       
  5723 .IX Item "-munix"
       
  5724 Do not output certain jump instructions (\f(CW\*(C`aobleq\*(C'\fR and so on)
       
  5725 that the Unix assembler for the \s-1VAX\s0 cannot handle across long
       
  5726 ranges.
       
  5727 .IP "\fB\-mgnu\fR" 4
       
  5728 .IX Item "-mgnu"
       
  5729 Do output those jump instructions, on the assumption that you
       
  5730 will assemble with the \s-1GNU\s0 assembler.
       
  5731 .IP "\fB\-mg\fR" 4
       
  5732 .IX Item "-mg"
       
  5733 Output code for g\-format floating point numbers instead of d\-format.
       
  5734 .PP
       
  5735 \fI\s-1SPARC\s0 Options\fR
       
  5736 .IX Subsection "SPARC Options"
       
  5737 .PP
       
  5738 These \fB\-m\fR options are supported on the \s-1SPARC:\s0
       
  5739 .IP "\fB\-mno\-app\-regs\fR" 4
       
  5740 .IX Item "-mno-app-regs"
       
  5741 .PD 0
       
  5742 .IP "\fB\-mapp\-regs\fR" 4
       
  5743 .IX Item "-mapp-regs"
       
  5744 .PD
       
  5745 Specify \fB\-mapp\-regs\fR to generate output using the global registers
       
  5746 2 through 4, which the \s-1SPARC\s0 \s-1SVR4\s0 \s-1ABI\s0 reserves for applications.  This
       
  5747 is the default.
       
  5748 .Sp
       
  5749 To be fully \s-1SVR4\s0 \s-1ABI\s0 compliant at the cost of some performance loss,
       
  5750 specify \fB\-mno\-app\-regs\fR.  You should compile libraries and system
       
  5751 software with this option.
       
  5752 .IP "\fB\-mfpu\fR" 4
       
  5753 .IX Item "-mfpu"
       
  5754 .PD 0
       
  5755 .IP "\fB\-mhard\-float\fR" 4
       
  5756 .IX Item "-mhard-float"
       
  5757 .PD
       
  5758 Generate output containing floating point instructions.  This is the
       
  5759 default.
       
  5760 .IP "\fB\-mno\-fpu\fR" 4
       
  5761 .IX Item "-mno-fpu"
       
  5762 .PD 0
       
  5763 .IP "\fB\-msoft\-float\fR" 4
       
  5764 .IX Item "-msoft-float"
       
  5765 .PD
       
  5766 Generate output containing library calls for floating point.
       
  5767 \&\fBWarning:\fR the requisite libraries are not available for all \s-1SPARC\s0
       
  5768 targets.  Normally the facilities of the machine's usual C compiler are
       
  5769 used, but this cannot be done directly in cross\-compilation.  You must make
       
  5770 your own arrangements to provide suitable library functions for
       
  5771 cross\-compilation.  The embedded targets \fBsparc\-*\-aout\fR and
       
  5772 \&\fBsparclite\-*\-*\fR do provide software floating point support.
       
  5773 .Sp
       
  5774 \&\fB\-msoft\-float\fR changes the calling convention in the output file;
       
  5775 therefore, it is only useful if you compile \fIall\fR of a program with
       
  5776 this option.  In particular, you need to compile \fIlibgcc.a\fR, the
       
  5777 library that comes with \s-1GCC\s0, with \fB\-msoft\-float\fR in order for
       
  5778 this to work.
       
  5779 .IP "\fB\-mhard\-quad\-float\fR" 4
       
  5780 .IX Item "-mhard-quad-float"
       
  5781 Generate output containing quad-word (long double) floating point
       
  5782 instructions.
       
  5783 .IP "\fB\-msoft\-quad\-float\fR" 4
       
  5784 .IX Item "-msoft-quad-float"
       
  5785 Generate output containing library calls for quad-word (long double)
       
  5786 floating point instructions.  The functions called are those specified
       
  5787 in the \s-1SPARC\s0 \s-1ABI\s0.  This is the default.
       
  5788 .Sp
       
  5789 As of this writing, there are no \s-1SPARC\s0 implementations that have hardware
       
  5790 support for the quad-word floating point instructions.  They all invoke
       
  5791 a trap handler for one of these instructions, and then the trap handler
       
  5792 emulates the effect of the instruction.  Because of the trap handler overhead,
       
  5793 this is much slower than calling the \s-1ABI\s0 library routines.  Thus the
       
  5794 \&\fB\-msoft\-quad\-float\fR option is the default.
       
  5795 .IP "\fB\-mno\-flat\fR" 4
       
  5796 .IX Item "-mno-flat"
       
  5797 .PD 0
       
  5798 .IP "\fB\-mflat\fR" 4
       
  5799 .IX Item "-mflat"
       
  5800 .PD
       
  5801 With \fB\-mflat\fR, the compiler does not generate save/restore instructions
       
  5802 and will use a ``flat'' or single register window calling convention.
       
  5803 This model uses \f(CW%i7\fR as the frame pointer and is compatible with the normal
       
  5804 register window model.  Code from either may be intermixed.
       
  5805 The local registers and the input registers (0\-\-5) are still treated as
       
  5806 ``call saved'' registers and will be saved on the stack as necessary.
       
  5807 .Sp
       
  5808 With \fB\-mno\-flat\fR (the default), the compiler emits save/restore
       
  5809 instructions (except for leaf functions) and is the normal mode of operation.
       
  5810 .Sp
       
  5811 These options are deprecated and will be deleted in a future \s-1GCC\s0 release.
       
  5812 .IP "\fB\-mno\-unaligned\-doubles\fR" 4
       
  5813 .IX Item "-mno-unaligned-doubles"
       
  5814 .PD 0
       
  5815 .IP "\fB\-munaligned\-doubles\fR" 4
       
  5816 .IX Item "-munaligned-doubles"
       
  5817 .PD
       
  5818 Assume that doubles have 8 byte alignment.  This is the default.
       
  5819 .Sp
       
  5820 With \fB\-munaligned\-doubles\fR, \s-1GCC\s0 assumes that doubles have 8 byte
       
  5821 alignment only if they are contained in another type, or if they have an
       
  5822 absolute address.  Otherwise, it assumes they have 4 byte alignment.
       
  5823 Specifying this option avoids some rare compatibility problems with code
       
  5824 generated by other compilers.  It is not the default because it results
       
  5825 in a performance loss, especially for floating point code.
       
  5826 .IP "\fB\-mno\-faster\-structs\fR" 4
       
  5827 .IX Item "-mno-faster-structs"
       
  5828 .PD 0
       
  5829 .IP "\fB\-mfaster\-structs\fR" 4
       
  5830 .IX Item "-mfaster-structs"
       
  5831 .PD
       
  5832 With \fB\-mfaster\-structs\fR, the compiler assumes that structures
       
  5833 should have 8 byte alignment.  This enables the use of pairs of
       
  5834 \&\f(CW\*(C`ldd\*(C'\fR and \f(CW\*(C`std\*(C'\fR instructions for copies in structure
       
  5835 assignment, in place of twice as many \f(CW\*(C`ld\*(C'\fR and \f(CW\*(C`st\*(C'\fR pairs.
       
  5836 However, the use of this changed alignment directly violates the \s-1SPARC\s0
       
  5837 \&\s-1ABI\s0.  Thus, it's intended only for use on targets where the developer
       
  5838 acknowledges that their resulting code will not be directly in line with
       
  5839 the rules of the \s-1ABI\s0.
       
  5840 .IP "\fB\-mimpure\-text\fR" 4
       
  5841 .IX Item "-mimpure-text"
       
  5842 \&\fB\-mimpure\-text\fR, used in addition to \fB\-shared\fR, tells
       
  5843 the compiler to not pass \fB\-z text\fR to the linker when linking a
       
  5844 shared object.  Using this option, you can link position-dependent
       
  5845 code into a shared object.
       
  5846 .Sp
       
  5847 \&\fB\-mimpure\-text\fR suppresses the ``relocations remain against
       
  5848 allocatable but non-writable sections'' linker error message.
       
  5849 However, the necessary relocations will trigger copy\-on\-write, and the
       
  5850 shared object is not actually shared across processes.  Instead of
       
  5851 using \fB\-mimpure\-text\fR, you should compile all source code with
       
  5852 \&\fB\-fpic\fR or \fB\-fPIC\fR.
       
  5853 .Sp
       
  5854 This option is only available on SunOS and Solaris.
       
  5855 .IP "\fB\-mv8\fR" 4
       
  5856 .IX Item "-mv8"
       
  5857 .PD 0
       
  5858 .IP "\fB\-msparclite\fR" 4
       
  5859 .IX Item "-msparclite"
       
  5860 .PD
       
  5861 These two options select variations on the \s-1SPARC\s0 architecture.
       
  5862 These options are deprecated and will be deleted in a future \s-1GCC\s0 release.
       
  5863 They have been replaced with \fB\-mcpu=xxx\fR.
       
  5864 .IP "\fB\-mcypress\fR" 4
       
  5865 .IX Item "-mcypress"
       
  5866 .PD 0
       
  5867 .IP "\fB\-msupersparc\fR" 4
       
  5868 .IX Item "-msupersparc"
       
  5869 .IP "\fB\-mf930\fR" 4
       
  5870 .IX Item "-mf930"
       
  5871 .IP "\fB\-mf934\fR" 4
       
  5872 .IX Item "-mf934"
       
  5873 .PD
       
  5874 These four options select the processor for which the code is optimized.
       
  5875 These options are deprecated and will be deleted in a future \s-1GCC\s0 release.
       
  5876 They have been replaced with \fB\-mcpu=xxx\fR.
       
  5877 .IP "\fB\-mcpu=\fR\fIcpu_type\fR" 4
       
  5878 .IX Item "-mcpu=cpu_type"
       
  5879 Set the instruction set, register set, and instruction scheduling parameters
       
  5880 for machine type \fIcpu_type\fR.  Supported values for \fIcpu_type\fR are
       
  5881 \&\fBv7\fR, \fBcypress\fR, \fBv8\fR, \fBsupersparc\fR, \fBsparclite\fR,
       
  5882 \&\fBf930\fR, \fBf934\fR, \fBhypersparc\fR, \fBsparclite86x\fR,
       
  5883 \&\fBsparclet\fR, \fBtsc701\fR, \fBv9\fR, \fBultrasparc\fR, and
       
  5884 \&\fBultrasparc3\fR.
       
  5885 .Sp
       
  5886 Default instruction scheduling parameters are used for values that select
       
  5887 an architecture and not an implementation.  These are \fBv7\fR, \fBv8\fR,
       
  5888 \&\fBsparclite\fR, \fBsparclet\fR, \fBv9\fR.
       
  5889 .Sp
       
  5890 Here is a list of each supported architecture and their supported
       
  5891 implementations.
       
  5892 .Sp
       
  5893 .Vb 5
       
  5894 \&            v7:             cypress
       
  5895 \&            v8:             supersparc, hypersparc
       
  5896 \&            sparclite:      f930, f934, sparclite86x
       
  5897 \&            sparclet:       tsc701
       
  5898 \&            v9:             ultrasparc, ultrasparc3
       
  5899 .Ve
       
  5900 .Sp
       
  5901 By default (unless configured otherwise), \s-1GCC\s0 generates code for the V7
       
  5902 variant of the \s-1SPARC\s0 architecture.  With \fB\-mcpu=cypress\fR, the compiler
       
  5903 additionally optimizes it for the Cypress \s-1CY7C602\s0 chip, as used in the
       
  5904 SPARCStation/SPARCServer 3xx series.  This is also appropriate for the older
       
  5905 SPARCStation 1, 2, \s-1IPX\s0 etc.
       
  5906 .Sp
       
  5907 With \fB\-mcpu=v8\fR, \s-1GCC\s0 generates code for the V8 variant of the \s-1SPARC\s0
       
  5908 architecture.  The only difference from V7 code is that the compiler emits
       
  5909 the integer multiply and integer divide instructions which exist in \s-1SPARC\-V8\s0
       
  5910 but not in \s-1SPARC\-V7\s0.  With \fB\-mcpu=supersparc\fR, the compiler additionally
       
  5911 optimizes it for the SuperSPARC chip, as used in the SPARCStation 10, 1000 and
       
  5912 2000 series.
       
  5913 .Sp
       
  5914 With \fB\-mcpu=sparclite\fR, \s-1GCC\s0 generates code for the SPARClite variant of
       
  5915 the \s-1SPARC\s0 architecture.  This adds the integer multiply, integer divide step
       
  5916 and scan (\f(CW\*(C`ffs\*(C'\fR) instructions which exist in SPARClite but not in \s-1SPARC\-V7\s0.
       
  5917 With \fB\-mcpu=f930\fR, the compiler additionally optimizes it for the
       
  5918 Fujitsu \s-1MB86930\s0 chip, which is the original SPARClite, with no \s-1FPU\s0.  With
       
  5919 \&\fB\-mcpu=f934\fR, the compiler additionally optimizes it for the Fujitsu
       
  5920 \&\s-1MB86934\s0 chip, which is the more recent SPARClite with \s-1FPU\s0.
       
  5921 .Sp
       
  5922 With \fB\-mcpu=sparclet\fR, \s-1GCC\s0 generates code for the SPARClet variant of
       
  5923 the \s-1SPARC\s0 architecture.  This adds the integer multiply, multiply/accumulate,
       
  5924 integer divide step and scan (\f(CW\*(C`ffs\*(C'\fR) instructions which exist in SPARClet
       
  5925 but not in \s-1SPARC\-V7\s0.  With \fB\-mcpu=tsc701\fR, the compiler additionally
       
  5926 optimizes it for the \s-1TEMIC\s0 SPARClet chip.
       
  5927 .Sp
       
  5928 With \fB\-mcpu=v9\fR, \s-1GCC\s0 generates code for the V9 variant of the \s-1SPARC\s0
       
  5929 architecture.  This adds 64\-bit integer and floating-point move instructions,
       
  5930 3 additional floating-point condition code registers and conditional move
       
  5931 instructions.  With \fB\-mcpu=ultrasparc\fR, the compiler additionally
       
  5932 optimizes it for the Sun UltraSPARC I/II chips.  With
       
  5933 \&\fB\-mcpu=ultrasparc3\fR, the compiler additionally optimizes it for the
       
  5934 Sun UltraSPARC \s-1III\s0 chip.
       
  5935 .IP "\fB\-mtune=\fR\fIcpu_type\fR" 4
       
  5936 .IX Item "-mtune=cpu_type"
       
  5937 Set the instruction scheduling parameters for machine type
       
  5938 \&\fIcpu_type\fR, but do not set the instruction set or register set that the
       
  5939 option \fB\-mcpu=\fR\fIcpu_type\fR would.
       
  5940 .Sp
       
  5941 The same values for \fB\-mcpu=\fR\fIcpu_type\fR can be used for
       
  5942 \&\fB\-mtune=\fR\fIcpu_type\fR, but the only useful values are those
       
  5943 that select a particular cpu implementation.  Those are \fBcypress\fR,
       
  5944 \&\fBsupersparc\fR, \fBhypersparc\fR, \fBf930\fR, \fBf934\fR,
       
  5945 \&\fBsparclite86x\fR, \fBtsc701\fR, \fBultrasparc\fR, and
       
  5946 \&\fBultrasparc3\fR.
       
  5947 .IP "\fB\-mv8plus\fR" 4
       
  5948 .IX Item "-mv8plus"
       
  5949 .PD 0
       
  5950 .IP "\fB\-mno\-v8plus\fR" 4
       
  5951 .IX Item "-mno-v8plus"
       
  5952 .PD
       
  5953 With \fB\-mv8plus\fR, \s-1GCC\s0 generates code for the \s-1SPARC\-V8+\s0 \s-1ABI\s0.  The
       
  5954 difference from the V8 \s-1ABI\s0 is that the global and out registers are
       
  5955 considered 64\-bit wide.  This is enabled by default on Solaris in 32\-bit
       
  5956 mode for all \s-1SPARC\-V9\s0 processors.
       
  5957 .IP "\fB\-mvis\fR" 4
       
  5958 .IX Item "-mvis"
       
  5959 .PD 0
       
  5960 .IP "\fB\-mno\-vis\fR" 4
       
  5961 .IX Item "-mno-vis"
       
  5962 .PD
       
  5963 With \fB\-mvis\fR, \s-1GCC\s0 generates code that takes advantage of the UltraSPARC
       
  5964 Visual Instruction Set extensions.  The default is \fB\-mno\-vis\fR.
       
  5965 .PP
       
  5966 These \fB\-m\fR options are supported in addition to the above
       
  5967 on \s-1SPARC\-V9\s0 processors in 64\-bit environments:
       
  5968 .IP "\fB\-mlittle\-endian\fR" 4
       
  5969 .IX Item "-mlittle-endian"
       
  5970 Generate code for a processor running in little-endian mode. It is only
       
  5971 available for a few configurations and most notably not on Solaris.
       
  5972 .IP "\fB\-m32\fR" 4
       
  5973 .IX Item "-m32"
       
  5974 .PD 0
       
  5975 .IP "\fB\-m64\fR" 4
       
  5976 .IX Item "-m64"
       
  5977 .PD
       
  5978 Generate code for a 32\-bit or 64\-bit environment.
       
  5979 The 32\-bit environment sets int, long and pointer to 32 bits.
       
  5980 The 64\-bit environment sets int to 32 bits and long and pointer
       
  5981 to 64 bits.
       
  5982 .IP "\fB\-mcmodel=medlow\fR" 4
       
  5983 .IX Item "-mcmodel=medlow"
       
  5984 Generate code for the Medium/Low code model: 64\-bit addresses, programs
       
  5985 must be linked in the low 32 bits of memory.  Programs can be statically
       
  5986 or dynamically linked.
       
  5987 .IP "\fB\-mcmodel=medmid\fR" 4
       
  5988 .IX Item "-mcmodel=medmid"
       
  5989 Generate code for the Medium/Middle code model: 64\-bit addresses, programs
       
  5990 must be linked in the low 44 bits of memory, the text and data segments must
       
  5991 be less than 2GB in size and the data segment must be located within 2GB of
       
  5992 the text segment.
       
  5993 .IP "\fB\-mcmodel=medany\fR" 4
       
  5994 .IX Item "-mcmodel=medany"
       
  5995 Generate code for the Medium/Anywhere code model: 64\-bit addresses, programs
       
  5996 may be linked anywhere in memory, the text and data segments must be less
       
  5997 than 2GB in size and the data segment must be located within 2GB of the
       
  5998 text segment.
       
  5999 .IP "\fB\-mcmodel=embmedany\fR" 4
       
  6000 .IX Item "-mcmodel=embmedany"
       
  6001 Generate code for the Medium/Anywhere code model for embedded systems:
       
  6002 64\-bit addresses, the text and data segments must be less than 2GB in
       
  6003 size, both starting anywhere in memory (determined at link time).  The
       
  6004 global register \f(CW%g4\fR points to the base of the data segment.  Programs
       
  6005 are statically linked and \s-1PIC\s0 is not supported.
       
  6006 .IP "\fB\-mstack\-bias\fR" 4
       
  6007 .IX Item "-mstack-bias"
       
  6008 .PD 0
       
  6009 .IP "\fB\-mno\-stack\-bias\fR" 4
       
  6010 .IX Item "-mno-stack-bias"
       
  6011 .PD
       
  6012 With \fB\-mstack\-bias\fR, \s-1GCC\s0 assumes that the stack pointer, and
       
  6013 frame pointer if present, are offset by \-2047 which must be added back
       
  6014 when making stack frame references.  This is the default in 64\-bit mode.
       
  6015 Otherwise, assume no such offset is present.
       
  6016 .PP
       
  6017 These switches are supported in addition to the above on Solaris:
       
  6018 .IP "\fB\-threads\fR" 4
       
  6019 .IX Item "-threads"
       
  6020 Add support for multithreading using the Solaris threads library.  This
       
  6021 option sets flags for both the preprocessor and linker.  This option does
       
  6022 not affect the thread safety of object code produced by the compiler or
       
  6023 that of libraries supplied with it.
       
  6024 .IP "\fB\-pthreads\fR" 4
       
  6025 .IX Item "-pthreads"
       
  6026 Add support for multithreading using the \s-1POSIX\s0 threads library.  This
       
  6027 option sets flags for both the preprocessor and linker.  This option does
       
  6028 not affect the thread safety of object code produced  by the compiler or
       
  6029 that of libraries supplied with it.
       
  6030 .PP
       
  6031 \fI\s-1ARM\s0 Options\fR
       
  6032 .IX Subsection "ARM Options"
       
  6033 .PP
       
  6034 These \fB\-m\fR options are defined for Advanced \s-1RISC\s0 Machines (\s-1ARM\s0)
       
  6035 architectures:
       
  6036 .IP "\fB\-mapcs\-frame\fR" 4
       
  6037 .IX Item "-mapcs-frame"
       
  6038 Generate a stack frame that is compliant with the \s-1ARM\s0 Procedure Call
       
  6039 Standard for all functions, even if this is not strictly necessary for
       
  6040 correct execution of the code.  Specifying \fB\-fomit\-frame\-pointer\fR
       
  6041 with this option will cause the stack frames not to be generated for
       
  6042 leaf functions.  The default is \fB\-mno\-apcs\-frame\fR.
       
  6043 .IP "\fB\-mapcs\fR" 4
       
  6044 .IX Item "-mapcs"
       
  6045 This is a synonym for \fB\-mapcs\-frame\fR.
       
  6046 .IP "\fB\-mapcs\-26\fR" 4
       
  6047 .IX Item "-mapcs-26"
       
  6048 Generate code for a processor running with a 26\-bit program counter,
       
  6049 and conforming to the function calling standards for the \s-1APCS\s0 26\-bit
       
  6050 option.
       
  6051 .Sp
       
  6052 This option is deprecated.  Future releases of the \s-1GCC\s0 will only support
       
  6053 generating code that runs in apcs\-32 mode.
       
  6054 .IP "\fB\-mapcs\-32\fR" 4
       
  6055 .IX Item "-mapcs-32"
       
  6056 Generate code for a processor running with a 32\-bit program counter,
       
  6057 and conforming to the function calling standards for the \s-1APCS\s0 32\-bit
       
  6058 option.
       
  6059 .Sp
       
  6060 This flag is deprecated.  Future releases of \s-1GCC\s0 will make this flag
       
  6061 unconditional.
       
  6062 .IP "\fB\-mthumb\-interwork\fR" 4
       
  6063 .IX Item "-mthumb-interwork"
       
  6064 Generate code which supports calling between the \s-1ARM\s0 and Thumb
       
  6065 instruction sets.  Without this option the two instruction sets cannot
       
  6066 be reliably used inside one program.  The default is
       
  6067 \&\fB\-mno\-thumb\-interwork\fR, since slightly larger code is generated
       
  6068 when \fB\-mthumb\-interwork\fR is specified.
       
  6069 .IP "\fB\-mno\-sched\-prolog\fR" 4
       
  6070 .IX Item "-mno-sched-prolog"
       
  6071 Prevent the reordering of instructions in the function prolog, or the
       
  6072 merging of those instruction with the instructions in the function's
       
  6073 body.  This means that all functions will start with a recognizable set
       
  6074 of instructions (or in fact one of a choice from a small set of
       
  6075 different function prologues), and this information can be used to
       
  6076 locate the start if functions inside an executable piece of code.  The
       
  6077 default is \fB\-msched\-prolog\fR.
       
  6078 .IP "\fB\-mhard\-float\fR" 4
       
  6079 .IX Item "-mhard-float"
       
  6080 Generate output containing floating point instructions.  This is the
       
  6081 default.
       
  6082 .IP "\fB\-msoft\-float\fR" 4
       
  6083 .IX Item "-msoft-float"
       
  6084 Generate output containing library calls for floating point.
       
  6085 \&\fBWarning:\fR the requisite libraries are not available for all \s-1ARM\s0
       
  6086 targets.  Normally the facilities of the machine's usual C compiler are
       
  6087 used, but this cannot be done directly in cross\-compilation.  You must make
       
  6088 your own arrangements to provide suitable library functions for
       
  6089 cross\-compilation.
       
  6090 .Sp
       
  6091 \&\fB\-msoft\-float\fR changes the calling convention in the output file;
       
  6092 therefore, it is only useful if you compile \fIall\fR of a program with
       
  6093 this option.  In particular, you need to compile \fIlibgcc.a\fR, the
       
  6094 library that comes with \s-1GCC\s0, with \fB\-msoft\-float\fR in order for
       
  6095 this to work.
       
  6096 .IP "\fB\-mlittle\-endian\fR" 4
       
  6097 .IX Item "-mlittle-endian"
       
  6098 Generate code for a processor running in little-endian mode.  This is
       
  6099 the default for all standard configurations.
       
  6100 .IP "\fB\-mbig\-endian\fR" 4
       
  6101 .IX Item "-mbig-endian"
       
  6102 Generate code for a processor running in big-endian mode; the default is
       
  6103 to compile code for a little-endian processor.
       
  6104 .IP "\fB\-mwords\-little\-endian\fR" 4
       
  6105 .IX Item "-mwords-little-endian"
       
  6106 This option only applies when generating code for big-endian processors.
       
  6107 Generate code for a little-endian word order but a big-endian byte
       
  6108 order.  That is, a byte order of the form \fB32107654\fR.  Note: this
       
  6109 option should only be used if you require compatibility with code for
       
  6110 big-endian \s-1ARM\s0 processors generated by versions of the compiler prior to
       
  6111 2.8.
       
  6112 .IP "\fB\-malignment\-traps\fR" 4
       
  6113 .IX Item "-malignment-traps"
       
  6114 Generate code that will not trap if the \s-1MMU\s0 has alignment traps enabled.
       
  6115 On \s-1ARM\s0 architectures prior to ARMv4, there were no instructions to
       
  6116 access half-word objects stored in memory.  However, when reading from
       
  6117 memory a feature of the \s-1ARM\s0 architecture allows a word load to be used,
       
  6118 even if the address is unaligned, and the processor core will rotate the
       
  6119 data as it is being loaded.  This option tells the compiler that such
       
  6120 misaligned accesses will cause a \s-1MMU\s0 trap and that it should instead
       
  6121 synthesize the access as a series of byte accesses.  The compiler can
       
  6122 still use word accesses to load half-word data if it knows that the
       
  6123 address is aligned to a word boundary.
       
  6124 .Sp
       
  6125 This option has no effect when compiling for \s-1ARM\s0 architecture 4 or later,
       
  6126 since these processors have instructions to directly access half-word
       
  6127 objects in memory.
       
  6128 .IP "\fB\-mno\-alignment\-traps\fR" 4
       
  6129 .IX Item "-mno-alignment-traps"
       
  6130 Generate code that assumes that the \s-1MMU\s0 will not trap unaligned
       
  6131 accesses.  This produces better code when the target instruction set
       
  6132 does not have half-word memory operations (i.e. implementations prior to
       
  6133 ARMv4).
       
  6134 .Sp
       
  6135 Note that you cannot use this option to access unaligned word objects,
       
  6136 since the processor will only fetch one 32\-bit aligned object from
       
  6137 memory.
       
  6138 .Sp
       
  6139 The default setting is \fB\-malignment\-traps\fR, since this produces
       
  6140 code that will also run on processors implementing \s-1ARM\s0 architecture
       
  6141 version 6 or later.
       
  6142 .Sp
       
  6143 This option is deprecated and will be removed in the next release of \s-1GCC\s0.
       
  6144 .IP "\fB\-mcpu=\fR\fIname\fR" 4
       
  6145 .IX Item "-mcpu=name"
       
  6146 This specifies the name of the target \s-1ARM\s0 processor.  \s-1GCC\s0 uses this name
       
  6147 to determine what kind of instructions it can emit when generating
       
  6148 assembly code.  Permissible names are: \fBarm2\fR, \fBarm250\fR,
       
  6149 \&\fBarm3\fR, \fBarm6\fR, \fBarm60\fR, \fBarm600\fR, \fBarm610\fR,
       
  6150 \&\fBarm620\fR, \fBarm7\fR, \fBarm7m\fR, \fBarm7d\fR, \fBarm7dm\fR,
       
  6151 \&\fBarm7di\fR, \fBarm7dmi\fR, \fBarm70\fR, \fBarm700\fR,
       
  6152 \&\fBarm700i\fR, \fBarm710\fR, \fBarm710c\fR, \fBarm7100\fR,
       
  6153 \&\fBarm7500\fR, \fBarm7500fe\fR, \fBarm7tdmi\fR, \fBarm8\fR,
       
  6154 \&\fBstrongarm\fR, \fBstrongarm110\fR, \fBstrongarm1100\fR,
       
  6155 \&\fBarm8\fR, \fBarm810\fR, \fBarm9\fR, \fBarm9e\fR, \fBarm920\fR,
       
  6156 \&\fBarm920t\fR, \fBarm926ejs\fR, \fBarm940t\fR, \fBarm9tdmi\fR,
       
  6157 \&\fBarm10tdmi\fR, \fBarm1020t\fR, \fBarm1026ejs\fR,
       
  6158 \&\fBarm1136js\fR, \fBarm1136jfs\fR ,\fBxscale\fR, \fBiwmmxt\fR,
       
  6159 \&\fBep9312\fR.
       
  6160 .IP "\fB\-mtune=\fR\fIname\fR" 4
       
  6161 .IX Item "-mtune=name"
       
  6162 This option is very similar to the \fB\-mcpu=\fR option, except that
       
  6163 instead of specifying the actual target processor type, and hence
       
  6164 restricting which instructions can be used, it specifies that \s-1GCC\s0 should
       
  6165 tune the performance of the code as if the target were of the type
       
  6166 specified in this option, but still choosing the instructions that it
       
  6167 will generate based on the cpu specified by a \fB\-mcpu=\fR option.
       
  6168 For some \s-1ARM\s0 implementations better performance can be obtained by using
       
  6169 this option.
       
  6170 .IP "\fB\-march=\fR\fIname\fR" 4
       
  6171 .IX Item "-march=name"
       
  6172 This specifies the name of the target \s-1ARM\s0 architecture.  \s-1GCC\s0 uses this
       
  6173 name to determine what kind of instructions it can emit when generating
       
  6174 assembly code.  This option can be used in conjunction with or instead
       
  6175 of the \fB\-mcpu=\fR option.  Permissible names are: \fBarmv2\fR,
       
  6176 \&\fBarmv2a\fR, \fBarmv3\fR, \fBarmv3m\fR, \fBarmv4\fR, \fBarmv4t\fR,
       
  6177 \&\fBarmv5\fR, \fBarmv5t\fR, \fBarmv5te\fR, \fBarmv6j\fR,
       
  6178 \&\fBiwmmxt\fR, \fBep9312\fR.
       
  6179 .IP "\fB\-mfpe=\fR\fInumber\fR" 4
       
  6180 .IX Item "-mfpe=number"
       
  6181 .PD 0
       
  6182 .IP "\fB\-mfp=\fR\fInumber\fR" 4
       
  6183 .IX Item "-mfp=number"
       
  6184 .PD
       
  6185 This specifies the version of the floating point emulation available on
       
  6186 the target.  Permissible values are 2 and 3.  \fB\-mfp=\fR is a synonym
       
  6187 for \fB\-mfpe=\fR, for compatibility with older versions of \s-1GCC\s0.
       
  6188 .IP "\fB\-mstructure\-size\-boundary=\fR\fIn\fR" 4
       
  6189 .IX Item "-mstructure-size-boundary=n"
       
  6190 The size of all structures and unions will be rounded up to a multiple
       
  6191 of the number of bits set by this option.  Permissible values are 8 and
       
  6192 32.  The default value varies for different toolchains.  For the \s-1COFF\s0
       
  6193 targeted toolchain the default value is 8.  Specifying the larger number
       
  6194 can produce faster, more efficient code, but can also increase the size
       
  6195 of the program.  The two values are potentially incompatible.  Code
       
  6196 compiled with one value cannot necessarily expect to work with code or
       
  6197 libraries compiled with the other value, if they exchange information
       
  6198 using structures or unions.
       
  6199 .IP "\fB\-mabort\-on\-noreturn\fR" 4
       
  6200 .IX Item "-mabort-on-noreturn"
       
  6201 Generate a call to the function \f(CW\*(C`abort\*(C'\fR at the end of a
       
  6202 \&\f(CW\*(C`noreturn\*(C'\fR function.  It will be executed if the function tries to
       
  6203 return.
       
  6204 .IP "\fB\-mlong\-calls\fR" 4
       
  6205 .IX Item "-mlong-calls"
       
  6206 .PD 0
       
  6207 .IP "\fB\-mno\-long\-calls\fR" 4
       
  6208 .IX Item "-mno-long-calls"
       
  6209 .PD
       
  6210 Tells the compiler to perform function calls by first loading the
       
  6211 address of the function into a register and then performing a subroutine
       
  6212 call on this register.  This switch is needed if the target function
       
  6213 will lie outside of the 64 megabyte addressing range of the offset based
       
  6214 version of subroutine call instruction.
       
  6215 .Sp
       
  6216 Even if this switch is enabled, not all function calls will be turned
       
  6217 into long calls.  The heuristic is that static functions, functions
       
  6218 which have the \fBshort-call\fR attribute, functions that are inside
       
  6219 the scope of a \fB#pragma no_long_calls\fR directive and functions whose
       
  6220 definitions have already been compiled within the current compilation
       
  6221 unit, will not be turned into long calls.  The exception to this rule is
       
  6222 that weak function definitions, functions with the \fBlong-call\fR
       
  6223 attribute or the \fBsection\fR attribute, and functions that are within
       
  6224 the scope of a \fB#pragma long_calls\fR directive, will always be
       
  6225 turned into long calls.
       
  6226 .Sp
       
  6227 This feature is not enabled by default.  Specifying
       
  6228 \&\fB\-mno\-long\-calls\fR will restore the default behavior, as will
       
  6229 placing the function calls within the scope of a \fB#pragma
       
  6230 long_calls_off\fR directive.  Note these switches have no effect on how
       
  6231 the compiler generates code to handle function calls via function
       
  6232 pointers.
       
  6233 .IP "\fB\-mnop\-fun\-dllimport\fR" 4
       
  6234 .IX Item "-mnop-fun-dllimport"
       
  6235 Disable support for the \f(CW\*(C`dllimport\*(C'\fR attribute.
       
  6236 .IP "\fB\-msingle\-pic\-base\fR" 4
       
  6237 .IX Item "-msingle-pic-base"
       
  6238 Treat the register used for \s-1PIC\s0 addressing as read\-only, rather than
       
  6239 loading it in the prologue for each function.  The run-time system is
       
  6240 responsible for initializing this register with an appropriate value
       
  6241 before execution begins.
       
  6242 .IP "\fB\-mpic\-register=\fR\fIreg\fR" 4
       
  6243 .IX Item "-mpic-register=reg"
       
  6244 Specify the register to be used for \s-1PIC\s0 addressing.  The default is R10
       
  6245 unless stack-checking is enabled, when R9 is used.
       
  6246 .IP "\fB\-mcirrus\-fix\-invalid\-insns\fR" 4
       
  6247 .IX Item "-mcirrus-fix-invalid-insns"
       
  6248 Insert NOPs into the instruction stream to in order to work around
       
  6249 problems with invalid Maverick instruction combinations.  This option
       
  6250 is only valid if the \fB\-mcpu=ep9312\fR option has been used to
       
  6251 enable generation of instructions for the Cirrus Maverick floating
       
  6252 point co\-processor.  This option is not enabled by default, since the
       
  6253 problem is only present in older Maverick implementations.  The default
       
  6254 can be re-enabled by use of the \fB\-mno\-cirrus\-fix\-invalid\-insns\fR
       
  6255 switch.
       
  6256 .IP "\fB\-mpoke\-function\-name\fR" 4
       
  6257 .IX Item "-mpoke-function-name"
       
  6258 Write the name of each function into the text section, directly
       
  6259 preceding the function prologue.  The generated code is similar to this:
       
  6260 .Sp
       
  6261 .Vb 9
       
  6262 \&             t0
       
  6263 \&                 .ascii "arm_poke_function_name", 0
       
  6264 \&                 .align
       
  6265 \&             t1
       
  6266 \&                 .word 0xff000000 + (t1 - t0)
       
  6267 \&             arm_poke_function_name
       
  6268 \&                 mov     ip, sp
       
  6269 \&                 stmfd   sp!, {fp, ip, lr, pc}
       
  6270 \&                 sub     fp, ip, #4
       
  6271 .Ve
       
  6272 .Sp
       
  6273 When performing a stack backtrace, code can inspect the value of
       
  6274 \&\f(CW\*(C`pc\*(C'\fR stored at \f(CW\*(C`fp + 0\*(C'\fR.  If the trace function then looks at
       
  6275 location \f(CW\*(C`pc \- 12\*(C'\fR and the top 8 bits are set, then we know that
       
  6276 there is a function name embedded immediately preceding this location
       
  6277 and has length \f(CW\*(C`((pc[\-3]) & 0xff000000)\*(C'\fR.
       
  6278 .IP "\fB\-mthumb\fR" 4
       
  6279 .IX Item "-mthumb"
       
  6280 Generate code for the 16\-bit Thumb instruction set.  The default is to
       
  6281 use the 32\-bit \s-1ARM\s0 instruction set.
       
  6282 .IP "\fB\-mtpcs\-frame\fR" 4
       
  6283 .IX Item "-mtpcs-frame"
       
  6284 Generate a stack frame that is compliant with the Thumb Procedure Call
       
  6285 Standard for all non-leaf functions.  (A leaf function is one that does
       
  6286 not call any other functions.)  The default is \fB\-mno\-tpcs\-frame\fR.
       
  6287 .IP "\fB\-mtpcs\-leaf\-frame\fR" 4
       
  6288 .IX Item "-mtpcs-leaf-frame"
       
  6289 Generate a stack frame that is compliant with the Thumb Procedure Call
       
  6290 Standard for all leaf functions.  (A leaf function is one that does
       
  6291 not call any other functions.)  The default is \fB\-mno\-apcs\-leaf\-frame\fR.
       
  6292 .IP "\fB\-mcallee\-super\-interworking\fR" 4
       
  6293 .IX Item "-mcallee-super-interworking"
       
  6294 Gives all externally visible functions in the file being compiled an \s-1ARM\s0
       
  6295 instruction set header which switches to Thumb mode before executing the
       
  6296 rest of the function.  This allows these functions to be called from
       
  6297 non-interworking code.
       
  6298 .IP "\fB\-mcaller\-super\-interworking\fR" 4
       
  6299 .IX Item "-mcaller-super-interworking"
       
  6300 Allows calls via function pointers (including virtual functions) to
       
  6301 execute correctly regardless of whether the target code has been
       
  6302 compiled for interworking or not.  There is a small overhead in the cost
       
  6303 of executing a function pointer if this option is enabled.
       
  6304 .PP
       
  6305 \fI\s-1MN10300\s0 Options\fR
       
  6306 .IX Subsection "MN10300 Options"
       
  6307 .PP
       
  6308 These \fB\-m\fR options are defined for Matsushita \s-1MN10300\s0 architectures:
       
  6309 .IP "\fB\-mmult\-bug\fR" 4
       
  6310 .IX Item "-mmult-bug"
       
  6311 Generate code to avoid bugs in the multiply instructions for the \s-1MN10300\s0
       
  6312 processors.  This is the default.
       
  6313 .IP "\fB\-mno\-mult\-bug\fR" 4
       
  6314 .IX Item "-mno-mult-bug"
       
  6315 Do not generate code to avoid bugs in the multiply instructions for the
       
  6316 \&\s-1MN10300\s0 processors.
       
  6317 .IP "\fB\-mam33\fR" 4
       
  6318 .IX Item "-mam33"
       
  6319 Generate code which uses features specific to the \s-1AM33\s0 processor.
       
  6320 .IP "\fB\-mno\-am33\fR" 4
       
  6321 .IX Item "-mno-am33"
       
  6322 Do not generate code which uses features specific to the \s-1AM33\s0 processor.  This
       
  6323 is the default.
       
  6324 .IP "\fB\-mno\-crt0\fR" 4
       
  6325 .IX Item "-mno-crt0"
       
  6326 Do not link in the C run-time initialization object file.
       
  6327 .IP "\fB\-mrelax\fR" 4
       
  6328 .IX Item "-mrelax"
       
  6329 Indicate to the linker that it should perform a relaxation optimization pass
       
  6330 to shorten branches, calls and absolute memory addresses.  This option only
       
  6331 has an effect when used on the command line for the final link step.
       
  6332 .Sp
       
  6333 This option makes symbolic debugging impossible.
       
  6334 .PP
       
  6335 \fIM32R/D Options\fR
       
  6336 .IX Subsection "M32R/D Options"
       
  6337 .PP
       
  6338 These \fB\-m\fR options are defined for Renesas M32R/D architectures:
       
  6339 .IP "\fB\-m32r2\fR" 4
       
  6340 .IX Item "-m32r2"
       
  6341 Generate code for the M32R/2.
       
  6342 .IP "\fB\-m32rx\fR" 4
       
  6343 .IX Item "-m32rx"
       
  6344 Generate code for the M32R/X.
       
  6345 .IP "\fB\-m32r\fR" 4
       
  6346 .IX Item "-m32r"
       
  6347 Generate code for the M32R.  This is the default.
       
  6348 .IP "\fB\-mmodel=small\fR" 4
       
  6349 .IX Item "-mmodel=small"
       
  6350 Assume all objects live in the lower 16MB of memory (so that their addresses
       
  6351 can be loaded with the \f(CW\*(C`ld24\*(C'\fR instruction), and assume all subroutines
       
  6352 are reachable with the \f(CW\*(C`bl\*(C'\fR instruction.
       
  6353 This is the default.
       
  6354 .Sp
       
  6355 The addressability of a particular object can be set with the
       
  6356 \&\f(CW\*(C`model\*(C'\fR attribute.
       
  6357 .IP "\fB\-mmodel=medium\fR" 4
       
  6358 .IX Item "-mmodel=medium"
       
  6359 Assume objects may be anywhere in the 32\-bit address space (the compiler
       
  6360 will generate \f(CW\*(C`seth/add3\*(C'\fR instructions to load their addresses), and
       
  6361 assume all subroutines are reachable with the \f(CW\*(C`bl\*(C'\fR instruction.
       
  6362 .IP "\fB\-mmodel=large\fR" 4
       
  6363 .IX Item "-mmodel=large"
       
  6364 Assume objects may be anywhere in the 32\-bit address space (the compiler
       
  6365 will generate \f(CW\*(C`seth/add3\*(C'\fR instructions to load their addresses), and
       
  6366 assume subroutines may not be reachable with the \f(CW\*(C`bl\*(C'\fR instruction
       
  6367 (the compiler will generate the much slower \f(CW\*(C`seth/add3/jl\*(C'\fR
       
  6368 instruction sequence).
       
  6369 .IP "\fB\-msdata=none\fR" 4
       
  6370 .IX Item "-msdata=none"
       
  6371 Disable use of the small data area.  Variables will be put into
       
  6372 one of \fB.data\fR, \fBbss\fR, or \fB.rodata\fR (unless the
       
  6373 \&\f(CW\*(C`section\*(C'\fR attribute has been specified).
       
  6374 This is the default.
       
  6375 .Sp
       
  6376 The small data area consists of sections \fB.sdata\fR and \fB.sbss\fR.
       
  6377 Objects may be explicitly put in the small data area with the
       
  6378 \&\f(CW\*(C`section\*(C'\fR attribute using one of these sections.
       
  6379 .IP "\fB\-msdata=sdata\fR" 4
       
  6380 .IX Item "-msdata=sdata"
       
  6381 Put small global and static data in the small data area, but do not
       
  6382 generate special code to reference them.
       
  6383 .IP "\fB\-msdata=use\fR" 4
       
  6384 .IX Item "-msdata=use"
       
  6385 Put small global and static data in the small data area, and generate
       
  6386 special instructions to reference them.
       
  6387 .IP "\fB\-G\fR \fInum\fR" 4
       
  6388 .IX Item "-G num"
       
  6389 Put global and static objects less than or equal to \fInum\fR bytes
       
  6390 into the small data or bss sections instead of the normal data or bss
       
  6391 sections.  The default value of \fInum\fR is 8.
       
  6392 The \fB\-msdata\fR option must be set to one of \fBsdata\fR or \fBuse\fR
       
  6393 for this option to have any effect.
       
  6394 .Sp
       
  6395 All modules should be compiled with the same \fB\-G\fR \fInum\fR value.
       
  6396 Compiling with different values of \fInum\fR may or may not work; if it
       
  6397 doesn't the linker will give an error message\-\-\-incorrect code will not be
       
  6398 generated.
       
  6399 .IP "\fB\-mdebug\fR" 4
       
  6400 .IX Item "-mdebug"
       
  6401 Makes the M32R specific code in the compiler display some statistics
       
  6402 that might help in debugging programs.
       
  6403 .IP "\fB\-malign\-loops\fR" 4
       
  6404 .IX Item "-malign-loops"
       
  6405 Align all loops to a 32\-byte boundary.
       
  6406 .IP "\fB\-mno\-align\-loops\fR" 4
       
  6407 .IX Item "-mno-align-loops"
       
  6408 Do not enforce a 32\-byte alignment for loops.  This is the default.
       
  6409 .IP "\fB\-missue\-rate=\fR\fInumber\fR" 4
       
  6410 .IX Item "-missue-rate=number"
       
  6411 Issue \fInumber\fR instructions per cycle.  \fInumber\fR can only be 1
       
  6412 or 2.
       
  6413 .IP "\fB\-mbranch\-cost=\fR\fInumber\fR" 4
       
  6414 .IX Item "-mbranch-cost=number"
       
  6415 \&\fInumber\fR can only be 1 or 2.  If it is 1 then branches will be
       
  6416 preferred over conditional code, if it is 2, then the opposite will
       
  6417 apply.
       
  6418 .IP "\fB\-mflush\-trap=\fR\fInumber\fR" 4
       
  6419 .IX Item "-mflush-trap=number"
       
  6420 Specifies the trap number to use to flush the cache.  The default is
       
  6421 12.  Valid numbers are between 0 and 15 inclusive.
       
  6422 .IP "\fB\-mno\-flush\-trap\fR" 4
       
  6423 .IX Item "-mno-flush-trap"
       
  6424 Specifies that the cache cannot be flushed by using a trap.
       
  6425 .IP "\fB\-mflush\-func=\fR\fIname\fR" 4
       
  6426 .IX Item "-mflush-func=name"
       
  6427 Specifies the name of the operating system function to call to flush
       
  6428 the cache.  The default is \fI_flush_cache\fR, but a function call
       
  6429 will only be used if a trap is not available.
       
  6430 .IP "\fB\-mno\-flush\-func\fR" 4
       
  6431 .IX Item "-mno-flush-func"
       
  6432 Indicates that there is no \s-1OS\s0 function for flushing the cache.
       
  6433 .PP
       
  6434 \fI\s-1IBM\s0 \s-1RS/6000\s0 and PowerPC Options\fR
       
  6435 .IX Subsection "IBM RS/6000 and PowerPC Options"
       
  6436 .PP
       
  6437 These \fB\-m\fR options are defined for the \s-1IBM\s0 \s-1RS/6000\s0 and PowerPC:
       
  6438 .IP "\fB\-mpower\fR" 4
       
  6439 .IX Item "-mpower"
       
  6440 .PD 0
       
  6441 .IP "\fB\-mno\-power\fR" 4
       
  6442 .IX Item "-mno-power"
       
  6443 .IP "\fB\-mpower2\fR" 4
       
  6444 .IX Item "-mpower2"
       
  6445 .IP "\fB\-mno\-power2\fR" 4
       
  6446 .IX Item "-mno-power2"
       
  6447 .IP "\fB\-mpowerpc\fR" 4
       
  6448 .IX Item "-mpowerpc"
       
  6449 .IP "\fB\-mno\-powerpc\fR" 4
       
  6450 .IX Item "-mno-powerpc"
       
  6451 .IP "\fB\-mpowerpc\-gpopt\fR" 4
       
  6452 .IX Item "-mpowerpc-gpopt"
       
  6453 .IP "\fB\-mno\-powerpc\-gpopt\fR" 4
       
  6454 .IX Item "-mno-powerpc-gpopt"
       
  6455 .IP "\fB\-mpowerpc\-gfxopt\fR" 4
       
  6456 .IX Item "-mpowerpc-gfxopt"
       
  6457 .IP "\fB\-mno\-powerpc\-gfxopt\fR" 4
       
  6458 .IX Item "-mno-powerpc-gfxopt"
       
  6459 .IP "\fB\-mpowerpc64\fR" 4
       
  6460 .IX Item "-mpowerpc64"
       
  6461 .IP "\fB\-mno\-powerpc64\fR" 4
       
  6462 .IX Item "-mno-powerpc64"
       
  6463 .PD
       
  6464 \&\s-1GCC\s0 supports two related instruction set architectures for the
       
  6465 \&\s-1RS/6000\s0 and PowerPC.  The \fI\s-1POWER\s0\fR instruction set are those
       
  6466 instructions supported by the \fBrios\fR chip set used in the original
       
  6467 \&\s-1RS/6000\s0 systems and the \fIPowerPC\fR instruction set is the
       
  6468 architecture of the Motorola MPC5xx, MPC6xx, MPC8xx microprocessors, and
       
  6469 the \s-1IBM\s0 4xx microprocessors.
       
  6470 .Sp
       
  6471 Neither architecture is a subset of the other.  However there is a
       
  6472 large common subset of instructions supported by both.  An \s-1MQ\s0
       
  6473 register is included in processors supporting the \s-1POWER\s0 architecture.
       
  6474 .Sp
       
  6475 You use these options to specify which instructions are available on the
       
  6476 processor you are using.  The default value of these options is
       
  6477 determined when configuring \s-1GCC\s0.  Specifying the
       
  6478 \&\fB\-mcpu=\fR\fIcpu_type\fR overrides the specification of these
       
  6479 options.  We recommend you use the \fB\-mcpu=\fR\fIcpu_type\fR option
       
  6480 rather than the options listed above.
       
  6481 .Sp
       
  6482 The \fB\-mpower\fR option allows \s-1GCC\s0 to generate instructions that
       
  6483 are found only in the \s-1POWER\s0 architecture and to use the \s-1MQ\s0 register.
       
  6484 Specifying \fB\-mpower2\fR implies \fB\-power\fR and also allows \s-1GCC\s0
       
  6485 to generate instructions that are present in the \s-1POWER2\s0 architecture but
       
  6486 not the original \s-1POWER\s0 architecture.
       
  6487 .Sp
       
  6488 The \fB\-mpowerpc\fR option allows \s-1GCC\s0 to generate instructions that
       
  6489 are found only in the 32\-bit subset of the PowerPC architecture.
       
  6490 Specifying \fB\-mpowerpc\-gpopt\fR implies \fB\-mpowerpc\fR and also allows
       
  6491 \&\s-1GCC\s0 to use the optional PowerPC architecture instructions in the
       
  6492 General Purpose group, including floating-point square root.  Specifying
       
  6493 \&\fB\-mpowerpc\-gfxopt\fR implies \fB\-mpowerpc\fR and also allows \s-1GCC\s0 to
       
  6494 use the optional PowerPC architecture instructions in the Graphics
       
  6495 group, including floating-point select.
       
  6496 .Sp
       
  6497 The \fB\-mpowerpc64\fR option allows \s-1GCC\s0 to generate the additional
       
  6498 64\-bit instructions that are found in the full PowerPC64 architecture
       
  6499 and to treat GPRs as 64\-bit, doubleword quantities.  \s-1GCC\s0 defaults to
       
  6500 \&\fB\-mno\-powerpc64\fR.
       
  6501 .Sp
       
  6502 If you specify both \fB\-mno\-power\fR and \fB\-mno\-powerpc\fR, \s-1GCC\s0
       
  6503 will use only the instructions in the common subset of both
       
  6504 architectures plus some special \s-1AIX\s0 common-mode calls, and will not use
       
  6505 the \s-1MQ\s0 register.  Specifying both \fB\-mpower\fR and \fB\-mpowerpc\fR
       
  6506 permits \s-1GCC\s0 to use any instruction from either architecture and to
       
  6507 allow use of the \s-1MQ\s0 register; specify this for the Motorola \s-1MPC601\s0.
       
  6508 .IP "\fB\-mnew\-mnemonics\fR" 4
       
  6509 .IX Item "-mnew-mnemonics"
       
  6510 .PD 0
       
  6511 .IP "\fB\-mold\-mnemonics\fR" 4
       
  6512 .IX Item "-mold-mnemonics"
       
  6513 .PD
       
  6514 Select which mnemonics to use in the generated assembler code.  With
       
  6515 \&\fB\-mnew\-mnemonics\fR, \s-1GCC\s0 uses the assembler mnemonics defined for
       
  6516 the PowerPC architecture.  With \fB\-mold\-mnemonics\fR it uses the
       
  6517 assembler mnemonics defined for the \s-1POWER\s0 architecture.  Instructions
       
  6518 defined in only one architecture have only one mnemonic; \s-1GCC\s0 uses that
       
  6519 mnemonic irrespective of which of these options is specified.
       
  6520 .Sp
       
  6521 \&\s-1GCC\s0 defaults to the mnemonics appropriate for the architecture in
       
  6522 use.  Specifying \fB\-mcpu=\fR\fIcpu_type\fR sometimes overrides the
       
  6523 value of these option.  Unless you are building a cross\-compiler, you
       
  6524 should normally not specify either \fB\-mnew\-mnemonics\fR or
       
  6525 \&\fB\-mold\-mnemonics\fR, but should instead accept the default.
       
  6526 .IP "\fB\-mcpu=\fR\fIcpu_type\fR" 4
       
  6527 .IX Item "-mcpu=cpu_type"
       
  6528 Set architecture type, register usage, choice of mnemonics, and
       
  6529 instruction scheduling parameters for machine type \fIcpu_type\fR.
       
  6530 Supported values for \fIcpu_type\fR are \fB401\fR, \fB403\fR,
       
  6531 \&\fB405\fR, \fB405fp\fR, \fB440\fR, \fB440fp\fR, \fB505\fR,
       
  6532 \&\fB601\fR, \fB602\fR, \fB603\fR, \fB603e\fR, \fB604\fR,
       
  6533 \&\fB604e\fR, \fB620\fR, \fB630\fR, \fB740\fR, \fB7400\fR,
       
  6534 \&\fB7450\fR, \fB750\fR, \fB801\fR, \fB821\fR, \fB823\fR,
       
  6535 \&\fB860\fR, \fB970\fR, \fBcommon\fR, \fBec603e\fR, \fBG3\fR,
       
  6536 \&\fBG4\fR, \fBG5\fR, \fBpower\fR, \fBpower2\fR, \fBpower3\fR,
       
  6537 \&\fBpower4\fR, \fBpower5\fR, \fBpowerpc\fR, \fBpowerpc64\fR,
       
  6538 \&\fBrios\fR, \fBrios1\fR, \fBrios2\fR, \fBrsc\fR, and \fBrs64a\fR.
       
  6539 .Sp
       
  6540 \&\fB\-mcpu=common\fR selects a completely generic processor.  Code
       
  6541 generated under this option will run on any \s-1POWER\s0 or PowerPC processor.
       
  6542 \&\s-1GCC\s0 will use only the instructions in the common subset of both
       
  6543 architectures, and will not use the \s-1MQ\s0 register.  \s-1GCC\s0 assumes a generic
       
  6544 processor model for scheduling purposes.
       
  6545 .Sp
       
  6546 \&\fB\-mcpu=power\fR, \fB\-mcpu=power2\fR, \fB\-mcpu=powerpc\fR, and
       
  6547 \&\fB\-mcpu=powerpc64\fR specify generic \s-1POWER\s0, \s-1POWER2\s0, pure 32\-bit
       
  6548 PowerPC (i.e., not \s-1MPC601\s0), and 64\-bit PowerPC architecture machine
       
  6549 types, with an appropriate, generic processor model assumed for
       
  6550 scheduling purposes.
       
  6551 .Sp
       
  6552 The other options specify a specific processor.  Code generated under
       
  6553 those options will run best on that processor, and may not run at all on
       
  6554 others.
       
  6555 .Sp
       
  6556 The \fB\-mcpu\fR options automatically enable or disable the
       
  6557 following options: \fB\-maltivec\fR, \fB\-mhard\-float\fR,
       
  6558 \&\fB\-mmfcrf\fR, \fB\-mmultiple\fR, \fB\-mnew\-mnemonics\fR,
       
  6559 \&\fB\-mpower\fR, \fB\-mpower2\fR, \fB\-mpowerpc64\fR,
       
  6560 \&\fB\-mpowerpc\-gpopt\fR, \fB\-mpowerpc\-gfxopt\fR,
       
  6561 \&\fB\-mstring\fR.  The particular options set for any particular \s-1CPU\s0
       
  6562 will vary between compiler versions, depending on what setting seems
       
  6563 to produce optimal code for that \s-1CPU\s0; it doesn't necessarily reflect
       
  6564 the actual hardware's capabilities.  If you wish to set an individual
       
  6565 option to a particular value, you may specify it after the
       
  6566 \&\fB\-mcpu\fR option, like \fB\-mcpu=970 \-mno\-altivec\fR.
       
  6567 .Sp
       
  6568 On \s-1AIX\s0, the \fB\-maltivec\fR and \fB\-mpowerpc64\fR options are
       
  6569 not enabled or disabled by the \fB\-mcpu\fR option at present, since
       
  6570 \&\s-1AIX\s0 does not have full support for these options.  You may still
       
  6571 enable or disable them individually if you're sure it'll work in your
       
  6572 environment.
       
  6573 .IP "\fB\-mtune=\fR\fIcpu_type\fR" 4
       
  6574 .IX Item "-mtune=cpu_type"
       
  6575 Set the instruction scheduling parameters for machine type
       
  6576 \&\fIcpu_type\fR, but do not set the architecture type, register usage, or
       
  6577 choice of mnemonics, as \fB\-mcpu=\fR\fIcpu_type\fR would.  The same
       
  6578 values for \fIcpu_type\fR are used for \fB\-mtune\fR as for
       
  6579 \&\fB\-mcpu\fR.  If both are specified, the code generated will use the
       
  6580 architecture, registers, and mnemonics set by \fB\-mcpu\fR, but the
       
  6581 scheduling parameters set by \fB\-mtune\fR.
       
  6582 .IP "\fB\-maltivec\fR" 4
       
  6583 .IX Item "-maltivec"
       
  6584 .PD 0
       
  6585 .IP "\fB\-mno\-altivec\fR" 4
       
  6586 .IX Item "-mno-altivec"
       
  6587 .PD
       
  6588 These switches enable or disable the use of built-in functions that
       
  6589 allow access to the AltiVec instruction set.  You may also need to set
       
  6590 \&\fB\-mabi=altivec\fR to adjust the current \s-1ABI\s0 with AltiVec \s-1ABI\s0
       
  6591 enhancements.
       
  6592 .IP "\fB\-mabi=spe\fR" 4
       
  6593 .IX Item "-mabi=spe"
       
  6594 Extend the current \s-1ABI\s0 with \s-1SPE\s0 \s-1ABI\s0 extensions.  This does not change
       
  6595 the default \s-1ABI\s0, instead it adds the \s-1SPE\s0 \s-1ABI\s0 extensions to the current
       
  6596 \&\s-1ABI\s0.
       
  6597 .IP "\fB\-mabi=no\-spe\fR" 4
       
  6598 .IX Item "-mabi=no-spe"
       
  6599 Disable Booke \s-1SPE\s0 \s-1ABI\s0 extensions for the current \s-1ABI\s0.
       
  6600 .IP "\fB\-misel=\fR\fIyes/no\fR" 4
       
  6601 .IX Item "-misel=yes/no"
       
  6602 .PD 0
       
  6603 .IP "\fB\-misel\fR" 4
       
  6604 .IX Item "-misel"
       
  6605 .PD
       
  6606 This switch enables or disables the generation of \s-1ISEL\s0 instructions.
       
  6607 .IP "\fB\-mspe=\fR\fIyes/no\fR" 4
       
  6608 .IX Item "-mspe=yes/no"
       
  6609 .PD 0
       
  6610 .IP "\fB\-mspe\fR" 4
       
  6611 .IX Item "-mspe"
       
  6612 .PD
       
  6613 This switch enables or disables the generation of \s-1SPE\s0 simd
       
  6614 instructions.
       
  6615 .IP "\fB\-mfloat\-gprs=\fR\fIyes/no\fR" 4
       
  6616 .IX Item "-mfloat-gprs=yes/no"
       
  6617 .PD 0
       
  6618 .IP "\fB\-mfloat\-gprs\fR" 4
       
  6619 .IX Item "-mfloat-gprs"
       
  6620 .PD
       
  6621 This switch enables or disables the generation of floating point
       
  6622 operations on the general purpose registers for architectures that
       
  6623 support it.  This option is currently only available on the \s-1MPC8540\s0.
       
  6624 .IP "\fB\-mfull\-toc\fR" 4
       
  6625 .IX Item "-mfull-toc"
       
  6626 .PD 0
       
  6627 .IP "\fB\-mno\-fp\-in\-toc\fR" 4
       
  6628 .IX Item "-mno-fp-in-toc"
       
  6629 .IP "\fB\-mno\-sum\-in\-toc\fR" 4
       
  6630 .IX Item "-mno-sum-in-toc"
       
  6631 .IP "\fB\-mminimal\-toc\fR" 4
       
  6632 .IX Item "-mminimal-toc"
       
  6633 .PD
       
  6634 Modify generation of the \s-1TOC\s0 (Table Of Contents), which is created for
       
  6635 every executable file.  The \fB\-mfull\-toc\fR option is selected by
       
  6636 default.  In that case, \s-1GCC\s0 will allocate at least one \s-1TOC\s0 entry for
       
  6637 each unique non-automatic variable reference in your program.  \s-1GCC\s0
       
  6638 will also place floating-point constants in the \s-1TOC\s0.  However, only
       
  6639 16,384 entries are available in the \s-1TOC\s0.
       
  6640 .Sp
       
  6641 If you receive a linker error message that saying you have overflowed
       
  6642 the available \s-1TOC\s0 space, you can reduce the amount of \s-1TOC\s0 space used
       
  6643 with the \fB\-mno\-fp\-in\-toc\fR and \fB\-mno\-sum\-in\-toc\fR options.
       
  6644 \&\fB\-mno\-fp\-in\-toc\fR prevents \s-1GCC\s0 from putting floating-point
       
  6645 constants in the \s-1TOC\s0 and \fB\-mno\-sum\-in\-toc\fR forces \s-1GCC\s0 to
       
  6646 generate code to calculate the sum of an address and a constant at
       
  6647 run-time instead of putting that sum into the \s-1TOC\s0.  You may specify one
       
  6648 or both of these options.  Each causes \s-1GCC\s0 to produce very slightly
       
  6649 slower and larger code at the expense of conserving \s-1TOC\s0 space.
       
  6650 .Sp
       
  6651 If you still run out of space in the \s-1TOC\s0 even when you specify both of
       
  6652 these options, specify \fB\-mminimal\-toc\fR instead.  This option causes
       
  6653 \&\s-1GCC\s0 to make only one \s-1TOC\s0 entry for every file.  When you specify this
       
  6654 option, \s-1GCC\s0 will produce code that is slower and larger but which
       
  6655 uses extremely little \s-1TOC\s0 space.  You may wish to use this option
       
  6656 only on files that contain less frequently executed code.
       
  6657 .IP "\fB\-maix64\fR" 4
       
  6658 .IX Item "-maix64"
       
  6659 .PD 0
       
  6660 .IP "\fB\-maix32\fR" 4
       
  6661 .IX Item "-maix32"
       
  6662 .PD
       
  6663 Enable 64\-bit \s-1AIX\s0 \s-1ABI\s0 and calling convention: 64\-bit pointers, 64\-bit
       
  6664 \&\f(CW\*(C`long\*(C'\fR type, and the infrastructure needed to support them.
       
  6665 Specifying \fB\-maix64\fR implies \fB\-mpowerpc64\fR and
       
  6666 \&\fB\-mpowerpc\fR, while \fB\-maix32\fR disables the 64\-bit \s-1ABI\s0 and
       
  6667 implies \fB\-mno\-powerpc64\fR.  \s-1GCC\s0 defaults to \fB\-maix32\fR.
       
  6668 .IP "\fB\-mxl\-call\fR" 4
       
  6669 .IX Item "-mxl-call"
       
  6670 .PD 0
       
  6671 .IP "\fB\-mno\-xl\-call\fR" 4
       
  6672 .IX Item "-mno-xl-call"
       
  6673 .PD
       
  6674 On \s-1AIX\s0, pass floating-point arguments to prototyped functions beyond the
       
  6675 register save area (\s-1RSA\s0) on the stack in addition to argument FPRs.  The
       
  6676 \&\s-1AIX\s0 calling convention was extended but not initially documented to
       
  6677 handle an obscure K&R C case of calling a function that takes the
       
  6678 address of its arguments with fewer arguments than declared.  \s-1AIX\s0 \s-1XL\s0
       
  6679 compilers access floating point arguments which do not fit in the
       
  6680 \&\s-1RSA\s0 from the stack when a subroutine is compiled without
       
  6681 optimization.  Because always storing floating-point arguments on the
       
  6682 stack is inefficient and rarely needed, this option is not enabled by
       
  6683 default and only is necessary when calling subroutines compiled by \s-1AIX\s0
       
  6684 \&\s-1XL\s0 compilers without optimization.
       
  6685 .IP "\fB\-mpe\fR" 4
       
  6686 .IX Item "-mpe"
       
  6687 Support \fI\s-1IBM\s0 \s-1RS/6000\s0 \s-1SP\s0\fR \fIParallel Environment\fR (\s-1PE\s0).  Link an
       
  6688 application written to use message passing with special startup code to
       
  6689 enable the application to run.  The system must have \s-1PE\s0 installed in the
       
  6690 standard location (\fI/usr/lpp/ppe.poe/\fR), or the \fIspecs\fR file
       
  6691 must be overridden with the \fB\-specs=\fR option to specify the
       
  6692 appropriate directory location.  The Parallel Environment does not
       
  6693 support threads, so the \fB\-mpe\fR option and the \fB\-pthread\fR
       
  6694 option are incompatible.
       
  6695 .IP "\fB\-malign\-natural\fR" 4
       
  6696 .IX Item "-malign-natural"
       
  6697 .PD 0
       
  6698 .IP "\fB\-malign\-power\fR" 4
       
  6699 .IX Item "-malign-power"
       
  6700 .PD
       
  6701 On \s-1AIX\s0, Darwin, and 64\-bit PowerPC GNU/Linux, the option
       
  6702 \&\fB\-malign\-natural\fR overrides the ABI-defined alignment of larger
       
  6703 types, such as floating-point doubles, on their natural size-based boundary.
       
  6704 The option \fB\-malign\-power\fR instructs \s-1GCC\s0 to follow the ABI-specified
       
  6705 alignment rules.  \s-1GCC\s0 defaults to the standard alignment defined in the \s-1ABI\s0.
       
  6706 .IP "\fB\-msoft\-float\fR" 4
       
  6707 .IX Item "-msoft-float"
       
  6708 .PD 0
       
  6709 .IP "\fB\-mhard\-float\fR" 4
       
  6710 .IX Item "-mhard-float"
       
  6711 .PD
       
  6712 Generate code that does not use (uses) the floating-point register set.
       
  6713 Software floating point emulation is provided if you use the
       
  6714 \&\fB\-msoft\-float\fR option, and pass the option to \s-1GCC\s0 when linking.
       
  6715 .IP "\fB\-mmultiple\fR" 4
       
  6716 .IX Item "-mmultiple"
       
  6717 .PD 0
       
  6718 .IP "\fB\-mno\-multiple\fR" 4
       
  6719 .IX Item "-mno-multiple"
       
  6720 .PD
       
  6721 Generate code that uses (does not use) the load multiple word
       
  6722 instructions and the store multiple word instructions.  These
       
  6723 instructions are generated by default on \s-1POWER\s0 systems, and not
       
  6724 generated on PowerPC systems.  Do not use \fB\-mmultiple\fR on little
       
  6725 endian PowerPC systems, since those instructions do not work when the
       
  6726 processor is in little endian mode.  The exceptions are \s-1PPC740\s0 and
       
  6727 \&\s-1PPC750\s0 which permit the instructions usage in little endian mode.
       
  6728 .IP "\fB\-mstring\fR" 4
       
  6729 .IX Item "-mstring"
       
  6730 .PD 0
       
  6731 .IP "\fB\-mno\-string\fR" 4
       
  6732 .IX Item "-mno-string"
       
  6733 .PD
       
  6734 Generate code that uses (does not use) the load string instructions
       
  6735 and the store string word instructions to save multiple registers and
       
  6736 do small block moves.  These instructions are generated by default on
       
  6737 \&\s-1POWER\s0 systems, and not generated on PowerPC systems.  Do not use
       
  6738 \&\fB\-mstring\fR on little endian PowerPC systems, since those
       
  6739 instructions do not work when the processor is in little endian mode.
       
  6740 The exceptions are \s-1PPC740\s0 and \s-1PPC750\s0 which permit the instructions
       
  6741 usage in little endian mode.
       
  6742 .IP "\fB\-mupdate\fR" 4
       
  6743 .IX Item "-mupdate"
       
  6744 .PD 0
       
  6745 .IP "\fB\-mno\-update\fR" 4
       
  6746 .IX Item "-mno-update"
       
  6747 .PD
       
  6748 Generate code that uses (does not use) the load or store instructions
       
  6749 that update the base register to the address of the calculated memory
       
  6750 location.  These instructions are generated by default.  If you use
       
  6751 \&\fB\-mno\-update\fR, there is a small window between the time that the
       
  6752 stack pointer is updated and the address of the previous frame is
       
  6753 stored, which means code that walks the stack frame across interrupts or
       
  6754 signals may get corrupted data.
       
  6755 .IP "\fB\-mfused\-madd\fR" 4
       
  6756 .IX Item "-mfused-madd"
       
  6757 .PD 0
       
  6758 .IP "\fB\-mno\-fused\-madd\fR" 4
       
  6759 .IX Item "-mno-fused-madd"
       
  6760 .PD
       
  6761 Generate code that uses (does not use) the floating point multiply and
       
  6762 accumulate instructions.  These instructions are generated by default if
       
  6763 hardware floating is used.
       
  6764 .IP "\fB\-mno\-bit\-align\fR" 4
       
  6765 .IX Item "-mno-bit-align"
       
  6766 .PD 0
       
  6767 .IP "\fB\-mbit\-align\fR" 4
       
  6768 .IX Item "-mbit-align"
       
  6769 .PD
       
  6770 On System V.4 and embedded PowerPC systems do not (do) force structures
       
  6771 and unions that contain bit-fields to be aligned to the base type of the
       
  6772 bit\-field.
       
  6773 .Sp
       
  6774 For example, by default a structure containing nothing but 8
       
  6775 \&\f(CW\*(C`unsigned\*(C'\fR bit-fields of length 1 would be aligned to a 4 byte
       
  6776 boundary and have a size of 4 bytes.  By using \fB\-mno\-bit\-align\fR,
       
  6777 the structure would be aligned to a 1 byte boundary and be one byte in
       
  6778 size.
       
  6779 .IP "\fB\-mno\-strict\-align\fR" 4
       
  6780 .IX Item "-mno-strict-align"
       
  6781 .PD 0
       
  6782 .IP "\fB\-mstrict\-align\fR" 4
       
  6783 .IX Item "-mstrict-align"
       
  6784 .PD
       
  6785 On System V.4 and embedded PowerPC systems do not (do) assume that
       
  6786 unaligned memory references will be handled by the system.
       
  6787 .IP "\fB\-mrelocatable\fR" 4
       
  6788 .IX Item "-mrelocatable"
       
  6789 .PD 0
       
  6790 .IP "\fB\-mno\-relocatable\fR" 4
       
  6791 .IX Item "-mno-relocatable"
       
  6792 .PD
       
  6793 On embedded PowerPC systems generate code that allows (does not allow)
       
  6794 the program to be relocated to a different address at runtime.  If you
       
  6795 use \fB\-mrelocatable\fR on any module, all objects linked together must
       
  6796 be compiled with \fB\-mrelocatable\fR or \fB\-mrelocatable\-lib\fR.
       
  6797 .IP "\fB\-mrelocatable\-lib\fR" 4
       
  6798 .IX Item "-mrelocatable-lib"
       
  6799 .PD 0
       
  6800 .IP "\fB\-mno\-relocatable\-lib\fR" 4
       
  6801 .IX Item "-mno-relocatable-lib"
       
  6802 .PD
       
  6803 On embedded PowerPC systems generate code that allows (does not allow)
       
  6804 the program to be relocated to a different address at runtime.  Modules
       
  6805 compiled with \fB\-mrelocatable\-lib\fR can be linked with either modules
       
  6806 compiled without \fB\-mrelocatable\fR and \fB\-mrelocatable\-lib\fR or
       
  6807 with modules compiled with the \fB\-mrelocatable\fR options.
       
  6808 .IP "\fB\-mno\-toc\fR" 4
       
  6809 .IX Item "-mno-toc"
       
  6810 .PD 0
       
  6811 .IP "\fB\-mtoc\fR" 4
       
  6812 .IX Item "-mtoc"
       
  6813 .PD
       
  6814 On System V.4 and embedded PowerPC systems do not (do) assume that
       
  6815 register 2 contains a pointer to a global area pointing to the addresses
       
  6816 used in the program.
       
  6817 .IP "\fB\-mlittle\fR" 4
       
  6818 .IX Item "-mlittle"
       
  6819 .PD 0
       
  6820 .IP "\fB\-mlittle\-endian\fR" 4
       
  6821 .IX Item "-mlittle-endian"
       
  6822 .PD
       
  6823 On System V.4 and embedded PowerPC systems compile code for the
       
  6824 processor in little endian mode.  The \fB\-mlittle\-endian\fR option is
       
  6825 the same as \fB\-mlittle\fR.
       
  6826 .IP "\fB\-mbig\fR" 4
       
  6827 .IX Item "-mbig"
       
  6828 .PD 0
       
  6829 .IP "\fB\-mbig\-endian\fR" 4
       
  6830 .IX Item "-mbig-endian"
       
  6831 .PD
       
  6832 On System V.4 and embedded PowerPC systems compile code for the
       
  6833 processor in big endian mode.  The \fB\-mbig\-endian\fR option is
       
  6834 the same as \fB\-mbig\fR.
       
  6835 .IP "\fB\-mdynamic\-no\-pic\fR" 4
       
  6836 .IX Item "-mdynamic-no-pic"
       
  6837 On Darwin and Mac \s-1OS\s0 X systems, compile code so that it is not
       
  6838 relocatable, but that its external references are relocatable.  The
       
  6839 resulting code is suitable for applications, but not shared
       
  6840 libraries.
       
  6841 .IP "\fB\-mprioritize\-restricted\-insns=\fR\fIpriority\fR" 4
       
  6842 .IX Item "-mprioritize-restricted-insns=priority"
       
  6843 This option controls the priority that is assigned to
       
  6844 dispatch-slot restricted instructions during the second scheduling
       
  6845 pass.  The argument \fIpriority\fR takes the value \fI0/1/2\fR to assign
       
  6846 \&\fIno/highest/second\-highest\fR priority to dispatch slot restricted
       
  6847 instructions.
       
  6848 .IP "\fB\-msched\-costly\-dep=\fR\fIdependence_type\fR" 4
       
  6849 .IX Item "-msched-costly-dep=dependence_type"
       
  6850 This option controls which dependences are considered costly
       
  6851 by the target during instruction scheduling.  The argument
       
  6852 \&\fIdependence_type\fR takes one of the following values:
       
  6853 \&\fIno\fR: no dependence is costly,
       
  6854 \&\fIall\fR: all dependences are costly,
       
  6855 \&\fItrue_store_to_load\fR: a true dependence from store to load is costly,
       
  6856 \&\fIstore_to_load\fR: any dependence from store to load is costly,
       
  6857 \&\fInumber\fR: any dependence which latency >= \fInumber\fR is costly.
       
  6858 .IP "\fB\-minsert\-sched\-nops=\fR\fIscheme\fR" 4
       
  6859 .IX Item "-minsert-sched-nops=scheme"
       
  6860 This option controls which nop insertion scheme will be used during
       
  6861 the second scheduling pass. The argument \fIscheme\fR takes one of the
       
  6862 following values:
       
  6863 \&\fIno\fR: Don't insert nops.
       
  6864 \&\fIpad\fR: Pad with nops any dispatch group which has vacant issue slots,
       
  6865 according to the scheduler's grouping.
       
  6866 \&\fIregroup_exact\fR: Insert nops to force costly dependent insns into
       
  6867 separate groups.  Insert exactly as many nops as needed to force an insn
       
  6868 to a new group, according to the estimated processor grouping.
       
  6869 \&\fInumber\fR: Insert nops to force costly dependent insns into
       
  6870 separate groups.  Insert \fInumber\fR nops to force an insn to a new group.
       
  6871 .IP "\fB\-mcall\-sysv\fR" 4
       
  6872 .IX Item "-mcall-sysv"
       
  6873 On System V.4 and embedded PowerPC systems compile code using calling
       
  6874 conventions that adheres to the March 1995 draft of the System V
       
  6875 Application Binary Interface, PowerPC processor supplement.  This is the
       
  6876 default unless you configured \s-1GCC\s0 using \fBpowerpc\-*\-eabiaix\fR.
       
  6877 .IP "\fB\-mcall\-sysv\-eabi\fR" 4
       
  6878 .IX Item "-mcall-sysv-eabi"
       
  6879 Specify both \fB\-mcall\-sysv\fR and \fB\-meabi\fR options.
       
  6880 .IP "\fB\-mcall\-sysv\-noeabi\fR" 4
       
  6881 .IX Item "-mcall-sysv-noeabi"
       
  6882 Specify both \fB\-mcall\-sysv\fR and \fB\-mno\-eabi\fR options.
       
  6883 .IP "\fB\-mcall\-solaris\fR" 4
       
  6884 .IX Item "-mcall-solaris"
       
  6885 On System V.4 and embedded PowerPC systems compile code for the Solaris
       
  6886 operating system.
       
  6887 .IP "\fB\-mcall\-linux\fR" 4
       
  6888 .IX Item "-mcall-linux"
       
  6889 On System V.4 and embedded PowerPC systems compile code for the
       
  6890 Linux-based \s-1GNU\s0 system.
       
  6891 .IP "\fB\-mcall\-gnu\fR" 4
       
  6892 .IX Item "-mcall-gnu"
       
  6893 On System V.4 and embedded PowerPC systems compile code for the
       
  6894 Hurd-based \s-1GNU\s0 system.
       
  6895 .IP "\fB\-mcall\-netbsd\fR" 4
       
  6896 .IX Item "-mcall-netbsd"
       
  6897 On System V.4 and embedded PowerPC systems compile code for the
       
  6898 NetBSD operating system.
       
  6899 .IP "\fB\-maix\-struct\-return\fR" 4
       
  6900 .IX Item "-maix-struct-return"
       
  6901 Return all structures in memory (as specified by the \s-1AIX\s0 \s-1ABI\s0).
       
  6902 .IP "\fB\-msvr4\-struct\-return\fR" 4
       
  6903 .IX Item "-msvr4-struct-return"
       
  6904 Return structures smaller than 8 bytes in registers (as specified by the
       
  6905 \&\s-1SVR4\s0 \s-1ABI\s0).
       
  6906 .IP "\fB\-mabi=altivec\fR" 4
       
  6907 .IX Item "-mabi=altivec"
       
  6908 Extend the current \s-1ABI\s0 with AltiVec \s-1ABI\s0 extensions.  This does not
       
  6909 change the default \s-1ABI\s0, instead it adds the AltiVec \s-1ABI\s0 extensions to
       
  6910 the current \s-1ABI\s0.
       
  6911 .IP "\fB\-mabi=no\-altivec\fR" 4
       
  6912 .IX Item "-mabi=no-altivec"
       
  6913 Disable AltiVec \s-1ABI\s0 extensions for the current \s-1ABI\s0.
       
  6914 .IP "\fB\-mprototype\fR" 4
       
  6915 .IX Item "-mprototype"
       
  6916 .PD 0
       
  6917 .IP "\fB\-mno\-prototype\fR" 4
       
  6918 .IX Item "-mno-prototype"
       
  6919 .PD
       
  6920 On System V.4 and embedded PowerPC systems assume that all calls to
       
  6921 variable argument functions are properly prototyped.  Otherwise, the
       
  6922 compiler must insert an instruction before every non prototyped call to
       
  6923 set or clear bit 6 of the condition code register (\fI\s-1CR\s0\fR) to
       
  6924 indicate whether floating point values were passed in the floating point
       
  6925 registers in case the function takes a variable arguments.  With
       
  6926 \&\fB\-mprototype\fR, only calls to prototyped variable argument functions
       
  6927 will set or clear the bit.
       
  6928 .IP "\fB\-msim\fR" 4
       
  6929 .IX Item "-msim"
       
  6930 On embedded PowerPC systems, assume that the startup module is called
       
  6931 \&\fIsim\-crt0.o\fR and that the standard C libraries are \fIlibsim.a\fR and
       
  6932 \&\fIlibc.a\fR.  This is the default for \fBpowerpc\-*\-eabisim\fR.
       
  6933 configurations.
       
  6934 .IP "\fB\-mmvme\fR" 4
       
  6935 .IX Item "-mmvme"
       
  6936 On embedded PowerPC systems, assume that the startup module is called
       
  6937 \&\fIcrt0.o\fR and the standard C libraries are \fIlibmvme.a\fR and
       
  6938 \&\fIlibc.a\fR.
       
  6939 .IP "\fB\-mads\fR" 4
       
  6940 .IX Item "-mads"
       
  6941 On embedded PowerPC systems, assume that the startup module is called
       
  6942 \&\fIcrt0.o\fR and the standard C libraries are \fIlibads.a\fR and
       
  6943 \&\fIlibc.a\fR.
       
  6944 .IP "\fB\-myellowknife\fR" 4
       
  6945 .IX Item "-myellowknife"
       
  6946 On embedded PowerPC systems, assume that the startup module is called
       
  6947 \&\fIcrt0.o\fR and the standard C libraries are \fIlibyk.a\fR and
       
  6948 \&\fIlibc.a\fR.
       
  6949 .IP "\fB\-mvxworks\fR" 4
       
  6950 .IX Item "-mvxworks"
       
  6951 On System V.4 and embedded PowerPC systems, specify that you are
       
  6952 compiling for a VxWorks system.
       
  6953 .IP "\fB\-mwindiss\fR" 4
       
  6954 .IX Item "-mwindiss"
       
  6955 Specify that you are compiling for the WindISS simulation environment.
       
  6956 .IP "\fB\-memb\fR" 4
       
  6957 .IX Item "-memb"
       
  6958 On embedded PowerPC systems, set the \fI\s-1PPC_EMB\s0\fR bit in the \s-1ELF\s0 flags
       
  6959 header to indicate that \fBeabi\fR extended relocations are used.
       
  6960 .IP "\fB\-meabi\fR" 4
       
  6961 .IX Item "-meabi"
       
  6962 .PD 0
       
  6963 .IP "\fB\-mno\-eabi\fR" 4
       
  6964 .IX Item "-mno-eabi"
       
  6965 .PD
       
  6966 On System V.4 and embedded PowerPC systems do (do not) adhere to the
       
  6967 Embedded Applications Binary Interface (eabi) which is a set of
       
  6968 modifications to the System V.4 specifications.  Selecting \fB\-meabi\fR
       
  6969 means that the stack is aligned to an 8 byte boundary, a function
       
  6970 \&\f(CW\*(C`_\|_eabi\*(C'\fR is called to from \f(CW\*(C`main\*(C'\fR to set up the eabi
       
  6971 environment, and the \fB\-msdata\fR option can use both \f(CW\*(C`r2\*(C'\fR and
       
  6972 \&\f(CW\*(C`r13\*(C'\fR to point to two separate small data areas.  Selecting
       
  6973 \&\fB\-mno\-eabi\fR means that the stack is aligned to a 16 byte boundary,
       
  6974 do not call an initialization function from \f(CW\*(C`main\*(C'\fR, and the
       
  6975 \&\fB\-msdata\fR option will only use \f(CW\*(C`r13\*(C'\fR to point to a single
       
  6976 small data area.  The \fB\-meabi\fR option is on by default if you
       
  6977 configured \s-1GCC\s0 using one of the \fBpowerpc*\-*\-eabi*\fR options.
       
  6978 .IP "\fB\-msdata=eabi\fR" 4
       
  6979 .IX Item "-msdata=eabi"
       
  6980 On System V.4 and embedded PowerPC systems, put small initialized
       
  6981 \&\f(CW\*(C`const\*(C'\fR global and static data in the \fB.sdata2\fR section, which
       
  6982 is pointed to by register \f(CW\*(C`r2\*(C'\fR.  Put small initialized
       
  6983 non\-\f(CW\*(C`const\*(C'\fR global and static data in the \fB.sdata\fR section,
       
  6984 which is pointed to by register \f(CW\*(C`r13\*(C'\fR.  Put small uninitialized
       
  6985 global and static data in the \fB.sbss\fR section, which is adjacent to
       
  6986 the \fB.sdata\fR section.  The \fB\-msdata=eabi\fR option is
       
  6987 incompatible with the \fB\-mrelocatable\fR option.  The
       
  6988 \&\fB\-msdata=eabi\fR option also sets the \fB\-memb\fR option.
       
  6989 .IP "\fB\-msdata=sysv\fR" 4
       
  6990 .IX Item "-msdata=sysv"
       
  6991 On System V.4 and embedded PowerPC systems, put small global and static
       
  6992 data in the \fB.sdata\fR section, which is pointed to by register
       
  6993 \&\f(CW\*(C`r13\*(C'\fR.  Put small uninitialized global and static data in the
       
  6994 \&\fB.sbss\fR section, which is adjacent to the \fB.sdata\fR section.
       
  6995 The \fB\-msdata=sysv\fR option is incompatible with the
       
  6996 \&\fB\-mrelocatable\fR option.
       
  6997 .IP "\fB\-msdata=default\fR" 4
       
  6998 .IX Item "-msdata=default"
       
  6999 .PD 0
       
  7000 .IP "\fB\-msdata\fR" 4
       
  7001 .IX Item "-msdata"
       
  7002 .PD
       
  7003 On System V.4 and embedded PowerPC systems, if \fB\-meabi\fR is used,
       
  7004 compile code the same as \fB\-msdata=eabi\fR, otherwise compile code the
       
  7005 same as \fB\-msdata=sysv\fR.
       
  7006 .IP "\fB\-msdata\-data\fR" 4
       
  7007 .IX Item "-msdata-data"
       
  7008 On System V.4 and embedded PowerPC systems, put small global and static
       
  7009 data in the \fB.sdata\fR section.  Put small uninitialized global and
       
  7010 static data in the \fB.sbss\fR section.  Do not use register \f(CW\*(C`r13\*(C'\fR
       
  7011 to address small data however.  This is the default behavior unless
       
  7012 other \fB\-msdata\fR options are used.
       
  7013 .IP "\fB\-msdata=none\fR" 4
       
  7014 .IX Item "-msdata=none"
       
  7015 .PD 0
       
  7016 .IP "\fB\-mno\-sdata\fR" 4
       
  7017 .IX Item "-mno-sdata"
       
  7018 .PD
       
  7019 On embedded PowerPC systems, put all initialized global and static data
       
  7020 in the \fB.data\fR section, and all uninitialized data in the
       
  7021 \&\fB.bss\fR section.
       
  7022 .IP "\fB\-G\fR \fInum\fR" 4
       
  7023 .IX Item "-G num"
       
  7024 On embedded PowerPC systems, put global and static items less than or
       
  7025 equal to \fInum\fR bytes into the small data or bss sections instead of
       
  7026 the normal data or bss section.  By default, \fInum\fR is 8.  The
       
  7027 \&\fB\-G\fR \fInum\fR switch is also passed to the linker.
       
  7028 All modules should be compiled with the same \fB\-G\fR \fInum\fR value.
       
  7029 .IP "\fB\-mregnames\fR" 4
       
  7030 .IX Item "-mregnames"
       
  7031 .PD 0
       
  7032 .IP "\fB\-mno\-regnames\fR" 4
       
  7033 .IX Item "-mno-regnames"
       
  7034 .PD
       
  7035 On System V.4 and embedded PowerPC systems do (do not) emit register
       
  7036 names in the assembly language output using symbolic forms.
       
  7037 .IP "\fB\-mlongcall\fR" 4
       
  7038 .IX Item "-mlongcall"
       
  7039 .PD 0
       
  7040 .IP "\fB\-mno\-longcall\fR" 4
       
  7041 .IX Item "-mno-longcall"
       
  7042 .PD
       
  7043 Default to making all function calls via pointers, so that functions
       
  7044 which reside further than 64 megabytes (67,108,864 bytes) from the
       
  7045 current location can be called.  This setting can be overridden by the
       
  7046 \&\f(CW\*(C`shortcall\*(C'\fR function attribute, or by \f(CW\*(C`#pragma longcall(0)\*(C'\fR.
       
  7047 .Sp
       
  7048 Some linkers are capable of detecting out-of-range calls and generating
       
  7049 glue code on the fly.  On these systems, long calls are unnecessary and
       
  7050 generate slower code.  As of this writing, the \s-1AIX\s0 linker can do this,
       
  7051 as can the \s-1GNU\s0 linker for PowerPC/64.  It is planned to add this feature
       
  7052 to the \s-1GNU\s0 linker for 32\-bit PowerPC systems as well.
       
  7053 .Sp
       
  7054 On Mach-O (Darwin) systems, this option directs the compiler emit to
       
  7055 the glue for every direct call, and the Darwin linker decides whether
       
  7056 to use or discard it.
       
  7057 .Sp
       
  7058 In the future, we may cause \s-1GCC\s0 to ignore all longcall specifications
       
  7059 when the linker is known to generate glue.
       
  7060 .IP "\fB\-pthread\fR" 4
       
  7061 .IX Item "-pthread"
       
  7062 Adds support for multithreading with the \fIpthreads\fR library.
       
  7063 This option sets flags for both the preprocessor and linker.
       
  7064 .PP
       
  7065 \fIDarwin Options\fR
       
  7066 .IX Subsection "Darwin Options"
       
  7067 .PP
       
  7068 These options are defined for all architectures running the Darwin operating
       
  7069 system.  They are useful for compatibility with other Mac \s-1OS\s0 compilers.
       
  7070 .IP "\fB\-all_load\fR" 4
       
  7071 .IX Item "-all_load"
       
  7072 Loads all members of static archive libraries.
       
  7073 See man \fIld\fR\|(1) for more information.
       
  7074 .IP "\fB\-arch_errors_fatal\fR" 4
       
  7075 .IX Item "-arch_errors_fatal"
       
  7076 Cause the errors having to do with files that have the wrong architecture
       
  7077 to be fatal.
       
  7078 .IP "\fB\-bind_at_load\fR" 4
       
  7079 .IX Item "-bind_at_load"
       
  7080 Causes the output file to be marked such that the dynamic linker will
       
  7081 bind all undefined references when the file is loaded or launched.
       
  7082 .IP "\fB\-bundle\fR" 4
       
  7083 .IX Item "-bundle"
       
  7084 Produce a Mach-o bundle format file.
       
  7085 See man \fIld\fR\|(1) for more information.
       
  7086 .IP "\fB\-bundle_loader\fR \fIexecutable\fR" 4
       
  7087 .IX Item "-bundle_loader executable"
       
  7088 This specifies the \fIexecutable\fR that will be loading the build
       
  7089 output file being linked. See man \fIld\fR\|(1) for more information.
       
  7090 .IP "\fB\-allowable_client\fR  \fIclient_name\fR" 4
       
  7091 .IX Item "-allowable_client  client_name"
       
  7092 .PD 0
       
  7093 .IP "\fB\-arch_only\fR" 4
       
  7094 .IX Item "-arch_only"
       
  7095 .IP "\fB\-client_name\fR" 4
       
  7096 .IX Item "-client_name"
       
  7097 .IP "\fB\-compatibility_version\fR" 4
       
  7098 .IX Item "-compatibility_version"
       
  7099 .IP "\fB\-current_version\fR" 4
       
  7100 .IX Item "-current_version"
       
  7101 .IP "\fB\-dependency\-file\fR" 4
       
  7102 .IX Item "-dependency-file"
       
  7103 .IP "\fB\-dylib_file\fR" 4
       
  7104 .IX Item "-dylib_file"
       
  7105 .IP "\fB\-dylinker_install_name\fR" 4
       
  7106 .IX Item "-dylinker_install_name"
       
  7107 .IP "\fB\-dynamic\fR" 4
       
  7108 .IX Item "-dynamic"
       
  7109 .IP "\fB\-dynamiclib\fR" 4
       
  7110 .IX Item "-dynamiclib"
       
  7111 .IP "\fB\-exported_symbols_list\fR" 4
       
  7112 .IX Item "-exported_symbols_list"
       
  7113 .IP "\fB\-filelist\fR" 4
       
  7114 .IX Item "-filelist"
       
  7115 .IP "\fB\-flat_namespace\fR" 4
       
  7116 .IX Item "-flat_namespace"
       
  7117 .IP "\fB\-force_cpusubtype_ALL\fR" 4
       
  7118 .IX Item "-force_cpusubtype_ALL"
       
  7119 .IP "\fB\-force_flat_namespace\fR" 4
       
  7120 .IX Item "-force_flat_namespace"
       
  7121 .IP "\fB\-headerpad_max_install_names\fR" 4
       
  7122 .IX Item "-headerpad_max_install_names"
       
  7123 .IP "\fB\-image_base\fR" 4
       
  7124 .IX Item "-image_base"
       
  7125 .IP "\fB\-init\fR" 4
       
  7126 .IX Item "-init"
       
  7127 .IP "\fB\-install_name\fR" 4
       
  7128 .IX Item "-install_name"
       
  7129 .IP "\fB\-keep_private_externs\fR" 4
       
  7130 .IX Item "-keep_private_externs"
       
  7131 .IP "\fB\-multi_module\fR" 4
       
  7132 .IX Item "-multi_module"
       
  7133 .IP "\fB\-multiply_defined\fR" 4
       
  7134 .IX Item "-multiply_defined"
       
  7135 .IP "\fB\-multiply_defined_unused\fR" 4
       
  7136 .IX Item "-multiply_defined_unused"
       
  7137 .IP "\fB\-noall_load\fR" 4
       
  7138 .IX Item "-noall_load"
       
  7139 .IP "\fB\-nofixprebinding\fR" 4
       
  7140 .IX Item "-nofixprebinding"
       
  7141 .IP "\fB\-nomultidefs\fR" 4
       
  7142 .IX Item "-nomultidefs"
       
  7143 .IP "\fB\-noprebind\fR" 4
       
  7144 .IX Item "-noprebind"
       
  7145 .IP "\fB\-noseglinkedit\fR" 4
       
  7146 .IX Item "-noseglinkedit"
       
  7147 .IP "\fB\-pagezero_size\fR" 4
       
  7148 .IX Item "-pagezero_size"
       
  7149 .IP "\fB\-prebind\fR" 4
       
  7150 .IX Item "-prebind"
       
  7151 .IP "\fB\-prebind_all_twolevel_modules\fR" 4
       
  7152 .IX Item "-prebind_all_twolevel_modules"
       
  7153 .IP "\fB\-private_bundle\fR" 4
       
  7154 .IX Item "-private_bundle"
       
  7155 .IP "\fB\-read_only_relocs\fR" 4
       
  7156 .IX Item "-read_only_relocs"
       
  7157 .IP "\fB\-sectalign\fR" 4
       
  7158 .IX Item "-sectalign"
       
  7159 .IP "\fB\-sectobjectsymbols\fR" 4
       
  7160 .IX Item "-sectobjectsymbols"
       
  7161 .IP "\fB\-whyload\fR" 4
       
  7162 .IX Item "-whyload"
       
  7163 .IP "\fB\-seg1addr\fR" 4
       
  7164 .IX Item "-seg1addr"
       
  7165 .IP "\fB\-sectcreate\fR" 4
       
  7166 .IX Item "-sectcreate"
       
  7167 .IP "\fB\-sectobjectsymbols\fR" 4
       
  7168 .IX Item "-sectobjectsymbols"
       
  7169 .IP "\fB\-sectorder\fR" 4
       
  7170 .IX Item "-sectorder"
       
  7171 .IP "\fB\-seg_addr_table\fR" 4
       
  7172 .IX Item "-seg_addr_table"
       
  7173 .IP "\fB\-seg_addr_table_filename\fR" 4
       
  7174 .IX Item "-seg_addr_table_filename"
       
  7175 .IP "\fB\-seglinkedit\fR" 4
       
  7176 .IX Item "-seglinkedit"
       
  7177 .IP "\fB\-segprot\fR" 4
       
  7178 .IX Item "-segprot"
       
  7179 .IP "\fB\-segs_read_only_addr\fR" 4
       
  7180 .IX Item "-segs_read_only_addr"
       
  7181 .IP "\fB\-segs_read_write_addr\fR" 4
       
  7182 .IX Item "-segs_read_write_addr"
       
  7183 .IP "\fB\-single_module\fR" 4
       
  7184 .IX Item "-single_module"
       
  7185 .IP "\fB\-static\fR" 4
       
  7186 .IX Item "-static"
       
  7187 .IP "\fB\-sub_library\fR" 4
       
  7188 .IX Item "-sub_library"
       
  7189 .IP "\fB\-sub_umbrella\fR" 4
       
  7190 .IX Item "-sub_umbrella"
       
  7191 .IP "\fB\-twolevel_namespace\fR" 4
       
  7192 .IX Item "-twolevel_namespace"
       
  7193 .IP "\fB\-umbrella\fR" 4
       
  7194 .IX Item "-umbrella"
       
  7195 .IP "\fB\-undefined\fR" 4
       
  7196 .IX Item "-undefined"
       
  7197 .IP "\fB\-unexported_symbols_list\fR" 4
       
  7198 .IX Item "-unexported_symbols_list"
       
  7199 .IP "\fB\-weak_reference_mismatches\fR" 4
       
  7200 .IX Item "-weak_reference_mismatches"
       
  7201 .IP "\fB\-whatsloaded\fR" 4
       
  7202 .IX Item "-whatsloaded"
       
  7203 .PD
       
  7204 These options are available for Darwin linker. Darwin linker man page
       
  7205 describes them in detail.
       
  7206 .PP
       
  7207 \fI\s-1MIPS\s0 Options\fR
       
  7208 .IX Subsection "MIPS Options"
       
  7209 .IP "\fB\-EB\fR" 4
       
  7210 .IX Item "-EB"
       
  7211 Generate big-endian code.
       
  7212 .IP "\fB\-EL\fR" 4
       
  7213 .IX Item "-EL"
       
  7214 Generate little-endian code.  This is the default for \fBmips*el\-*\-*\fR
       
  7215 configurations.
       
  7216 .IP "\fB\-march=\fR\fIarch\fR" 4
       
  7217 .IX Item "-march=arch"
       
  7218 Generate code that will run on \fIarch\fR, which can be the name of a
       
  7219 generic \s-1MIPS\s0 \s-1ISA\s0, or the name of a particular processor.
       
  7220 The \s-1ISA\s0 names are:
       
  7221 \&\fBmips1\fR, \fBmips2\fR, \fBmips3\fR, \fBmips4\fR,
       
  7222 \&\fBmips32\fR, \fBmips32r2\fR, and \fBmips64\fR.
       
  7223 The processor names are:
       
  7224 \&\fB4kc\fR, \fB4kp\fR, \fB5kc\fR, \fB20kc\fR,
       
  7225 \&\fBm4k\fR,
       
  7226 \&\fBr2000\fR, \fBr3000\fR, \fBr3900\fR, \fBr4000\fR, \fBr4400\fR,
       
  7227 \&\fBr4600\fR, \fBr4650\fR, \fBr6000\fR, \fBr8000\fR, \fBrm7000\fR,
       
  7228 \&\fBrm9000\fR,
       
  7229 \&\fBorion\fR,
       
  7230 \&\fBsb1\fR,
       
  7231 \&\fBvr4100\fR, \fBvr4111\fR, \fBvr4120\fR, \fBvr4300\fR,
       
  7232 \&\fBvr5000\fR, \fBvr5400\fR and \fBvr5500\fR.
       
  7233 The special value \fBfrom-abi\fR selects the
       
  7234 most compatible architecture for the selected \s-1ABI\s0 (that is,
       
  7235 \&\fBmips1\fR for 32\-bit ABIs and \fBmips3\fR for 64\-bit ABIs).
       
  7236 .Sp
       
  7237 In processor names, a final \fB000\fR can be abbreviated as \fBk\fR
       
  7238 (for example, \fB\-march=r2k\fR).  Prefixes are optional, and
       
  7239 \&\fBvr\fR may be written \fBr\fR.
       
  7240 .Sp
       
  7241 \&\s-1GCC\s0 defines two macros based on the value of this option.  The first
       
  7242 is \fB_MIPS_ARCH\fR, which gives the name of target architecture, as
       
  7243 a string.  The second has the form \fB_MIPS_ARCH_\fR\fIfoo\fR,
       
  7244 where \fIfoo\fR is the capitalized value of \fB_MIPS_ARCH\fR.
       
  7245 For example, \fB\-march=r2000\fR will set \fB_MIPS_ARCH\fR
       
  7246 to \fB\*(L"r2000\*(R"\fR and define the macro \fB_MIPS_ARCH_R2000\fR.
       
  7247 .Sp
       
  7248 Note that the \fB_MIPS_ARCH\fR macro uses the processor names given
       
  7249 above.  In other words, it will have the full prefix and will not
       
  7250 abbreviate \fB000\fR as \fBk\fR.  In the case of \fBfrom-abi\fR,
       
  7251 the macro names the resolved architecture (either \fB\*(L"mips1\*(R"\fR or
       
  7252 \&\fB\*(L"mips3\*(R"\fR).  It names the default architecture when no
       
  7253 \&\fB\-march\fR option is given.
       
  7254 .IP "\fB\-mtune=\fR\fIarch\fR" 4
       
  7255 .IX Item "-mtune=arch"
       
  7256 Optimize for \fIarch\fR.  Among other things, this option controls
       
  7257 the way instructions are scheduled, and the perceived cost of arithmetic
       
  7258 operations.  The list of \fIarch\fR values is the same as for
       
  7259 \&\fB\-march\fR.
       
  7260 .Sp
       
  7261 When this option is not used, \s-1GCC\s0 will optimize for the processor
       
  7262 specified by \fB\-march\fR.  By using \fB\-march\fR and
       
  7263 \&\fB\-mtune\fR together, it is possible to generate code that will
       
  7264 run on a family of processors, but optimize the code for one
       
  7265 particular member of that family.
       
  7266 .Sp
       
  7267 \&\fB\-mtune\fR defines the macros \fB_MIPS_TUNE\fR and
       
  7268 \&\fB_MIPS_TUNE_\fR\fIfoo\fR, which work in the same way as the
       
  7269 \&\fB\-march\fR ones described above.
       
  7270 .IP "\fB\-mips1\fR" 4
       
  7271 .IX Item "-mips1"
       
  7272 Equivalent to \fB\-march=mips1\fR.
       
  7273 .IP "\fB\-mips2\fR" 4
       
  7274 .IX Item "-mips2"
       
  7275 Equivalent to \fB\-march=mips2\fR.
       
  7276 .IP "\fB\-mips3\fR" 4
       
  7277 .IX Item "-mips3"
       
  7278 Equivalent to \fB\-march=mips3\fR.
       
  7279 .IP "\fB\-mips4\fR" 4
       
  7280 .IX Item "-mips4"
       
  7281 Equivalent to \fB\-march=mips4\fR.
       
  7282 .IP "\fB\-mips32\fR" 4
       
  7283 .IX Item "-mips32"
       
  7284 Equivalent to \fB\-march=mips32\fR.
       
  7285 .IP "\fB\-mips32r2\fR" 4
       
  7286 .IX Item "-mips32r2"
       
  7287 Equivalent to \fB\-march=mips32r2\fR.
       
  7288 .IP "\fB\-mips64\fR" 4
       
  7289 .IX Item "-mips64"
       
  7290 Equivalent to \fB\-march=mips64\fR.
       
  7291 .IP "\fB\-mips16\fR" 4
       
  7292 .IX Item "-mips16"
       
  7293 .PD 0
       
  7294 .IP "\fB\-mno\-mips16\fR" 4
       
  7295 .IX Item "-mno-mips16"
       
  7296 .PD
       
  7297 Use (do not use) the \s-1MIPS16\s0 \s-1ISA\s0.
       
  7298 .IP "\fB\-mabi=32\fR" 4
       
  7299 .IX Item "-mabi=32"
       
  7300 .PD 0
       
  7301 .IP "\fB\-mabi=o64\fR" 4
       
  7302 .IX Item "-mabi=o64"
       
  7303 .IP "\fB\-mabi=n32\fR" 4
       
  7304 .IX Item "-mabi=n32"
       
  7305 .IP "\fB\-mabi=64\fR" 4
       
  7306 .IX Item "-mabi=64"
       
  7307 .IP "\fB\-mabi=eabi\fR" 4
       
  7308 .IX Item "-mabi=eabi"
       
  7309 .PD
       
  7310 Generate code for the given \s-1ABI\s0.
       
  7311 .Sp
       
  7312 Note that the \s-1EABI\s0 has a 32\-bit and a 64\-bit variant.  \s-1GCC\s0 normally
       
  7313 generates 64\-bit code when you select a 64\-bit architecture, but you
       
  7314 can use \fB\-mgp32\fR to get 32\-bit code instead.
       
  7315 .IP "\fB\-mabicalls\fR" 4
       
  7316 .IX Item "-mabicalls"
       
  7317 .PD 0
       
  7318 .IP "\fB\-mno\-abicalls\fR" 4
       
  7319 .IX Item "-mno-abicalls"
       
  7320 .PD
       
  7321 Generate (do not generate) SVR4\-style position-independent code.
       
  7322 \&\fB\-mabicalls\fR is the default for SVR4\-based systems.
       
  7323 .IP "\fB\-mxgot\fR" 4
       
  7324 .IX Item "-mxgot"
       
  7325 .PD 0
       
  7326 .IP "\fB\-mno\-xgot\fR" 4
       
  7327 .IX Item "-mno-xgot"
       
  7328 .PD
       
  7329 Lift (do not lift) the usual restrictions on the size of the global
       
  7330 offset table.
       
  7331 .Sp
       
  7332 \&\s-1GCC\s0 normally uses a single instruction to load values from the \s-1GOT\s0.
       
  7333 While this is relatively efficient, it will only work if the \s-1GOT\s0
       
  7334 is smaller than about 64k.  Anything larger will cause the linker
       
  7335 to report an error such as:
       
  7336 .Sp
       
  7337 .Vb 1
       
  7338 \&        relocation truncated to fit: R_MIPS_GOT16 foobar
       
  7339 .Ve
       
  7340 .Sp
       
  7341 If this happens, you should recompile your code with \fB\-mxgot\fR.
       
  7342 It should then work with very large GOTs, although it will also be
       
  7343 less efficient, since it will take three instructions to fetch the
       
  7344 value of a global symbol.
       
  7345 .Sp
       
  7346 Note that some linkers can create multiple GOTs.  If you have such a
       
  7347 linker, you should only need to use \fB\-mxgot\fR when a single object
       
  7348 file accesses more than 64k's worth of \s-1GOT\s0 entries.  Very few do.
       
  7349 .Sp
       
  7350 These options have no effect unless \s-1GCC\s0 is generating position
       
  7351 independent code.
       
  7352 .IP "\fB\-membedded\-pic\fR" 4
       
  7353 .IX Item "-membedded-pic"
       
  7354 .PD 0
       
  7355 .IP "\fB\-mno\-embedded\-pic\fR" 4
       
  7356 .IX Item "-mno-embedded-pic"
       
  7357 .PD
       
  7358 Generate (do not generate) position-independent code suitable for some
       
  7359 embedded systems.  All calls are made using \s-1PC\s0 relative addresses, and
       
  7360 all data is addressed using the \f(CW$gp\fR register.  No more than 65536
       
  7361 bytes of global data may be used.  This requires \s-1GNU\s0 as and \s-1GNU\s0 ld,
       
  7362 which do most of the work.
       
  7363 .IP "\fB\-mgp32\fR" 4
       
  7364 .IX Item "-mgp32"
       
  7365 Assume that general-purpose registers are 32 bits wide.
       
  7366 .IP "\fB\-mgp64\fR" 4
       
  7367 .IX Item "-mgp64"
       
  7368 Assume that general-purpose registers are 64 bits wide.
       
  7369 .IP "\fB\-mfp32\fR" 4
       
  7370 .IX Item "-mfp32"
       
  7371 Assume that floating-point registers are 32 bits wide.
       
  7372 .IP "\fB\-mfp64\fR" 4
       
  7373 .IX Item "-mfp64"
       
  7374 Assume that floating-point registers are 64 bits wide.
       
  7375 .IP "\fB\-mhard\-float\fR" 4
       
  7376 .IX Item "-mhard-float"
       
  7377 Use floating-point coprocessor instructions.
       
  7378 .IP "\fB\-msoft\-float\fR" 4
       
  7379 .IX Item "-msoft-float"
       
  7380 Do not use floating-point coprocessor instructions.  Implement
       
  7381 floating-point calculations using library calls instead.
       
  7382 .IP "\fB\-msingle\-float\fR" 4
       
  7383 .IX Item "-msingle-float"
       
  7384 Assume that the floating-point coprocessor only supports single-precision
       
  7385 operations.
       
  7386 .IP "\fB\-mdouble\-float\fR" 4
       
  7387 .IX Item "-mdouble-float"
       
  7388 Assume that the floating-point coprocessor supports double-precision
       
  7389 operations.  This is the default.
       
  7390 .IP "\fB\-mint64\fR" 4
       
  7391 .IX Item "-mint64"
       
  7392 Force \f(CW\*(C`int\*(C'\fR and \f(CW\*(C`long\*(C'\fR types to be 64 bits wide.  See
       
  7393 \&\fB\-mlong32\fR for an explanation of the default and the way
       
  7394 that the pointer size is determined.
       
  7395 .IP "\fB\-mlong64\fR" 4
       
  7396 .IX Item "-mlong64"
       
  7397 Force \f(CW\*(C`long\*(C'\fR types to be 64 bits wide.  See \fB\-mlong32\fR for
       
  7398 an explanation of the default and the way that the pointer size is
       
  7399 determined.
       
  7400 .IP "\fB\-mlong32\fR" 4
       
  7401 .IX Item "-mlong32"
       
  7402 Force \f(CW\*(C`long\*(C'\fR, \f(CW\*(C`int\*(C'\fR, and pointer types to be 32 bits wide.
       
  7403 .Sp
       
  7404 The default size of \f(CW\*(C`int\*(C'\fRs, \f(CW\*(C`long\*(C'\fRs and pointers depends on
       
  7405 the \s-1ABI\s0.  All the supported ABIs use 32\-bit \f(CW\*(C`int\*(C'\fRs.  The n64 \s-1ABI\s0
       
  7406 uses 64\-bit \f(CW\*(C`long\*(C'\fRs, as does the 64\-bit \s-1EABI\s0; the others use
       
  7407 32\-bit \f(CW\*(C`long\*(C'\fRs.  Pointers are the same size as \f(CW\*(C`long\*(C'\fRs,
       
  7408 or the same size as integer registers, whichever is smaller.
       
  7409 .IP "\fB\-G\fR \fInum\fR" 4
       
  7410 .IX Item "-G num"
       
  7411 Put global and static items less than or equal to \fInum\fR bytes into
       
  7412 the small data or bss section instead of the normal data or bss section.
       
  7413 This allows the data to be accessed using a single instruction.
       
  7414 .Sp
       
  7415 All modules should be compiled with the same \fB\-G\fR \fInum\fR
       
  7416 value.
       
  7417 .IP "\fB\-membedded\-data\fR" 4
       
  7418 .IX Item "-membedded-data"
       
  7419 .PD 0
       
  7420 .IP "\fB\-mno\-embedded\-data\fR" 4
       
  7421 .IX Item "-mno-embedded-data"
       
  7422 .PD
       
  7423 Allocate variables to the read-only data section first if possible, then
       
  7424 next in the small data section if possible, otherwise in data.  This gives
       
  7425 slightly slower code than the default, but reduces the amount of \s-1RAM\s0 required
       
  7426 when executing, and thus may be preferred for some embedded systems.
       
  7427 .IP "\fB\-muninit\-const\-in\-rodata\fR" 4
       
  7428 .IX Item "-muninit-const-in-rodata"
       
  7429 .PD 0
       
  7430 .IP "\fB\-mno\-uninit\-const\-in\-rodata\fR" 4
       
  7431 .IX Item "-mno-uninit-const-in-rodata"
       
  7432 .PD
       
  7433 Put uninitialized \f(CW\*(C`const\*(C'\fR variables in the read-only data section.
       
  7434 This option is only meaningful in conjunction with \fB\-membedded\-data\fR.
       
  7435 .IP "\fB\-msplit\-addresses\fR" 4
       
  7436 .IX Item "-msplit-addresses"
       
  7437 .PD 0
       
  7438 .IP "\fB\-mno\-split\-addresses\fR" 4
       
  7439 .IX Item "-mno-split-addresses"
       
  7440 .PD
       
  7441 Enable (disable) use of the \f(CW\*(C`%hi()\*(C'\fR and \f(CW\*(C`%lo()\*(C'\fR assembler
       
  7442 relocation operators.  This option has been superceded by
       
  7443 \&\fB\-mexplicit\-relocs\fR but is retained for backwards compatibility.
       
  7444 .IP "\fB\-mexplicit\-relocs\fR" 4
       
  7445 .IX Item "-mexplicit-relocs"
       
  7446 .PD 0
       
  7447 .IP "\fB\-mno\-explicit\-relocs\fR" 4
       
  7448 .IX Item "-mno-explicit-relocs"
       
  7449 .PD
       
  7450 Use (do not use) assembler relocation operators when dealing with symbolic
       
  7451 addresses.  The alternative, selected by \fB\-mno\-explicit\-relocs\fR,
       
  7452 is to use assembler macros instead.
       
  7453 .Sp
       
  7454 \&\fB\-mexplicit\-relocs\fR is usually the default if \s-1GCC\s0 was
       
  7455 configured to use an assembler that supports relocation operators.
       
  7456 However, there are two exceptions:
       
  7457 .RS 4
       
  7458 .IP "\(bu" 4
       
  7459 \&\s-1GCC\s0 is not yet able to generate explicit relocations for the combination
       
  7460 of \fB\-mabi=64\fR and \fB\-mno\-abicalls\fR.  This will be addressed
       
  7461 in a future release.
       
  7462 .IP "\(bu" 4
       
  7463 The combination of \fB\-mabicalls\fR and \fB\-fno\-unit\-at\-a\-time\fR
       
  7464 implies \fB\-mno\-explicit\-relocs\fR unless explicitly overridden.
       
  7465 This is because, when generating abicalls, the choice of relocation
       
  7466 depends on whether a symbol is local or global.  In some rare cases,
       
  7467 \&\s-1GCC\s0 will not be able to decide this until the whole compilation unit
       
  7468 has been read.
       
  7469 .RE
       
  7470 .RS 4
       
  7471 .RE
       
  7472 .IP "\fB\-mrnames\fR" 4
       
  7473 .IX Item "-mrnames"
       
  7474 .PD 0
       
  7475 .IP "\fB\-mno\-rnames\fR" 4
       
  7476 .IX Item "-mno-rnames"
       
  7477 .PD
       
  7478 Generate (do not generate) code that refers to registers using their
       
  7479 software names.  The default is \fB\-mno\-rnames\fR, which tells \s-1GCC\s0
       
  7480 to use hardware names like \fB$4\fR instead of software names like
       
  7481 \&\fBa0\fR.  The only assembler known to support \fB\-rnames\fR is
       
  7482 the Algorithmics assembler.
       
  7483 .IP "\fB\-mcheck\-zero\-division\fR" 4
       
  7484 .IX Item "-mcheck-zero-division"
       
  7485 .PD 0
       
  7486 .IP "\fB\-mno\-check\-zero\-division\fR" 4
       
  7487 .IX Item "-mno-check-zero-division"
       
  7488 .PD
       
  7489 Trap (do not trap) on integer division by zero.  The default is
       
  7490 \&\fB\-mcheck\-zero\-division\fR.
       
  7491 .IP "\fB\-mmemcpy\fR" 4
       
  7492 .IX Item "-mmemcpy"
       
  7493 .PD 0
       
  7494 .IP "\fB\-mno\-memcpy\fR" 4
       
  7495 .IX Item "-mno-memcpy"
       
  7496 .PD
       
  7497 Force (do not force) the use of \f(CW\*(C`memcpy()\*(C'\fR for non-trivial block
       
  7498 moves.  The default is \fB\-mno\-memcpy\fR, which allows \s-1GCC\s0 to inline
       
  7499 most constant-sized copies.
       
  7500 .IP "\fB\-mlong\-calls\fR" 4
       
  7501 .IX Item "-mlong-calls"
       
  7502 .PD 0
       
  7503 .IP "\fB\-mno\-long\-calls\fR" 4
       
  7504 .IX Item "-mno-long-calls"
       
  7505 .PD
       
  7506 Disable (do not disable) use of the \f(CW\*(C`jal\*(C'\fR instruction.  Calling
       
  7507 functions using \f(CW\*(C`jal\*(C'\fR is more efficient but requires the caller
       
  7508 and callee to be in the same 256 megabyte segment.
       
  7509 .Sp
       
  7510 This option has no effect on abicalls code.  The default is
       
  7511 \&\fB\-mno\-long\-calls\fR.
       
  7512 .IP "\fB\-mmad\fR" 4
       
  7513 .IX Item "-mmad"
       
  7514 .PD 0
       
  7515 .IP "\fB\-mno\-mad\fR" 4
       
  7516 .IX Item "-mno-mad"
       
  7517 .PD
       
  7518 Enable (disable) use of the \f(CW\*(C`mad\*(C'\fR, \f(CW\*(C`madu\*(C'\fR and \f(CW\*(C`mul\*(C'\fR
       
  7519 instructions, as provided by the R4650 \s-1ISA\s0.
       
  7520 .IP "\fB\-mfused\-madd\fR" 4
       
  7521 .IX Item "-mfused-madd"
       
  7522 .PD 0
       
  7523 .IP "\fB\-mno\-fused\-madd\fR" 4
       
  7524 .IX Item "-mno-fused-madd"
       
  7525 .PD
       
  7526 Enable (disable) use of the floating point multiply-accumulate
       
  7527 instructions, when they are available.  The default is
       
  7528 \&\fB\-mfused\-madd\fR.
       
  7529 .Sp
       
  7530 When multiply-accumulate instructions are used, the intermediate
       
  7531 product is calculated to infinite precision and is not subject to
       
  7532 the \s-1FCSR\s0 Flush to Zero bit.  This may be undesirable in some
       
  7533 circumstances.
       
  7534 .IP "\fB\-nocpp\fR" 4
       
  7535 .IX Item "-nocpp"
       
  7536 Tell the \s-1MIPS\s0 assembler to not run its preprocessor over user
       
  7537 assembler files (with a \fB.s\fR suffix) when assembling them.
       
  7538 .IP "\fB\-mfix\-sb1\fR" 4
       
  7539 .IX Item "-mfix-sb1"
       
  7540 .PD 0
       
  7541 .IP "\fB\-mno\-fix\-sb1\fR" 4
       
  7542 .IX Item "-mno-fix-sb1"
       
  7543 .PD
       
  7544 Work around certain \s-1SB\-1\s0 \s-1CPU\s0 core errata.
       
  7545 (This flag currently works around the \s-1SB\-1\s0 revision 2
       
  7546 ``F1'' and ``F2'' floating point errata.)
       
  7547 .IP "\fB\-mflush\-func=\fR\fIfunc\fR" 4
       
  7548 .IX Item "-mflush-func=func"
       
  7549 .PD 0
       
  7550 .IP "\fB\-mno\-flush\-func\fR" 4
       
  7551 .IX Item "-mno-flush-func"
       
  7552 .PD
       
  7553 Specifies the function to call to flush the I and D caches, or to not
       
  7554 call any such function.  If called, the function must take the same
       
  7555 arguments as the common \f(CW\*(C`_flush_func()\*(C'\fR, that is, the address of the
       
  7556 memory range for which the cache is being flushed, the size of the
       
  7557 memory range, and the number 3 (to flush both caches).  The default
       
  7558 depends on the target \s-1GCC\s0 was configured for, but commonly is either
       
  7559 \&\fB_flush_func\fR or \fB_\|_cpu_flush\fR.
       
  7560 .IP "\fB\-mbranch\-likely\fR" 4
       
  7561 .IX Item "-mbranch-likely"
       
  7562 .PD 0
       
  7563 .IP "\fB\-mno\-branch\-likely\fR" 4
       
  7564 .IX Item "-mno-branch-likely"
       
  7565 .PD
       
  7566 Enable or disable use of Branch Likely instructions, regardless of the
       
  7567 default for the selected architecture.  By default, Branch Likely
       
  7568 instructions may be generated if they are supported by the selected
       
  7569 architecture.  An exception is for the \s-1MIPS32\s0 and \s-1MIPS64\s0 architectures
       
  7570 and processors which implement those architectures; for those, Branch
       
  7571 Likely instructions will not be generated by default because the \s-1MIPS32\s0
       
  7572 and \s-1MIPS64\s0 architectures specifically deprecate their use.
       
  7573 .PP
       
  7574 \fIIntel 386 and \s-1AMD\s0 x86\-64 Options\fR
       
  7575 .IX Subsection "Intel 386 and AMD x86-64 Options"
       
  7576 .PP
       
  7577 These \fB\-m\fR options are defined for the i386 and x86\-64 family of
       
  7578 computers:
       
  7579 .IP "\fB\-mtune=\fR\fIcpu-type\fR" 4
       
  7580 .IX Item "-mtune=cpu-type"
       
  7581 Tune to \fIcpu-type\fR everything applicable about the generated code, except
       
  7582 for the \s-1ABI\s0 and the set of available instructions.  The choices for
       
  7583 \&\fIcpu-type\fR are:
       
  7584 .RS 4
       
  7585 .IP "\fIi386\fR" 4
       
  7586 .IX Item "i386"
       
  7587 Original Intel's i386 \s-1CPU\s0.
       
  7588 .IP "\fIi486\fR" 4
       
  7589 .IX Item "i486"
       
  7590 Intel's i486 \s-1CPU\s0.  (No scheduling is implemented for this chip.)
       
  7591 .IP "\fIi586, pentium\fR" 4
       
  7592 .IX Item "i586, pentium"
       
  7593 Intel Pentium \s-1CPU\s0 with no \s-1MMX\s0 support.
       
  7594 .IP "\fIpentium-mmx\fR" 4
       
  7595 .IX Item "pentium-mmx"
       
  7596 Intel PentiumMMX \s-1CPU\s0 based on Pentium core with \s-1MMX\s0 instruction set support.
       
  7597 .IP "\fIi686, pentiumpro\fR" 4
       
  7598 .IX Item "i686, pentiumpro"
       
  7599 Intel PentiumPro \s-1CPU\s0.
       
  7600 .IP "\fIpentium2\fR" 4
       
  7601 .IX Item "pentium2"
       
  7602 Intel Pentium2 \s-1CPU\s0 based on PentiumPro core with \s-1MMX\s0 instruction set support.
       
  7603 .IP "\fIpentium3, pentium3m\fR" 4
       
  7604 .IX Item "pentium3, pentium3m"
       
  7605 Intel Pentium3 \s-1CPU\s0 based on PentiumPro core with \s-1MMX\s0 and \s-1SSE\s0 instruction set
       
  7606 support.
       
  7607 .IP "\fIpentium-m\fR" 4
       
  7608 .IX Item "pentium-m"
       
  7609 Low power version of Intel Pentium3 \s-1CPU\s0 with \s-1MMX\s0, \s-1SSE\s0 and \s-1SSE2\s0 instruction set
       
  7610 support.  Used by Centrino notebooks.
       
  7611 .IP "\fIpentium4, pentium4m\fR" 4
       
  7612 .IX Item "pentium4, pentium4m"
       
  7613 Intel Pentium4 \s-1CPU\s0 with \s-1MMX\s0, \s-1SSE\s0 and \s-1SSE2\s0 instruction set support.
       
  7614 .IP "\fIprescott\fR" 4
       
  7615 .IX Item "prescott"
       
  7616 Improved version of Intel Pentium4 \s-1CPU\s0 with \s-1MMX\s0, \s-1SSE\s0, \s-1SSE2\s0 and \s-1SSE3\s0 instruction
       
  7617 set support.
       
  7618 .IP "\fInocona\fR" 4
       
  7619 .IX Item "nocona"
       
  7620 Improved version of Intel Pentium4 \s-1CPU\s0 with 64\-bit extensions, \s-1MMX\s0, \s-1SSE\s0,
       
  7621 \&\s-1SSE2\s0 and \s-1SSE3\s0 instruction set support.
       
  7622 .IP "\fIk6\fR" 4
       
  7623 .IX Item "k6"
       
  7624 \&\s-1AMD\s0 K6 \s-1CPU\s0 with \s-1MMX\s0 instruction set support.
       
  7625 .IP "\fIk6\-2, k6\-3\fR" 4
       
  7626 .IX Item "k6-2, k6-3"
       
  7627 Improved versions of \s-1AMD\s0 K6 \s-1CPU\s0 with \s-1MMX\s0 and 3dNOW! instruction set support.
       
  7628 .IP "\fIathlon, athlon-tbird\fR" 4
       
  7629 .IX Item "athlon, athlon-tbird"
       
  7630 \&\s-1AMD\s0 Athlon \s-1CPU\s0 with \s-1MMX\s0, 3dNOW!, enhanced 3dNOW! and \s-1SSE\s0 prefetch instructions
       
  7631 support.
       
  7632 .IP "\fIathlon\-4, athlon\-xp, athlon-mp\fR" 4
       
  7633 .IX Item "athlon-4, athlon-xp, athlon-mp"
       
  7634 Improved \s-1AMD\s0 Athlon \s-1CPU\s0 with \s-1MMX\s0, 3dNOW!, enhanced 3dNOW! and full \s-1SSE\s0
       
  7635 instruction set support.
       
  7636 .IP "\fIk8, opteron, athlon64, athlon-fx\fR" 4
       
  7637 .IX Item "k8, opteron, athlon64, athlon-fx"
       
  7638 \&\s-1AMD\s0 K8 core based CPUs with x86\-64 instruction set support.  (This supersets
       
  7639 \&\s-1MMX\s0, \s-1SSE\s0, \s-1SSE2\s0, 3dNOW!, enhanced 3dNOW! and 64\-bit instruction set extensions.)
       
  7640 .IP "\fIwinchip\-c6\fR" 4
       
  7641 .IX Item "winchip-c6"
       
  7642 \&\s-1IDT\s0 Winchip C6 \s-1CPU\s0, dealt in same way as i486 with additional \s-1MMX\s0 instruction
       
  7643 set support.
       
  7644 .IP "\fIwinchip2\fR" 4
       
  7645 .IX Item "winchip2"
       
  7646 \&\s-1IDT\s0 Winchip2 \s-1CPU\s0, dealt in same way as i486 with additional \s-1MMX\s0 and 3dNOW!
       
  7647 instruction set support.
       
  7648 .IP "\fIc3\fR" 4
       
  7649 .IX Item "c3"
       
  7650 Via C3 \s-1CPU\s0 with \s-1MMX\s0 and 3dNOW!  instruction set support.  (No scheduling is
       
  7651 implemented for this chip.)
       
  7652 .IP "\fIc3\-2\fR" 4
       
  7653 .IX Item "c3-2"
       
  7654 Via C3\-2 \s-1CPU\s0 with \s-1MMX\s0 and \s-1SSE\s0 instruction set support.  (No scheduling is
       
  7655 implemented for this chip.)
       
  7656 .RE
       
  7657 .RS 4
       
  7658 .Sp
       
  7659 While picking a specific \fIcpu-type\fR will schedule things appropriately
       
  7660 for that particular chip, the compiler will not generate any code that
       
  7661 does not run on the i386 without the \fB\-march=\fR\fIcpu-type\fR option
       
  7662 being used.
       
  7663 .RE
       
  7664 .IP "\fB\-march=\fR\fIcpu-type\fR" 4
       
  7665 .IX Item "-march=cpu-type"
       
  7666 Generate instructions for the machine type \fIcpu-type\fR.  The choices
       
  7667 for \fIcpu-type\fR are the same as for \fB\-mtune\fR.  Moreover,
       
  7668 specifying \fB\-march=\fR\fIcpu-type\fR implies \fB\-mtune=\fR\fIcpu-type\fR.
       
  7669 .IP "\fB\-mcpu=\fR\fIcpu-type\fR" 4
       
  7670 .IX Item "-mcpu=cpu-type"
       
  7671 A deprecated synonym for \fB\-mtune\fR.
       
  7672 .IP "\fB\-m386\fR" 4
       
  7673 .IX Item "-m386"
       
  7674 .PD 0
       
  7675 .IP "\fB\-m486\fR" 4
       
  7676 .IX Item "-m486"
       
  7677 .IP "\fB\-mpentium\fR" 4
       
  7678 .IX Item "-mpentium"
       
  7679 .IP "\fB\-mpentiumpro\fR" 4
       
  7680 .IX Item "-mpentiumpro"
       
  7681 .PD
       
  7682 These options are synonyms for \fB\-mtune=i386\fR, \fB\-mtune=i486\fR,
       
  7683 \&\fB\-mtune=pentium\fR, and \fB\-mtune=pentiumpro\fR respectively.
       
  7684 These synonyms are deprecated.
       
  7685 .IP "\fB\-mfpmath=\fR\fIunit\fR" 4
       
  7686 .IX Item "-mfpmath=unit"
       
  7687 Generate floating point arithmetics for selected unit \fIunit\fR.  The choices
       
  7688 for \fIunit\fR are:
       
  7689 .RS 4
       
  7690 .IP "\fB387\fR" 4
       
  7691 .IX Item "387"
       
  7692 Use the standard 387 floating point coprocessor present majority of chips and
       
  7693 emulated otherwise.  Code compiled with this option will run almost everywhere.
       
  7694 The temporary results are computed in 80bit precision instead of precision
       
  7695 specified by the type resulting in slightly different results compared to most
       
  7696 of other chips. See \fB\-ffloat\-store\fR for more detailed description.
       
  7697 .Sp
       
  7698 This is the default choice for i386 compiler.
       
  7699 .IP "\fBsse\fR" 4
       
  7700 .IX Item "sse"
       
  7701 Use scalar floating point instructions present in the \s-1SSE\s0 instruction set.
       
  7702 This instruction set is supported by Pentium3 and newer chips, in the \s-1AMD\s0 line
       
  7703 by Athlon\-4, Athlon-xp and Athlon-mp chips.  The earlier version of \s-1SSE\s0
       
  7704 instruction set supports only single precision arithmetics, thus the double and
       
  7705 extended precision arithmetics is still done using 387.  Later version, present
       
  7706 only in Pentium4 and the future \s-1AMD\s0 x86\-64 chips supports double precision
       
  7707 arithmetics too.
       
  7708 .Sp
       
  7709 For i387 you need to use \fB\-march=\fR\fIcpu-type\fR, \fB\-msse\fR or
       
  7710 \&\fB\-msse2\fR switches to enable \s-1SSE\s0 extensions and make this option
       
  7711 effective.  For x86\-64 compiler, these extensions are enabled by default.
       
  7712 .Sp
       
  7713 The resulting code should be considerably faster in the majority of cases and avoid
       
  7714 the numerical instability problems of 387 code, but may break some existing
       
  7715 code that expects temporaries to be 80bit.
       
  7716 .Sp
       
  7717 This is the default choice for the x86\-64 compiler.
       
  7718 .IP "\fBsse,387\fR" 4
       
  7719 .IX Item "sse,387"
       
  7720 Attempt to utilize both instruction sets at once.  This effectively double the
       
  7721 amount of available registers and on chips with separate execution units for
       
  7722 387 and \s-1SSE\s0 the execution resources too.  Use this option with care, as it is
       
  7723 still experimental, because the \s-1GCC\s0 register allocator does not model separate
       
  7724 functional units well resulting in instable performance.
       
  7725 .RE
       
  7726 .RS 4
       
  7727 .RE
       
  7728 .IP "\fB\-masm=\fR\fIdialect\fR" 4
       
  7729 .IX Item "-masm=dialect"
       
  7730 Output asm instructions using selected \fIdialect\fR. Supported choices are
       
  7731 \&\fBintel\fR or \fBatt\fR (the default one).
       
  7732 .IP "\fB\-mieee\-fp\fR" 4
       
  7733 .IX Item "-mieee-fp"
       
  7734 .PD 0
       
  7735 .IP "\fB\-mno\-ieee\-fp\fR" 4
       
  7736 .IX Item "-mno-ieee-fp"
       
  7737 .PD
       
  7738 Control whether or not the compiler uses \s-1IEEE\s0 floating point
       
  7739 comparisons.  These handle correctly the case where the result of a
       
  7740 comparison is unordered.
       
  7741 .IP "\fB\-msoft\-float\fR" 4
       
  7742 .IX Item "-msoft-float"
       
  7743 Generate output containing library calls for floating point.
       
  7744 \&\fBWarning:\fR the requisite libraries are not part of \s-1GCC\s0.
       
  7745 Normally the facilities of the machine's usual C compiler are used, but
       
  7746 this can't be done directly in cross\-compilation.  You must make your
       
  7747 own arrangements to provide suitable library functions for
       
  7748 cross\-compilation.
       
  7749 .Sp
       
  7750 On machines where a function returns floating point results in the 80387
       
  7751 register stack, some floating point opcodes may be emitted even if
       
  7752 \&\fB\-msoft\-float\fR is used.
       
  7753 .IP "\fB\-mno\-fp\-ret\-in\-387\fR" 4
       
  7754 .IX Item "-mno-fp-ret-in-387"
       
  7755 Do not use the \s-1FPU\s0 registers for return values of functions.
       
  7756 .Sp
       
  7757 The usual calling convention has functions return values of types
       
  7758 \&\f(CW\*(C`float\*(C'\fR and \f(CW\*(C`double\*(C'\fR in an \s-1FPU\s0 register, even if there
       
  7759 is no \s-1FPU\s0.  The idea is that the operating system should emulate
       
  7760 an \s-1FPU\s0.
       
  7761 .Sp
       
  7762 The option \fB\-mno\-fp\-ret\-in\-387\fR causes such values to be returned
       
  7763 in ordinary \s-1CPU\s0 registers instead.
       
  7764 .IP "\fB\-mno\-fancy\-math\-387\fR" 4
       
  7765 .IX Item "-mno-fancy-math-387"
       
  7766 Some 387 emulators do not support the \f(CW\*(C`sin\*(C'\fR, \f(CW\*(C`cos\*(C'\fR and
       
  7767 \&\f(CW\*(C`sqrt\*(C'\fR instructions for the 387.  Specify this option to avoid
       
  7768 generating those instructions.  This option is the default on FreeBSD,
       
  7769 OpenBSD and NetBSD.  This option is overridden when \fB\-march\fR
       
  7770 indicates that the target cpu will always have an \s-1FPU\s0 and so the
       
  7771 instruction will not need emulation.  As of revision 2.6.1, these
       
  7772 instructions are not generated unless you also use the
       
  7773 \&\fB\-funsafe\-math\-optimizations\fR switch.
       
  7774 .IP "\fB\-malign\-double\fR" 4
       
  7775 .IX Item "-malign-double"
       
  7776 .PD 0
       
  7777 .IP "\fB\-mno\-align\-double\fR" 4
       
  7778 .IX Item "-mno-align-double"
       
  7779 .PD
       
  7780 Control whether \s-1GCC\s0 aligns \f(CW\*(C`double\*(C'\fR, \f(CW\*(C`long double\*(C'\fR, and
       
  7781 \&\f(CW\*(C`long long\*(C'\fR variables on a two word boundary or a one word
       
  7782 boundary.  Aligning \f(CW\*(C`double\*(C'\fR variables on a two word boundary will
       
  7783 produce code that runs somewhat faster on a \fBPentium\fR at the
       
  7784 expense of more memory.
       
  7785 .Sp
       
  7786 \&\fBWarning:\fR if you use the \fB\-malign\-double\fR switch,
       
  7787 structures containing the above types will be aligned differently than
       
  7788 the published application binary interface specifications for the 386
       
  7789 and will not be binary compatible with structures in code compiled
       
  7790 without that switch.
       
  7791 .IP "\fB\-m96bit\-long\-double\fR" 4
       
  7792 .IX Item "-m96bit-long-double"
       
  7793 .PD 0
       
  7794 .IP "\fB\-m128bit\-long\-double\fR" 4
       
  7795 .IX Item "-m128bit-long-double"
       
  7796 .PD
       
  7797 These switches control the size of \f(CW\*(C`long double\*(C'\fR type. The i386
       
  7798 application binary interface specifies the size to be 96 bits,
       
  7799 so \fB\-m96bit\-long\-double\fR is the default in 32 bit mode.
       
  7800 .Sp
       
  7801 Modern architectures (Pentium and newer) would prefer \f(CW\*(C`long double\*(C'\fR
       
  7802 to be aligned to an 8 or 16 byte boundary.  In arrays or structures
       
  7803 conforming to the \s-1ABI\s0, this would not be possible.  So specifying a
       
  7804 \&\fB\-m128bit\-long\-double\fR will align \f(CW\*(C`long double\*(C'\fR
       
  7805 to a 16 byte boundary by padding the \f(CW\*(C`long double\*(C'\fR with an additional
       
  7806 32 bit zero.
       
  7807 .Sp
       
  7808 In the x86\-64 compiler, \fB\-m128bit\-long\-double\fR is the default choice as
       
  7809 its \s-1ABI\s0 specifies that \f(CW\*(C`long double\*(C'\fR is to be aligned on 16 byte boundary.
       
  7810 .Sp
       
  7811 Notice that neither of these options enable any extra precision over the x87
       
  7812 standard of 80 bits for a \f(CW\*(C`long double\*(C'\fR.
       
  7813 .Sp
       
  7814 \&\fBWarning:\fR if you override the default value for your target \s-1ABI\s0, the
       
  7815 structures and arrays containing \f(CW\*(C`long double\*(C'\fR variables will change
       
  7816 their size as well as function calling convention for function taking
       
  7817 \&\f(CW\*(C`long double\*(C'\fR will be modified.  Hence they will not be binary
       
  7818 compatible with arrays or structures in code compiled without that switch.
       
  7819 .IP "\fB\-msvr3\-shlib\fR" 4
       
  7820 .IX Item "-msvr3-shlib"
       
  7821 .PD 0
       
  7822 .IP "\fB\-mno\-svr3\-shlib\fR" 4
       
  7823 .IX Item "-mno-svr3-shlib"
       
  7824 .PD
       
  7825 Control whether \s-1GCC\s0 places uninitialized local variables into the
       
  7826 \&\f(CW\*(C`bss\*(C'\fR or \f(CW\*(C`data\*(C'\fR segments.  \fB\-msvr3\-shlib\fR places them
       
  7827 into \f(CW\*(C`bss\*(C'\fR.  These options are meaningful only on System V Release 3.
       
  7828 .IP "\fB\-mrtd\fR" 4
       
  7829 .IX Item "-mrtd"
       
  7830 Use a different function-calling convention, in which functions that
       
  7831 take a fixed number of arguments return with the \f(CW\*(C`ret\*(C'\fR \fInum\fR
       
  7832 instruction, which pops their arguments while returning.  This saves one
       
  7833 instruction in the caller since there is no need to pop the arguments
       
  7834 there.
       
  7835 .Sp
       
  7836 You can specify that an individual function is called with this calling
       
  7837 sequence with the function attribute \fBstdcall\fR.  You can also
       
  7838 override the \fB\-mrtd\fR option by using the function attribute
       
  7839 \&\fBcdecl\fR.  
       
  7840 .Sp
       
  7841 \&\fBWarning:\fR this calling convention is incompatible with the one
       
  7842 normally used on Unix, so you cannot use it if you need to call
       
  7843 libraries compiled with the Unix compiler.
       
  7844 .Sp
       
  7845 Also, you must provide function prototypes for all functions that
       
  7846 take variable numbers of arguments (including \f(CW\*(C`printf\*(C'\fR);
       
  7847 otherwise incorrect code will be generated for calls to those
       
  7848 functions.
       
  7849 .Sp
       
  7850 In addition, seriously incorrect code will result if you call a
       
  7851 function with too many arguments.  (Normally, extra arguments are
       
  7852 harmlessly ignored.)
       
  7853 .IP "\fB\-mregparm=\fR\fInum\fR" 4
       
  7854 .IX Item "-mregparm=num"
       
  7855 Control how many registers are used to pass integer arguments.  By
       
  7856 default, no registers are used to pass arguments, and at most 3
       
  7857 registers can be used.  You can control this behavior for a specific
       
  7858 function by using the function attribute \fBregparm\fR.
       
  7859 .Sp
       
  7860 \&\fBWarning:\fR if you use this switch, and
       
  7861 \&\fInum\fR is nonzero, then you must build all modules with the same
       
  7862 value, including any libraries.  This includes the system libraries and
       
  7863 startup modules.
       
  7864 .IP "\fB\-mpreferred\-stack\-boundary=\fR\fInum\fR" 4
       
  7865 .IX Item "-mpreferred-stack-boundary=num"
       
  7866 Attempt to keep the stack boundary aligned to a 2 raised to \fInum\fR
       
  7867 byte boundary.  If \fB\-mpreferred\-stack\-boundary\fR is not specified,
       
  7868 the default is 4 (16 bytes or 128 bits), except when optimizing for code
       
  7869 size (\fB\-Os\fR), in which case the default is the minimum correct
       
  7870 alignment (4 bytes for x86, and 8 bytes for x86\-64).
       
  7871 .Sp
       
  7872 On Pentium and PentiumPro, \f(CW\*(C`double\*(C'\fR and \f(CW\*(C`long double\*(C'\fR values
       
  7873 should be aligned to an 8 byte boundary (see \fB\-malign\-double\fR) or
       
  7874 suffer significant run time performance penalties.  On Pentium \s-1III\s0, the
       
  7875 Streaming \s-1SIMD\s0 Extension (\s-1SSE\s0) data type \f(CW\*(C`_\|_m128\*(C'\fR suffers similar
       
  7876 penalties if it is not 16 byte aligned.
       
  7877 .Sp
       
  7878 To ensure proper alignment of this values on the stack, the stack boundary
       
  7879 must be as aligned as that required by any value stored on the stack.
       
  7880 Further, every function must be generated such that it keeps the stack
       
  7881 aligned.  Thus calling a function compiled with a higher preferred
       
  7882 stack boundary from a function compiled with a lower preferred stack
       
  7883 boundary will most likely misalign the stack.  It is recommended that
       
  7884 libraries that use callbacks always use the default setting.
       
  7885 .Sp
       
  7886 This extra alignment does consume extra stack space, and generally
       
  7887 increases code size.  Code that is sensitive to stack space usage, such
       
  7888 as embedded systems and operating system kernels, may want to reduce the
       
  7889 preferred alignment to \fB\-mpreferred\-stack\-boundary=2\fR.
       
  7890 .IP "\fB\-mmmx\fR" 4
       
  7891 .IX Item "-mmmx"
       
  7892 .PD 0
       
  7893 .IP "\fB\-mno\-mmx\fR" 4
       
  7894 .IX Item "-mno-mmx"
       
  7895 .IP "\fB\-msse\fR" 4
       
  7896 .IX Item "-msse"
       
  7897 .IP "\fB\-mno\-sse\fR" 4
       
  7898 .IX Item "-mno-sse"
       
  7899 .IP "\fB\-msse2\fR" 4
       
  7900 .IX Item "-msse2"
       
  7901 .IP "\fB\-mno\-sse2\fR" 4
       
  7902 .IX Item "-mno-sse2"
       
  7903 .IP "\fB\-msse3\fR" 4
       
  7904 .IX Item "-msse3"
       
  7905 .IP "\fB\-mno\-sse3\fR" 4
       
  7906 .IX Item "-mno-sse3"
       
  7907 .IP "\fB\-m3dnow\fR" 4
       
  7908 .IX Item "-m3dnow"
       
  7909 .IP "\fB\-mno\-3dnow\fR" 4
       
  7910 .IX Item "-mno-3dnow"
       
  7911 .PD
       
  7912 These switches enable or disable the use of built-in functions that allow
       
  7913 direct access to the \s-1MMX\s0, \s-1SSE\s0, \s-1SSE2\s0, \s-1SSE3\s0 and 3Dnow extensions of the
       
  7914 instruction set.
       
  7915 .Sp
       
  7916 To have \s-1SSE/SSE2\s0 instructions generated automatically from floating-point
       
  7917 code, see \fB\-mfpmath=sse\fR.
       
  7918 .IP "\fB\-mpush\-args\fR" 4
       
  7919 .IX Item "-mpush-args"
       
  7920 .PD 0
       
  7921 .IP "\fB\-mno\-push\-args\fR" 4
       
  7922 .IX Item "-mno-push-args"
       
  7923 .PD
       
  7924 Use \s-1PUSH\s0 operations to store outgoing parameters.  This method is shorter
       
  7925 and usually equally fast as method using \s-1SUB/MOV\s0 operations and is enabled
       
  7926 by default.  In some cases disabling it may improve performance because of
       
  7927 improved scheduling and reduced dependencies.
       
  7928 .IP "\fB\-maccumulate\-outgoing\-args\fR" 4
       
  7929 .IX Item "-maccumulate-outgoing-args"
       
  7930 If enabled, the maximum amount of space required for outgoing arguments will be
       
  7931 computed in the function prologue.  This is faster on most modern CPUs
       
  7932 because of reduced dependencies, improved scheduling and reduced stack usage
       
  7933 when preferred stack boundary is not equal to 2.  The drawback is a notable
       
  7934 increase in code size.  This switch implies \fB\-mno\-push\-args\fR.
       
  7935 .IP "\fB\-mthreads\fR" 4
       
  7936 .IX Item "-mthreads"
       
  7937 Support thread-safe exception handling on \fBMingw32\fR.  Code that relies
       
  7938 on thread-safe exception handling must compile and link all code with the
       
  7939 \&\fB\-mthreads\fR option.  When compiling, \fB\-mthreads\fR defines
       
  7940 \&\fB\-D_MT\fR; when linking, it links in a special thread helper library
       
  7941 \&\fB\-lmingwthrd\fR which cleans up per thread exception handling data.
       
  7942 .IP "\fB\-mno\-align\-stringops\fR" 4
       
  7943 .IX Item "-mno-align-stringops"
       
  7944 Do not align destination of inlined string operations.  This switch reduces
       
  7945 code size and improves performance in case the destination is already aligned,
       
  7946 but \s-1GCC\s0 doesn't know about it.
       
  7947 .IP "\fB\-minline\-all\-stringops\fR" 4
       
  7948 .IX Item "-minline-all-stringops"
       
  7949 By default \s-1GCC\s0 inlines string operations only when destination is known to be
       
  7950 aligned at least to 4 byte boundary.  This enables more inlining, increase code
       
  7951 size, but may improve performance of code that depends on fast memcpy, strlen
       
  7952 and memset for short lengths.
       
  7953 .IP "\fB\-momit\-leaf\-frame\-pointer\fR" 4
       
  7954 .IX Item "-momit-leaf-frame-pointer"
       
  7955 Don't keep the frame pointer in a register for leaf functions.  This
       
  7956 avoids the instructions to save, set up and restore frame pointers and
       
  7957 makes an extra register available in leaf functions.  The option
       
  7958 \&\fB\-fomit\-frame\-pointer\fR removes the frame pointer for all functions
       
  7959 which might make debugging harder.
       
  7960 .IP "\fB\-mtls\-direct\-seg\-refs\fR" 4
       
  7961 .IX Item "-mtls-direct-seg-refs"
       
  7962 .PD 0
       
  7963 .IP "\fB\-mno\-tls\-direct\-seg\-refs\fR" 4
       
  7964 .IX Item "-mno-tls-direct-seg-refs"
       
  7965 .PD
       
  7966 Controls whether \s-1TLS\s0 variables may be accessed with offsets from the
       
  7967 \&\s-1TLS\s0 segment register (\f(CW%gs\fR for 32\-bit, \f(CW%fs\fR for 64\-bit),
       
  7968 or whether the thread base pointer must be added.  Whether or not this
       
  7969 is legal depends on the operating system, and whether it maps the
       
  7970 segment to cover the entire \s-1TLS\s0 area.
       
  7971 .Sp
       
  7972 For systems that use \s-1GNU\s0 libc, the default is on.
       
  7973 .PP
       
  7974 These \fB\-m\fR switches are supported in addition to the above
       
  7975 on \s-1AMD\s0 x86\-64 processors in 64\-bit environments.
       
  7976 .IP "\fB\-m32\fR" 4
       
  7977 .IX Item "-m32"
       
  7978 .PD 0
       
  7979 .IP "\fB\-m64\fR" 4
       
  7980 .IX Item "-m64"
       
  7981 .PD
       
  7982 Generate code for a 32\-bit or 64\-bit environment.
       
  7983 The 32\-bit environment sets int, long and pointer to 32 bits and
       
  7984 generates code that runs on any i386 system.
       
  7985 The 64\-bit environment sets int to 32 bits and long and pointer
       
  7986 to 64 bits and generates code for \s-1AMD\s0's x86\-64 architecture.
       
  7987 .IP "\fB\-mno\-red\-zone\fR" 4
       
  7988 .IX Item "-mno-red-zone"
       
  7989 Do not use a so called red zone for x86\-64 code.  The red zone is mandated
       
  7990 by the x86\-64 \s-1ABI\s0, it is a 128\-byte area beyond the location of the
       
  7991 stack pointer that will not be modified by signal or interrupt handlers
       
  7992 and therefore can be used for temporary data without adjusting the stack
       
  7993 pointer.  The flag \fB\-mno\-red\-zone\fR disables this red zone.
       
  7994 .IP "\fB\-mcmodel=small\fR" 4
       
  7995 .IX Item "-mcmodel=small"
       
  7996 Generate code for the small code model: the program and its symbols must
       
  7997 be linked in the lower 2 \s-1GB\s0 of the address space.  Pointers are 64 bits.
       
  7998 Programs can be statically or dynamically linked.  This is the default
       
  7999 code model.
       
  8000 .IP "\fB\-mcmodel=kernel\fR" 4
       
  8001 .IX Item "-mcmodel=kernel"
       
  8002 Generate code for the kernel code model.  The kernel runs in the
       
  8003 negative 2 \s-1GB\s0 of the address space.
       
  8004 This model has to be used for Linux kernel code.
       
  8005 .IP "\fB\-mcmodel=medium\fR" 4
       
  8006 .IX Item "-mcmodel=medium"
       
  8007 Generate code for the medium model: The program is linked in the lower 2
       
  8008 \&\s-1GB\s0 of the address space but symbols can be located anywhere in the
       
  8009 address space.  Programs can be statically or dynamically linked, but
       
  8010 building of shared libraries are not supported with the medium model.
       
  8011 .IP "\fB\-mcmodel=large\fR" 4
       
  8012 .IX Item "-mcmodel=large"
       
  8013 Generate code for the large model: This model makes no assumptions
       
  8014 about addresses and sizes of sections.  Currently \s-1GCC\s0 does not implement
       
  8015 this model.
       
  8016 .PP
       
  8017 \fI\s-1HPPA\s0 Options\fR
       
  8018 .IX Subsection "HPPA Options"
       
  8019 .PP
       
  8020 These \fB\-m\fR options are defined for the \s-1HPPA\s0 family of computers:
       
  8021 .IP "\fB\-march=\fR\fIarchitecture-type\fR" 4
       
  8022 .IX Item "-march=architecture-type"
       
  8023 Generate code for the specified architecture.  The choices for
       
  8024 \&\fIarchitecture-type\fR are \fB1.0\fR for \s-1PA\s0 1.0, \fB1.1\fR for \s-1PA\s0
       
  8025 1.1, and \fB2.0\fR for \s-1PA\s0 2.0 processors.  Refer to
       
  8026 \&\fI/usr/lib/sched.models\fR on an HP-UX system to determine the proper
       
  8027 architecture option for your machine.  Code compiled for lower numbered
       
  8028 architectures will run on higher numbered architectures, but not the
       
  8029 other way around.
       
  8030 .Sp
       
  8031 \&\s-1PA\s0 2.0 support currently requires gas snapshot 19990413 or later.  The
       
  8032 next release of binutils (current is 2.9.1) will probably contain \s-1PA\s0 2.0
       
  8033 support.
       
  8034 .IP "\fB\-mpa\-risc\-1\-0\fR" 4
       
  8035 .IX Item "-mpa-risc-1-0"
       
  8036 .PD 0
       
  8037 .IP "\fB\-mpa\-risc\-1\-1\fR" 4
       
  8038 .IX Item "-mpa-risc-1-1"
       
  8039 .IP "\fB\-mpa\-risc\-2\-0\fR" 4
       
  8040 .IX Item "-mpa-risc-2-0"
       
  8041 .PD
       
  8042 Synonyms for \fB\-march=1.0\fR, \fB\-march=1.1\fR, and \fB\-march=2.0\fR respectively.
       
  8043 .IP "\fB\-mbig\-switch\fR" 4
       
  8044 .IX Item "-mbig-switch"
       
  8045 Generate code suitable for big switch tables.  Use this option only if
       
  8046 the assembler/linker complain about out of range branches within a switch
       
  8047 table.
       
  8048 .IP "\fB\-mjump\-in\-delay\fR" 4
       
  8049 .IX Item "-mjump-in-delay"
       
  8050 Fill delay slots of function calls with unconditional jump instructions
       
  8051 by modifying the return pointer for the function call to be the target
       
  8052 of the conditional jump.
       
  8053 .IP "\fB\-mdisable\-fpregs\fR" 4
       
  8054 .IX Item "-mdisable-fpregs"
       
  8055 Prevent floating point registers from being used in any manner.  This is
       
  8056 necessary for compiling kernels which perform lazy context switching of
       
  8057 floating point registers.  If you use this option and attempt to perform
       
  8058 floating point operations, the compiler will abort.
       
  8059 .IP "\fB\-mdisable\-indexing\fR" 4
       
  8060 .IX Item "-mdisable-indexing"
       
  8061 Prevent the compiler from using indexing address modes.  This avoids some
       
  8062 rather obscure problems when compiling \s-1MIG\s0 generated code under \s-1MACH\s0.
       
  8063 .IP "\fB\-mno\-space\-regs\fR" 4
       
  8064 .IX Item "-mno-space-regs"
       
  8065 Generate code that assumes the target has no space registers.  This allows
       
  8066 \&\s-1GCC\s0 to generate faster indirect calls and use unscaled index address modes.
       
  8067 .Sp
       
  8068 Such code is suitable for level 0 \s-1PA\s0 systems and kernels.
       
  8069 .IP "\fB\-mfast\-indirect\-calls\fR" 4
       
  8070 .IX Item "-mfast-indirect-calls"
       
  8071 Generate code that assumes calls never cross space boundaries.  This
       
  8072 allows \s-1GCC\s0 to emit code which performs faster indirect calls.
       
  8073 .Sp
       
  8074 This option will not work in the presence of shared libraries or nested
       
  8075 functions.
       
  8076 .IP "\fB\-mlong\-load\-store\fR" 4
       
  8077 .IX Item "-mlong-load-store"
       
  8078 Generate 3\-instruction load and store sequences as sometimes required by
       
  8079 the HP-UX 10 linker.  This is equivalent to the \fB+k\fR option to
       
  8080 the \s-1HP\s0 compilers.
       
  8081 .IP "\fB\-mportable\-runtime\fR" 4
       
  8082 .IX Item "-mportable-runtime"
       
  8083 Use the portable calling conventions proposed by \s-1HP\s0 for \s-1ELF\s0 systems.
       
  8084 .IP "\fB\-mgas\fR" 4
       
  8085 .IX Item "-mgas"
       
  8086 Enable the use of assembler directives only \s-1GAS\s0 understands.
       
  8087 .IP "\fB\-mschedule=\fR\fIcpu-type\fR" 4
       
  8088 .IX Item "-mschedule=cpu-type"
       
  8089 Schedule code according to the constraints for the machine type
       
  8090 \&\fIcpu-type\fR.  The choices for \fIcpu-type\fR are \fB700\fR
       
  8091 \&\fB7100\fR, \fB7100LC\fR, \fB7200\fR, \fB7300\fR and \fB8000\fR.  Refer
       
  8092 to \fI/usr/lib/sched.models\fR on an HP-UX system to determine the
       
  8093 proper scheduling option for your machine.  The default scheduling is
       
  8094 \&\fB8000\fR.
       
  8095 .IP "\fB\-mlinker\-opt\fR" 4
       
  8096 .IX Item "-mlinker-opt"
       
  8097 Enable the optimization pass in the HP-UX linker.  Note this makes symbolic
       
  8098 debugging impossible.  It also triggers a bug in the HP-UX 8 and HP-UX 9
       
  8099 linkers in which they give bogus error messages when linking some programs.
       
  8100 .IP "\fB\-msoft\-float\fR" 4
       
  8101 .IX Item "-msoft-float"
       
  8102 Generate output containing library calls for floating point.
       
  8103 \&\fBWarning:\fR the requisite libraries are not available for all \s-1HPPA\s0
       
  8104 targets.  Normally the facilities of the machine's usual C compiler are
       
  8105 used, but this cannot be done directly in cross\-compilation.  You must make
       
  8106 your own arrangements to provide suitable library functions for
       
  8107 cross\-compilation.  The embedded target \fBhppa1.1\-*\-pro\fR
       
  8108 does provide software floating point support.
       
  8109 .Sp
       
  8110 \&\fB\-msoft\-float\fR changes the calling convention in the output file;
       
  8111 therefore, it is only useful if you compile \fIall\fR of a program with
       
  8112 this option.  In particular, you need to compile \fIlibgcc.a\fR, the
       
  8113 library that comes with \s-1GCC\s0, with \fB\-msoft\-float\fR in order for
       
  8114 this to work.
       
  8115 .IP "\fB\-msio\fR" 4
       
  8116 .IX Item "-msio"
       
  8117 Generate the predefine, \f(CW\*(C`_SIO\*(C'\fR, for server \s-1IO\s0.  The default is
       
  8118 \&\fB\-mwsio\fR.  This generates the predefines, \f(CW\*(C`_\|_hp9000s700\*(C'\fR,
       
  8119 \&\f(CW\*(C`_\|_hp9000s700_\|_\*(C'\fR and \f(CW\*(C`_WSIO\*(C'\fR, for workstation \s-1IO\s0.  These
       
  8120 options are available under HP-UX and \s-1HI\-UX\s0.
       
  8121 .IP "\fB\-mgnu\-ld\fR" 4
       
  8122 .IX Item "-mgnu-ld"
       
  8123 Use \s-1GNU\s0 ld specific options.  This passes \fB\-shared\fR to ld when
       
  8124 building a shared library.  It is the default when \s-1GCC\s0 is configured,
       
  8125 explicitly or implicitly, with the \s-1GNU\s0 linker.  This option does not
       
  8126 have any affect on which ld is called, it only changes what parameters
       
  8127 are passed to that ld.  The ld that is called is determined by the
       
  8128 \&\fB\-\-with\-ld\fR configure option, \s-1GCC\s0's program search path, and
       
  8129 finally by the user's \fB\s-1PATH\s0\fR.  The linker used by \s-1GCC\s0 can be printed
       
  8130 using \fBwhich `gcc \-print\-prog\-name=ld`\fR.
       
  8131 .IP "\fB\-mhp\-ld\fR" 4
       
  8132 .IX Item "-mhp-ld"
       
  8133 Use \s-1HP\s0 ld specific options.  This passes \fB\-b\fR to ld when building
       
  8134 a shared library and passes \fB+Accept TypeMismatch\fR to ld on all
       
  8135 links.  It is the default when \s-1GCC\s0 is configured, explicitly or
       
  8136 implicitly, with the \s-1HP\s0 linker.  This option does not have any affect on
       
  8137 which ld is called, it only changes what parameters are passed to that
       
  8138 ld.  The ld that is called is determined by the \fB\-\-with\-ld\fR
       
  8139 configure option, \s-1GCC\s0's program search path, and finally by the user's
       
  8140 \&\fB\s-1PATH\s0\fR.  The linker used by \s-1GCC\s0 can be printed using \fBwhich
       
  8141 `gcc \-print\-prog\-name=ld`\fR.
       
  8142 .IP "\fB\-mlong\-calls\fR" 4
       
  8143 .IX Item "-mlong-calls"
       
  8144 Generate code that uses long call sequences.  This ensures that a call
       
  8145 is always able to reach linker generated stubs.  The default is to generate
       
  8146 long calls only when the distance from the call site to the beginning
       
  8147 of the function or translation unit, as the case may be, exceeds a
       
  8148 predefined limit set by the branch type being used.  The limits for
       
  8149 normal calls are 7,600,000 and 240,000 bytes, respectively for the
       
  8150 \&\s-1PA\s0 2.0 and \s-1PA\s0 1.X architectures.  Sibcalls are always limited at
       
  8151 240,000 bytes.
       
  8152 .Sp
       
  8153 Distances are measured from the beginning of functions when using the
       
  8154 \&\fB\-ffunction\-sections\fR option, or when using the \fB\-mgas\fR
       
  8155 and \fB\-mno\-portable\-runtime\fR options together under HP-UX with
       
  8156 the \s-1SOM\s0 linker.
       
  8157 .Sp
       
  8158 It is normally not desirable to use this option as it will degrade
       
  8159 performance.  However, it may be useful in large applications,
       
  8160 particularly when partial linking is used to build the application.
       
  8161 .Sp
       
  8162 The types of long calls used depends on the capabilities of the
       
  8163 assembler and linker, and the type of code being generated.  The
       
  8164 impact on systems that support long absolute calls, and long pic
       
  8165 symbol-difference or pc-relative calls should be relatively small.
       
  8166 However, an indirect call is used on 32\-bit \s-1ELF\s0 systems in pic code
       
  8167 and it is quite long.
       
  8168 .IP "\fB\-nolibdld\fR" 4
       
  8169 .IX Item "-nolibdld"
       
  8170 Suppress the generation of link options to search libdld.sl when the
       
  8171 \&\fB\-static\fR option is specified on HP-UX 10 and later.
       
  8172 .IP "\fB\-static\fR" 4
       
  8173 .IX Item "-static"
       
  8174 The HP-UX implementation of setlocale in libc has a dependency on
       
  8175 libdld.sl.  There isn't an archive version of libdld.sl.  Thus,
       
  8176 when the \fB\-static\fR option is specified, special link options
       
  8177 are needed to resolve this dependency.
       
  8178 .Sp
       
  8179 On HP-UX 10 and later, the \s-1GCC\s0 driver adds the necessary options to
       
  8180 link with libdld.sl when the \fB\-static\fR option is specified.
       
  8181 This causes the resulting binary to be dynamic.  On the 64\-bit port,
       
  8182 the linkers generate dynamic binaries by default in any case.  The
       
  8183 \&\fB\-nolibdld\fR option can be used to prevent the \s-1GCC\s0 driver from
       
  8184 adding these link options.
       
  8185 .IP "\fB\-threads\fR" 4
       
  8186 .IX Item "-threads"
       
  8187 Add support for multithreading with the \fIdce thread\fR library
       
  8188 under \s-1HP\-UX\s0.  This option sets flags for both the preprocessor and
       
  8189 linker.
       
  8190 .PP
       
  8191 \fIIntel 960 Options\fR
       
  8192 .IX Subsection "Intel 960 Options"
       
  8193 .PP
       
  8194 These \fB\-m\fR options are defined for the Intel 960 implementations:
       
  8195 .IP "\fB\-m\fR\fIcpu-type\fR" 4
       
  8196 .IX Item "-mcpu-type"
       
  8197 Assume the defaults for the machine type \fIcpu-type\fR for some of
       
  8198 the other options, including instruction scheduling, floating point
       
  8199 support, and addressing modes.  The choices for \fIcpu-type\fR are
       
  8200 \&\fBka\fR, \fBkb\fR, \fBmc\fR, \fBca\fR, \fBcf\fR,
       
  8201 \&\fBsa\fR, and \fBsb\fR.
       
  8202 The default is
       
  8203 \&\fBkb\fR.
       
  8204 .IP "\fB\-mnumerics\fR" 4
       
  8205 .IX Item "-mnumerics"
       
  8206 .PD 0
       
  8207 .IP "\fB\-msoft\-float\fR" 4
       
  8208 .IX Item "-msoft-float"
       
  8209 .PD
       
  8210 The \fB\-mnumerics\fR option indicates that the processor does support
       
  8211 floating-point instructions.  The \fB\-msoft\-float\fR option indicates
       
  8212 that floating-point support should not be assumed.
       
  8213 .IP "\fB\-mleaf\-procedures\fR" 4
       
  8214 .IX Item "-mleaf-procedures"
       
  8215 .PD 0
       
  8216 .IP "\fB\-mno\-leaf\-procedures\fR" 4
       
  8217 .IX Item "-mno-leaf-procedures"
       
  8218 .PD
       
  8219 Do (or do not) attempt to alter leaf procedures to be callable with the
       
  8220 \&\f(CW\*(C`bal\*(C'\fR instruction as well as \f(CW\*(C`call\*(C'\fR.  This will result in more
       
  8221 efficient code for explicit calls when the \f(CW\*(C`bal\*(C'\fR instruction can be
       
  8222 substituted by the assembler or linker, but less efficient code in other
       
  8223 cases, such as calls via function pointers, or using a linker that doesn't
       
  8224 support this optimization.
       
  8225 .IP "\fB\-mtail\-call\fR" 4
       
  8226 .IX Item "-mtail-call"
       
  8227 .PD 0
       
  8228 .IP "\fB\-mno\-tail\-call\fR" 4
       
  8229 .IX Item "-mno-tail-call"
       
  8230 .PD
       
  8231 Do (or do not) make additional attempts (beyond those of the
       
  8232 machine-independent portions of the compiler) to optimize tail-recursive
       
  8233 calls into branches.  You may not want to do this because the detection of
       
  8234 cases where this is not valid is not totally complete.  The default is
       
  8235 \&\fB\-mno\-tail\-call\fR.
       
  8236 .IP "\fB\-mcomplex\-addr\fR" 4
       
  8237 .IX Item "-mcomplex-addr"
       
  8238 .PD 0
       
  8239 .IP "\fB\-mno\-complex\-addr\fR" 4
       
  8240 .IX Item "-mno-complex-addr"
       
  8241 .PD
       
  8242 Assume (or do not assume) that the use of a complex addressing mode is a
       
  8243 win on this implementation of the i960.  Complex addressing modes may not
       
  8244 be worthwhile on the K\-series, but they definitely are on the C\-series.
       
  8245 The default is currently \fB\-mcomplex\-addr\fR for all processors except
       
  8246 the \s-1CB\s0 and \s-1CC\s0.
       
  8247 .IP "\fB\-mcode\-align\fR" 4
       
  8248 .IX Item "-mcode-align"
       
  8249 .PD 0
       
  8250 .IP "\fB\-mno\-code\-align\fR" 4
       
  8251 .IX Item "-mno-code-align"
       
  8252 .PD
       
  8253 Align code to 8\-byte boundaries for faster fetching (or don't bother).
       
  8254 Currently turned on by default for C\-series implementations only.
       
  8255 .IP "\fB\-mic\-compat\fR" 4
       
  8256 .IX Item "-mic-compat"
       
  8257 .PD 0
       
  8258 .IP "\fB\-mic2.0\-compat\fR" 4
       
  8259 .IX Item "-mic2.0-compat"
       
  8260 .IP "\fB\-mic3.0\-compat\fR" 4
       
  8261 .IX Item "-mic3.0-compat"
       
  8262 .PD
       
  8263 Enable compatibility with iC960 v2.0 or v3.0.
       
  8264 .IP "\fB\-masm\-compat\fR" 4
       
  8265 .IX Item "-masm-compat"
       
  8266 .PD 0
       
  8267 .IP "\fB\-mintel\-asm\fR" 4
       
  8268 .IX Item "-mintel-asm"
       
  8269 .PD
       
  8270 Enable compatibility with the iC960 assembler.
       
  8271 .IP "\fB\-mstrict\-align\fR" 4
       
  8272 .IX Item "-mstrict-align"
       
  8273 .PD 0
       
  8274 .IP "\fB\-mno\-strict\-align\fR" 4
       
  8275 .IX Item "-mno-strict-align"
       
  8276 .PD
       
  8277 Do not permit (do permit) unaligned accesses.
       
  8278 .IP "\fB\-mold\-align\fR" 4
       
  8279 .IX Item "-mold-align"
       
  8280 Enable structure-alignment compatibility with Intel's gcc release version
       
  8281 1.3 (based on gcc 1.37).  This option implies \fB\-mstrict\-align\fR.
       
  8282 .IP "\fB\-mlong\-double\-64\fR" 4
       
  8283 .IX Item "-mlong-double-64"
       
  8284 Implement type \fBlong double\fR as 64\-bit floating point numbers.
       
  8285 Without the option \fBlong double\fR is implemented by 80\-bit
       
  8286 floating point numbers.  The only reason we have it because there is
       
  8287 no 128\-bit \fBlong double\fR support in \fBfp\-bit.c\fR yet.  So it
       
  8288 is only useful for people using soft-float targets.  Otherwise, we
       
  8289 should recommend against use of it.
       
  8290 .PP
       
  8291 \fI\s-1DEC\s0 Alpha Options\fR
       
  8292 .IX Subsection "DEC Alpha Options"
       
  8293 .PP
       
  8294 These \fB\-m\fR options are defined for the \s-1DEC\s0 Alpha implementations:
       
  8295 .IP "\fB\-mno\-soft\-float\fR" 4
       
  8296 .IX Item "-mno-soft-float"
       
  8297 .PD 0
       
  8298 .IP "\fB\-msoft\-float\fR" 4
       
  8299 .IX Item "-msoft-float"
       
  8300 .PD
       
  8301 Use (do not use) the hardware floating-point instructions for
       
  8302 floating-point operations.  When \fB\-msoft\-float\fR is specified,
       
  8303 functions in \fIlibgcc.a\fR will be used to perform floating-point
       
  8304 operations.  Unless they are replaced by routines that emulate the
       
  8305 floating-point operations, or compiled in such a way as to call such
       
  8306 emulations routines, these routines will issue floating-point
       
  8307 operations.   If you are compiling for an Alpha without floating-point
       
  8308 operations, you must ensure that the library is built so as not to call
       
  8309 them.
       
  8310 .Sp
       
  8311 Note that Alpha implementations without floating-point operations are
       
  8312 required to have floating-point registers.
       
  8313 .IP "\fB\-mfp\-reg\fR" 4
       
  8314 .IX Item "-mfp-reg"
       
  8315 .PD 0
       
  8316 .IP "\fB\-mno\-fp\-regs\fR" 4
       
  8317 .IX Item "-mno-fp-regs"
       
  8318 .PD
       
  8319 Generate code that uses (does not use) the floating-point register set.
       
  8320 \&\fB\-mno\-fp\-regs\fR implies \fB\-msoft\-float\fR.  If the floating-point
       
  8321 register set is not used, floating point operands are passed in integer
       
  8322 registers as if they were integers and floating-point results are passed
       
  8323 in \f(CW$0\fR instead of \f(CW$f0\fR.  This is a non-standard calling sequence,
       
  8324 so any function with a floating-point argument or return value called by code
       
  8325 compiled with \fB\-mno\-fp\-regs\fR must also be compiled with that
       
  8326 option.
       
  8327 .Sp
       
  8328 A typical use of this option is building a kernel that does not use,
       
  8329 and hence need not save and restore, any floating-point registers.
       
  8330 .IP "\fB\-mieee\fR" 4
       
  8331 .IX Item "-mieee"
       
  8332 The Alpha architecture implements floating-point hardware optimized for
       
  8333 maximum performance.  It is mostly compliant with the \s-1IEEE\s0 floating
       
  8334 point standard.  However, for full compliance, software assistance is
       
  8335 required.  This option generates code fully \s-1IEEE\s0 compliant code
       
  8336 \&\fIexcept\fR that the \fIinexact-flag\fR is not maintained (see below).
       
  8337 If this option is turned on, the preprocessor macro \f(CW\*(C`_IEEE_FP\*(C'\fR is
       
  8338 defined during compilation.  The resulting code is less efficient but is
       
  8339 able to correctly support denormalized numbers and exceptional \s-1IEEE\s0
       
  8340 values such as not-a-number and plus/minus infinity.  Other Alpha
       
  8341 compilers call this option \fB\-ieee_with_no_inexact\fR.
       
  8342 .IP "\fB\-mieee\-with\-inexact\fR" 4
       
  8343 .IX Item "-mieee-with-inexact"
       
  8344 This is like \fB\-mieee\fR except the generated code also maintains
       
  8345 the \s-1IEEE\s0 \fIinexact-flag\fR.  Turning on this option causes the
       
  8346 generated code to implement fully-compliant \s-1IEEE\s0 math.  In addition to
       
  8347 \&\f(CW\*(C`_IEEE_FP\*(C'\fR, \f(CW\*(C`_IEEE_FP_EXACT\*(C'\fR is defined as a preprocessor
       
  8348 macro.  On some Alpha implementations the resulting code may execute
       
  8349 significantly slower than the code generated by default.  Since there is
       
  8350 very little code that depends on the \fIinexact-flag\fR, you should
       
  8351 normally not specify this option.  Other Alpha compilers call this
       
  8352 option \fB\-ieee_with_inexact\fR.
       
  8353 .IP "\fB\-mfp\-trap\-mode=\fR\fItrap-mode\fR" 4
       
  8354 .IX Item "-mfp-trap-mode=trap-mode"
       
  8355 This option controls what floating-point related traps are enabled.
       
  8356 Other Alpha compilers call this option \fB\-fptm\fR \fItrap-mode\fR.
       
  8357 The trap mode can be set to one of four values:
       
  8358 .RS 4
       
  8359 .IP "\fBn\fR" 4
       
  8360 .IX Item "n"
       
  8361 This is the default (normal) setting.  The only traps that are enabled
       
  8362 are the ones that cannot be disabled in software (e.g., division by zero
       
  8363 trap).
       
  8364 .IP "\fBu\fR" 4
       
  8365 .IX Item "u"
       
  8366 In addition to the traps enabled by \fBn\fR, underflow traps are enabled
       
  8367 as well.
       
  8368 .IP "\fBsu\fR" 4
       
  8369 .IX Item "su"
       
  8370 Like \fBsu\fR, but the instructions are marked to be safe for software
       
  8371 completion (see Alpha architecture manual for details).
       
  8372 .IP "\fBsui\fR" 4
       
  8373 .IX Item "sui"
       
  8374 Like \fBsu\fR, but inexact traps are enabled as well.
       
  8375 .RE
       
  8376 .RS 4
       
  8377 .RE
       
  8378 .IP "\fB\-mfp\-rounding\-mode=\fR\fIrounding-mode\fR" 4
       
  8379 .IX Item "-mfp-rounding-mode=rounding-mode"
       
  8380 Selects the \s-1IEEE\s0 rounding mode.  Other Alpha compilers call this option
       
  8381 \&\fB\-fprm\fR \fIrounding-mode\fR.  The \fIrounding-mode\fR can be one
       
  8382 of:
       
  8383 .RS 4
       
  8384 .IP "\fBn\fR" 4
       
  8385 .IX Item "n"
       
  8386 Normal \s-1IEEE\s0 rounding mode.  Floating point numbers are rounded towards
       
  8387 the nearest machine number or towards the even machine number in case
       
  8388 of a tie.
       
  8389 .IP "\fBm\fR" 4
       
  8390 .IX Item "m"
       
  8391 Round towards minus infinity.
       
  8392 .IP "\fBc\fR" 4
       
  8393 .IX Item "c"
       
  8394 Chopped rounding mode.  Floating point numbers are rounded towards zero.
       
  8395 .IP "\fBd\fR" 4
       
  8396 .IX Item "d"
       
  8397 Dynamic rounding mode.  A field in the floating point control register
       
  8398 (\fIfpcr\fR, see Alpha architecture reference manual) controls the
       
  8399 rounding mode in effect.  The C library initializes this register for
       
  8400 rounding towards plus infinity.  Thus, unless your program modifies the
       
  8401 \&\fIfpcr\fR, \fBd\fR corresponds to round towards plus infinity.
       
  8402 .RE
       
  8403 .RS 4
       
  8404 .RE
       
  8405 .IP "\fB\-mtrap\-precision=\fR\fItrap-precision\fR" 4
       
  8406 .IX Item "-mtrap-precision=trap-precision"
       
  8407 In the Alpha architecture, floating point traps are imprecise.  This
       
  8408 means without software assistance it is impossible to recover from a
       
  8409 floating trap and program execution normally needs to be terminated.
       
  8410 \&\s-1GCC\s0 can generate code that can assist operating system trap handlers
       
  8411 in determining the exact location that caused a floating point trap.
       
  8412 Depending on the requirements of an application, different levels of
       
  8413 precisions can be selected:
       
  8414 .RS 4
       
  8415 .IP "\fBp\fR" 4
       
  8416 .IX Item "p"
       
  8417 Program precision.  This option is the default and means a trap handler
       
  8418 can only identify which program caused a floating point exception.
       
  8419 .IP "\fBf\fR" 4
       
  8420 .IX Item "f"
       
  8421 Function precision.  The trap handler can determine the function that
       
  8422 caused a floating point exception.
       
  8423 .IP "\fBi\fR" 4
       
  8424 .IX Item "i"
       
  8425 Instruction precision.  The trap handler can determine the exact
       
  8426 instruction that caused a floating point exception.
       
  8427 .RE
       
  8428 .RS 4
       
  8429 .Sp
       
  8430 Other Alpha compilers provide the equivalent options called
       
  8431 \&\fB\-scope_safe\fR and \fB\-resumption_safe\fR.
       
  8432 .RE
       
  8433 .IP "\fB\-mieee\-conformant\fR" 4
       
  8434 .IX Item "-mieee-conformant"
       
  8435 This option marks the generated code as \s-1IEEE\s0 conformant.  You must not
       
  8436 use this option unless you also specify \fB\-mtrap\-precision=i\fR and either
       
  8437 \&\fB\-mfp\-trap\-mode=su\fR or \fB\-mfp\-trap\-mode=sui\fR.  Its only effect
       
  8438 is to emit the line \fB.eflag 48\fR in the function prologue of the
       
  8439 generated assembly file.  Under \s-1DEC\s0 Unix, this has the effect that
       
  8440 IEEE-conformant math library routines will be linked in.
       
  8441 .IP "\fB\-mbuild\-constants\fR" 4
       
  8442 .IX Item "-mbuild-constants"
       
  8443 Normally \s-1GCC\s0 examines a 32\- or 64\-bit integer constant to
       
  8444 see if it can construct it from smaller constants in two or three
       
  8445 instructions.  If it cannot, it will output the constant as a literal and
       
  8446 generate code to load it from the data segment at runtime.
       
  8447 .Sp
       
  8448 Use this option to require \s-1GCC\s0 to construct \fIall\fR integer constants
       
  8449 using code, even if it takes more instructions (the maximum is six).
       
  8450 .Sp
       
  8451 You would typically use this option to build a shared library dynamic
       
  8452 loader.  Itself a shared library, it must relocate itself in memory
       
  8453 before it can find the variables and constants in its own data segment.
       
  8454 .IP "\fB\-malpha\-as\fR" 4
       
  8455 .IX Item "-malpha-as"
       
  8456 .PD 0
       
  8457 .IP "\fB\-mgas\fR" 4
       
  8458 .IX Item "-mgas"
       
  8459 .PD
       
  8460 Select whether to generate code to be assembled by the vendor-supplied
       
  8461 assembler (\fB\-malpha\-as\fR) or by the \s-1GNU\s0 assembler \fB\-mgas\fR.
       
  8462 .IP "\fB\-mbwx\fR" 4
       
  8463 .IX Item "-mbwx"
       
  8464 .PD 0
       
  8465 .IP "\fB\-mno\-bwx\fR" 4
       
  8466 .IX Item "-mno-bwx"
       
  8467 .IP "\fB\-mcix\fR" 4
       
  8468 .IX Item "-mcix"
       
  8469 .IP "\fB\-mno\-cix\fR" 4
       
  8470 .IX Item "-mno-cix"
       
  8471 .IP "\fB\-mfix\fR" 4
       
  8472 .IX Item "-mfix"
       
  8473 .IP "\fB\-mno\-fix\fR" 4
       
  8474 .IX Item "-mno-fix"
       
  8475 .IP "\fB\-mmax\fR" 4
       
  8476 .IX Item "-mmax"
       
  8477 .IP "\fB\-mno\-max\fR" 4
       
  8478 .IX Item "-mno-max"
       
  8479 .PD
       
  8480 Indicate whether \s-1GCC\s0 should generate code to use the optional \s-1BWX\s0,
       
  8481 \&\s-1CIX\s0, \s-1FIX\s0 and \s-1MAX\s0 instruction sets.  The default is to use the instruction
       
  8482 sets supported by the \s-1CPU\s0 type specified via \fB\-mcpu=\fR option or that
       
  8483 of the \s-1CPU\s0 on which \s-1GCC\s0 was built if none was specified.
       
  8484 .IP "\fB\-mfloat\-vax\fR" 4
       
  8485 .IX Item "-mfloat-vax"
       
  8486 .PD 0
       
  8487 .IP "\fB\-mfloat\-ieee\fR" 4
       
  8488 .IX Item "-mfloat-ieee"
       
  8489 .PD
       
  8490 Generate code that uses (does not use) \s-1VAX\s0 F and G floating point
       
  8491 arithmetic instead of \s-1IEEE\s0 single and double precision.
       
  8492 .IP "\fB\-mexplicit\-relocs\fR" 4
       
  8493 .IX Item "-mexplicit-relocs"
       
  8494 .PD 0
       
  8495 .IP "\fB\-mno\-explicit\-relocs\fR" 4
       
  8496 .IX Item "-mno-explicit-relocs"
       
  8497 .PD
       
  8498 Older Alpha assemblers provided no way to generate symbol relocations
       
  8499 except via assembler macros.  Use of these macros does not allow
       
  8500 optimal instruction scheduling.  \s-1GNU\s0 binutils as of version 2.12
       
  8501 supports a new syntax that allows the compiler to explicitly mark
       
  8502 which relocations should apply to which instructions.  This option
       
  8503 is mostly useful for debugging, as \s-1GCC\s0 detects the capabilities of
       
  8504 the assembler when it is built and sets the default accordingly.
       
  8505 .IP "\fB\-msmall\-data\fR" 4
       
  8506 .IX Item "-msmall-data"
       
  8507 .PD 0
       
  8508 .IP "\fB\-mlarge\-data\fR" 4
       
  8509 .IX Item "-mlarge-data"
       
  8510 .PD
       
  8511 When \fB\-mexplicit\-relocs\fR is in effect, static data is
       
  8512 accessed via \fIgp-relative\fR relocations.  When \fB\-msmall\-data\fR
       
  8513 is used, objects 8 bytes long or smaller are placed in a \fIsmall data area\fR
       
  8514 (the \f(CW\*(C`.sdata\*(C'\fR and \f(CW\*(C`.sbss\*(C'\fR sections) and are accessed via
       
  8515 16\-bit relocations off of the \f(CW$gp\fR register.  This limits the
       
  8516 size of the small data area to 64KB, but allows the variables to be
       
  8517 directly accessed via a single instruction.
       
  8518 .Sp
       
  8519 The default is \fB\-mlarge\-data\fR.  With this option the data area
       
  8520 is limited to just below 2GB.  Programs that require more than 2GB of
       
  8521 data must use \f(CW\*(C`malloc\*(C'\fR or \f(CW\*(C`mmap\*(C'\fR to allocate the data in the
       
  8522 heap instead of in the program's data segment.
       
  8523 .Sp
       
  8524 When generating code for shared libraries, \fB\-fpic\fR implies
       
  8525 \&\fB\-msmall\-data\fR and \fB\-fPIC\fR implies \fB\-mlarge\-data\fR.
       
  8526 .IP "\fB\-msmall\-text\fR" 4
       
  8527 .IX Item "-msmall-text"
       
  8528 .PD 0
       
  8529 .IP "\fB\-mlarge\-text\fR" 4
       
  8530 .IX Item "-mlarge-text"
       
  8531 .PD
       
  8532 When \fB\-msmall\-text\fR is used, the compiler assumes that the
       
  8533 code of the entire program (or shared library) fits in 4MB, and is
       
  8534 thus reachable with a branch instruction.  When \fB\-msmall\-data\fR
       
  8535 is used, the compiler can assume that all local symbols share the
       
  8536 same \f(CW$gp\fR value, and thus reduce the number of instructions
       
  8537 required for a function call from 4 to 1.
       
  8538 .Sp
       
  8539 The default is \fB\-mlarge\-text\fR.
       
  8540 .IP "\fB\-mcpu=\fR\fIcpu_type\fR" 4
       
  8541 .IX Item "-mcpu=cpu_type"
       
  8542 Set the instruction set and instruction scheduling parameters for
       
  8543 machine type \fIcpu_type\fR.  You can specify either the \fB\s-1EV\s0\fR
       
  8544 style name or the corresponding chip number.  \s-1GCC\s0 supports scheduling
       
  8545 parameters for the \s-1EV4\s0, \s-1EV5\s0 and \s-1EV6\s0 family of processors and will
       
  8546 choose the default values for the instruction set from the processor
       
  8547 you specify.  If you do not specify a processor type, \s-1GCC\s0 will default
       
  8548 to the processor on which the compiler was built.
       
  8549 .Sp
       
  8550 Supported values for \fIcpu_type\fR are
       
  8551 .RS 4
       
  8552 .IP "\fBev4\fR" 4
       
  8553 .IX Item "ev4"
       
  8554 .PD 0
       
  8555 .IP "\fBev45\fR" 4
       
  8556 .IX Item "ev45"
       
  8557 .IP "\fB21064\fR" 4
       
  8558 .IX Item "21064"
       
  8559 .PD
       
  8560 Schedules as an \s-1EV4\s0 and has no instruction set extensions.
       
  8561 .IP "\fBev5\fR" 4
       
  8562 .IX Item "ev5"
       
  8563 .PD 0
       
  8564 .IP "\fB21164\fR" 4
       
  8565 .IX Item "21164"
       
  8566 .PD
       
  8567 Schedules as an \s-1EV5\s0 and has no instruction set extensions.
       
  8568 .IP "\fBev56\fR" 4
       
  8569 .IX Item "ev56"
       
  8570 .PD 0
       
  8571 .IP "\fB21164a\fR" 4
       
  8572 .IX Item "21164a"
       
  8573 .PD
       
  8574 Schedules as an \s-1EV5\s0 and supports the \s-1BWX\s0 extension.
       
  8575 .IP "\fBpca56\fR" 4
       
  8576 .IX Item "pca56"
       
  8577 .PD 0
       
  8578 .IP "\fB21164pc\fR" 4
       
  8579 .IX Item "21164pc"
       
  8580 .IP "\fB21164PC\fR" 4
       
  8581 .IX Item "21164PC"
       
  8582 .PD
       
  8583 Schedules as an \s-1EV5\s0 and supports the \s-1BWX\s0 and \s-1MAX\s0 extensions.
       
  8584 .IP "\fBev6\fR" 4
       
  8585 .IX Item "ev6"
       
  8586 .PD 0
       
  8587 .IP "\fB21264\fR" 4
       
  8588 .IX Item "21264"
       
  8589 .PD
       
  8590 Schedules as an \s-1EV6\s0 and supports the \s-1BWX\s0, \s-1FIX\s0, and \s-1MAX\s0 extensions.
       
  8591 .IP "\fBev67\fR" 4
       
  8592 .IX Item "ev67"
       
  8593 .PD 0
       
  8594 .IP "\fB21264a\fR" 4
       
  8595 .IX Item "21264a"
       
  8596 .PD
       
  8597 Schedules as an \s-1EV6\s0 and supports the \s-1BWX\s0, \s-1CIX\s0, \s-1FIX\s0, and \s-1MAX\s0 extensions.
       
  8598 .RE
       
  8599 .RS 4
       
  8600 .RE
       
  8601 .IP "\fB\-mtune=\fR\fIcpu_type\fR" 4
       
  8602 .IX Item "-mtune=cpu_type"
       
  8603 Set only the instruction scheduling parameters for machine type
       
  8604 \&\fIcpu_type\fR.  The instruction set is not changed.
       
  8605 .IP "\fB\-mmemory\-latency=\fR\fItime\fR" 4
       
  8606 .IX Item "-mmemory-latency=time"
       
  8607 Sets the latency the scheduler should assume for typical memory
       
  8608 references as seen by the application.  This number is highly
       
  8609 dependent on the memory access patterns used by the application
       
  8610 and the size of the external cache on the machine.
       
  8611 .Sp
       
  8612 Valid options for \fItime\fR are
       
  8613 .RS 4
       
  8614 .IP "\fInumber\fR" 4
       
  8615 .IX Item "number"
       
  8616 A decimal number representing clock cycles.
       
  8617 .IP "\fBL1\fR" 4
       
  8618 .IX Item "L1"
       
  8619 .PD 0
       
  8620 .IP "\fBL2\fR" 4
       
  8621 .IX Item "L2"
       
  8622 .IP "\fBL3\fR" 4
       
  8623 .IX Item "L3"
       
  8624 .IP "\fBmain\fR" 4
       
  8625 .IX Item "main"
       
  8626 .PD
       
  8627 The compiler contains estimates of the number of clock cycles for
       
  8628 ``typical'' \s-1EV4\s0 & \s-1EV5\s0 hardware for the Level 1, 2 & 3 caches
       
  8629 (also called Dcache, Scache, and Bcache), as well as to main memory.
       
  8630 Note that L3 is only valid for \s-1EV5\s0.
       
  8631 .RE
       
  8632 .RS 4
       
  8633 .RE
       
  8634 .PP
       
  8635 \fI\s-1DEC\s0 Alpha/VMS Options\fR
       
  8636 .IX Subsection "DEC Alpha/VMS Options"
       
  8637 .PP
       
  8638 These \fB\-m\fR options are defined for the \s-1DEC\s0 Alpha/VMS implementations:
       
  8639 .IP "\fB\-mvms\-return\-codes\fR" 4
       
  8640 .IX Item "-mvms-return-codes"
       
  8641 Return \s-1VMS\s0 condition codes from main.  The default is to return \s-1POSIX\s0
       
  8642 style condition (e.g. error) codes.
       
  8643 .PP
       
  8644 \fIH8/300 Options\fR
       
  8645 .IX Subsection "H8/300 Options"
       
  8646 .PP
       
  8647 These \fB\-m\fR options are defined for the H8/300 implementations:
       
  8648 .IP "\fB\-mrelax\fR" 4
       
  8649 .IX Item "-mrelax"
       
  8650 Shorten some address references at link time, when possible; uses the
       
  8651 linker option \fB\-relax\fR.  
       
  8652 .IP "\fB\-mh\fR" 4
       
  8653 .IX Item "-mh"
       
  8654 Generate code for the H8/300H.
       
  8655 .IP "\fB\-ms\fR" 4
       
  8656 .IX Item "-ms"
       
  8657 Generate code for the H8S.
       
  8658 .IP "\fB\-mn\fR" 4
       
  8659 .IX Item "-mn"
       
  8660 Generate code for the H8S and H8/300H in the normal mode.  This switch
       
  8661 must be used either with \-mh or \-ms.
       
  8662 .IP "\fB\-ms2600\fR" 4
       
  8663 .IX Item "-ms2600"
       
  8664 Generate code for the H8S/2600.  This switch must be used with \fB\-ms\fR.
       
  8665 .IP "\fB\-mint32\fR" 4
       
  8666 .IX Item "-mint32"
       
  8667 Make \f(CW\*(C`int\*(C'\fR data 32 bits by default.
       
  8668 .IP "\fB\-malign\-300\fR" 4
       
  8669 .IX Item "-malign-300"
       
  8670 On the H8/300H and H8S, use the same alignment rules as for the H8/300.
       
  8671 The default for the H8/300H and H8S is to align longs and floats on 4
       
  8672 byte boundaries.
       
  8673 \&\fB\-malign\-300\fR causes them to be aligned on 2 byte boundaries.
       
  8674 This option has no effect on the H8/300.
       
  8675 .PP
       
  8676 \fI\s-1SH\s0 Options\fR
       
  8677 .IX Subsection "SH Options"
       
  8678 .PP
       
  8679 These \fB\-m\fR options are defined for the \s-1SH\s0 implementations:
       
  8680 .IP "\fB\-m1\fR" 4
       
  8681 .IX Item "-m1"
       
  8682 Generate code for the \s-1SH1\s0.
       
  8683 .IP "\fB\-m2\fR" 4
       
  8684 .IX Item "-m2"
       
  8685 Generate code for the \s-1SH2\s0.
       
  8686 .IP "\fB\-m2e\fR" 4
       
  8687 .IX Item "-m2e"
       
  8688 Generate code for the SH2e.
       
  8689 .IP "\fB\-m3\fR" 4
       
  8690 .IX Item "-m3"
       
  8691 Generate code for the \s-1SH3\s0.
       
  8692 .IP "\fB\-m3e\fR" 4
       
  8693 .IX Item "-m3e"
       
  8694 Generate code for the SH3e.
       
  8695 .IP "\fB\-m4\-nofpu\fR" 4
       
  8696 .IX Item "-m4-nofpu"
       
  8697 Generate code for the \s-1SH4\s0 without a floating-point unit.
       
  8698 .IP "\fB\-m4\-single\-only\fR" 4
       
  8699 .IX Item "-m4-single-only"
       
  8700 Generate code for the \s-1SH4\s0 with a floating-point unit that only
       
  8701 supports single-precision arithmetic.
       
  8702 .IP "\fB\-m4\-single\fR" 4
       
  8703 .IX Item "-m4-single"
       
  8704 Generate code for the \s-1SH4\s0 assuming the floating-point unit is in
       
  8705 single-precision mode by default.
       
  8706 .IP "\fB\-m4\fR" 4
       
  8707 .IX Item "-m4"
       
  8708 Generate code for the \s-1SH4\s0.
       
  8709 .IP "\fB\-mb\fR" 4
       
  8710 .IX Item "-mb"
       
  8711 Compile code for the processor in big endian mode.
       
  8712 .IP "\fB\-ml\fR" 4
       
  8713 .IX Item "-ml"
       
  8714 Compile code for the processor in little endian mode.
       
  8715 .IP "\fB\-mdalign\fR" 4
       
  8716 .IX Item "-mdalign"
       
  8717 Align doubles at 64\-bit boundaries.  Note that this changes the calling
       
  8718 conventions, and thus some functions from the standard C library will
       
  8719 not work unless you recompile it first with \fB\-mdalign\fR.
       
  8720 .IP "\fB\-mrelax\fR" 4
       
  8721 .IX Item "-mrelax"
       
  8722 Shorten some address references at link time, when possible; uses the
       
  8723 linker option \fB\-relax\fR.
       
  8724 .IP "\fB\-mbigtable\fR" 4
       
  8725 .IX Item "-mbigtable"
       
  8726 Use 32\-bit offsets in \f(CW\*(C`switch\*(C'\fR tables.  The default is to use
       
  8727 16\-bit offsets.
       
  8728 .IP "\fB\-mfmovd\fR" 4
       
  8729 .IX Item "-mfmovd"
       
  8730 Enable the use of the instruction \f(CW\*(C`fmovd\*(C'\fR.
       
  8731 .IP "\fB\-mhitachi\fR" 4
       
  8732 .IX Item "-mhitachi"
       
  8733 Comply with the calling conventions defined by Renesas.
       
  8734 .IP "\fB\-mnomacsave\fR" 4
       
  8735 .IX Item "-mnomacsave"
       
  8736 Mark the \f(CW\*(C`MAC\*(C'\fR register as call\-clobbered, even if
       
  8737 \&\fB\-mhitachi\fR is given.
       
  8738 .IP "\fB\-mieee\fR" 4
       
  8739 .IX Item "-mieee"
       
  8740 Increase IEEE-compliance of floating-point code.
       
  8741 .IP "\fB\-misize\fR" 4
       
  8742 .IX Item "-misize"
       
  8743 Dump instruction size and location in the assembly code.
       
  8744 .IP "\fB\-mpadstruct\fR" 4
       
  8745 .IX Item "-mpadstruct"
       
  8746 This option is deprecated.  It pads structures to multiple of 4 bytes,
       
  8747 which is incompatible with the \s-1SH\s0 \s-1ABI\s0.
       
  8748 .IP "\fB\-mspace\fR" 4
       
  8749 .IX Item "-mspace"
       
  8750 Optimize for space instead of speed.  Implied by \fB\-Os\fR.
       
  8751 .IP "\fB\-mprefergot\fR" 4
       
  8752 .IX Item "-mprefergot"
       
  8753 When generating position-independent code, emit function calls using
       
  8754 the Global Offset Table instead of the Procedure Linkage Table.
       
  8755 .IP "\fB\-musermode\fR" 4
       
  8756 .IX Item "-musermode"
       
  8757 Generate a library function call to invalidate instruction cache
       
  8758 entries, after fixing up a trampoline.  This library function call
       
  8759 doesn't assume it can write to the whole memory address space.  This
       
  8760 is the default when the target is \f(CW\*(C`sh\-*\-linux*\*(C'\fR.
       
  8761 .PP
       
  8762 \fIOptions for System V\fR
       
  8763 .IX Subsection "Options for System V"
       
  8764 .PP
       
  8765 These additional options are available on System V Release 4 for
       
  8766 compatibility with other compilers on those systems:
       
  8767 .IP "\fB\-G\fR" 4
       
  8768 .IX Item "-G"
       
  8769 Create a shared object.
       
  8770 It is recommended that \fB\-symbolic\fR or \fB\-shared\fR be used instead.
       
  8771 .IP "\fB\-Qy\fR" 4
       
  8772 .IX Item "-Qy"
       
  8773 Identify the versions of each tool used by the compiler, in a
       
  8774 \&\f(CW\*(C`.ident\*(C'\fR assembler directive in the output.
       
  8775 .IP "\fB\-Qn\fR" 4
       
  8776 .IX Item "-Qn"
       
  8777 Refrain from adding \f(CW\*(C`.ident\*(C'\fR directives to the output file (this is
       
  8778 the default).
       
  8779 .IP "\fB\-YP,\fR\fIdirs\fR" 4
       
  8780 .IX Item "-YP,dirs"
       
  8781 Search the directories \fIdirs\fR, and no others, for libraries
       
  8782 specified with \fB\-l\fR.
       
  8783 .IP "\fB\-Ym,\fR\fIdir\fR" 4
       
  8784 .IX Item "-Ym,dir"
       
  8785 Look in the directory \fIdir\fR to find the M4 preprocessor.
       
  8786 The assembler uses this option.
       
  8787 .PP
       
  8788 \fITMS320C3x/C4x Options\fR
       
  8789 .IX Subsection "TMS320C3x/C4x Options"
       
  8790 .PP
       
  8791 These \fB\-m\fR options are defined for TMS320C3x/C4x implementations:
       
  8792 .IP "\fB\-mcpu=\fR\fIcpu_type\fR" 4
       
  8793 .IX Item "-mcpu=cpu_type"
       
  8794 Set the instruction set, register set, and instruction scheduling
       
  8795 parameters for machine type \fIcpu_type\fR.  Supported values for
       
  8796 \&\fIcpu_type\fR are \fBc30\fR, \fBc31\fR, \fBc32\fR, \fBc40\fR, and
       
  8797 \&\fBc44\fR.  The default is \fBc40\fR to generate code for the
       
  8798 \&\s-1TMS320C40\s0.
       
  8799 .IP "\fB\-mbig\-memory\fR" 4
       
  8800 .IX Item "-mbig-memory"
       
  8801 .PD 0
       
  8802 .IP "\fB\-mbig\fR" 4
       
  8803 .IX Item "-mbig"
       
  8804 .IP "\fB\-msmall\-memory\fR" 4
       
  8805 .IX Item "-msmall-memory"
       
  8806 .IP "\fB\-msmall\fR" 4
       
  8807 .IX Item "-msmall"
       
  8808 .PD
       
  8809 Generates code for the big or small memory model.  The small memory
       
  8810 model assumed that all data fits into one 64K word page.  At run-time
       
  8811 the data page (\s-1DP\s0) register must be set to point to the 64K page
       
  8812 containing the .bss and .data program sections.  The big memory model is
       
  8813 the default and requires reloading of the \s-1DP\s0 register for every direct
       
  8814 memory access.
       
  8815 .IP "\fB\-mbk\fR" 4
       
  8816 .IX Item "-mbk"
       
  8817 .PD 0
       
  8818 .IP "\fB\-mno\-bk\fR" 4
       
  8819 .IX Item "-mno-bk"
       
  8820 .PD
       
  8821 Allow (disallow) allocation of general integer operands into the block
       
  8822 count register \s-1BK\s0.
       
  8823 .IP "\fB\-mdb\fR" 4
       
  8824 .IX Item "-mdb"
       
  8825 .PD 0
       
  8826 .IP "\fB\-mno\-db\fR" 4
       
  8827 .IX Item "-mno-db"
       
  8828 .PD
       
  8829 Enable (disable) generation of code using decrement and branch,
       
  8830 DBcond(D), instructions.  This is enabled by default for the C4x.  To be
       
  8831 on the safe side, this is disabled for the C3x, since the maximum
       
  8832 iteration count on the C3x is 2^{23 + 1} (but who iterates loops more than
       
  8833 2^{23} times on the C3x?).  Note that \s-1GCC\s0 will try to reverse a loop so
       
  8834 that it can utilize the decrement and branch instruction, but will give
       
  8835 up if there is more than one memory reference in the loop.  Thus a loop
       
  8836 where the loop counter is decremented can generate slightly more
       
  8837 efficient code, in cases where the \s-1RPTB\s0 instruction cannot be utilized.
       
  8838 .IP "\fB\-mdp\-isr\-reload\fR" 4
       
  8839 .IX Item "-mdp-isr-reload"
       
  8840 .PD 0
       
  8841 .IP "\fB\-mparanoid\fR" 4
       
  8842 .IX Item "-mparanoid"
       
  8843 .PD
       
  8844 Force the \s-1DP\s0 register to be saved on entry to an interrupt service
       
  8845 routine (\s-1ISR\s0), reloaded to point to the data section, and restored on
       
  8846 exit from the \s-1ISR\s0.  This should not be required unless someone has
       
  8847 violated the small memory model by modifying the \s-1DP\s0 register, say within
       
  8848 an object library.
       
  8849 .IP "\fB\-mmpyi\fR" 4
       
  8850 .IX Item "-mmpyi"
       
  8851 .PD 0
       
  8852 .IP "\fB\-mno\-mpyi\fR" 4
       
  8853 .IX Item "-mno-mpyi"
       
  8854 .PD
       
  8855 For the C3x use the 24\-bit \s-1MPYI\s0 instruction for integer multiplies
       
  8856 instead of a library call to guarantee 32\-bit results.  Note that if one
       
  8857 of the operands is a constant, then the multiplication will be performed
       
  8858 using shifts and adds.  If the \fB\-mmpyi\fR option is not specified for the C3x,
       
  8859 then squaring operations are performed inline instead of a library call.
       
  8860 .IP "\fB\-mfast\-fix\fR" 4
       
  8861 .IX Item "-mfast-fix"
       
  8862 .PD 0
       
  8863 .IP "\fB\-mno\-fast\-fix\fR" 4
       
  8864 .IX Item "-mno-fast-fix"
       
  8865 .PD
       
  8866 The C3x/C4x \s-1FIX\s0 instruction to convert a floating point value to an
       
  8867 integer value chooses the nearest integer less than or equal to the
       
  8868 floating point value rather than to the nearest integer.  Thus if the
       
  8869 floating point number is negative, the result will be incorrectly
       
  8870 truncated an additional code is necessary to detect and correct this
       
  8871 case.  This option can be used to disable generation of the additional
       
  8872 code required to correct the result.
       
  8873 .IP "\fB\-mrptb\fR" 4
       
  8874 .IX Item "-mrptb"
       
  8875 .PD 0
       
  8876 .IP "\fB\-mno\-rptb\fR" 4
       
  8877 .IX Item "-mno-rptb"
       
  8878 .PD
       
  8879 Enable (disable) generation of repeat block sequences using the \s-1RPTB\s0
       
  8880 instruction for zero overhead looping.  The \s-1RPTB\s0 construct is only used
       
  8881 for innermost loops that do not call functions or jump across the loop
       
  8882 boundaries.  There is no advantage having nested \s-1RPTB\s0 loops due to the
       
  8883 overhead required to save and restore the \s-1RC\s0, \s-1RS\s0, and \s-1RE\s0 registers.
       
  8884 This is enabled by default with \fB\-O2\fR.
       
  8885 .IP "\fB\-mrpts=\fR\fIcount\fR" 4
       
  8886 .IX Item "-mrpts=count"
       
  8887 .PD 0
       
  8888 .IP "\fB\-mno\-rpts\fR" 4
       
  8889 .IX Item "-mno-rpts"
       
  8890 .PD
       
  8891 Enable (disable) the use of the single instruction repeat instruction
       
  8892 \&\s-1RPTS\s0.  If a repeat block contains a single instruction, and the loop
       
  8893 count can be guaranteed to be less than the value \fIcount\fR, \s-1GCC\s0 will
       
  8894 emit a \s-1RPTS\s0 instruction instead of a \s-1RPTB\s0.  If no value is specified,
       
  8895 then a \s-1RPTS\s0 will be emitted even if the loop count cannot be determined
       
  8896 at compile time.  Note that the repeated instruction following \s-1RPTS\s0 does
       
  8897 not have to be reloaded from memory each iteration, thus freeing up the
       
  8898 \&\s-1CPU\s0 buses for operands.  However, since interrupts are blocked by this
       
  8899 instruction, it is disabled by default.
       
  8900 .IP "\fB\-mloop\-unsigned\fR" 4
       
  8901 .IX Item "-mloop-unsigned"
       
  8902 .PD 0
       
  8903 .IP "\fB\-mno\-loop\-unsigned\fR" 4
       
  8904 .IX Item "-mno-loop-unsigned"
       
  8905 .PD
       
  8906 The maximum iteration count when using \s-1RPTS\s0 and \s-1RPTB\s0 (and \s-1DB\s0 on the C40)
       
  8907 is 2^{31 + 1} since these instructions test if the iteration count is
       
  8908 negative to terminate the loop.  If the iteration count is unsigned
       
  8909 there is a possibility than the 2^{31 + 1} maximum iteration count may be
       
  8910 exceeded.  This switch allows an unsigned iteration count.
       
  8911 .IP "\fB\-mti\fR" 4
       
  8912 .IX Item "-mti"
       
  8913 Try to emit an assembler syntax that the \s-1TI\s0 assembler (asm30) is happy
       
  8914 with.  This also enforces compatibility with the \s-1API\s0 employed by the \s-1TI\s0
       
  8915 C3x C compiler.  For example, long doubles are passed as structures
       
  8916 rather than in floating point registers.
       
  8917 .IP "\fB\-mregparm\fR" 4
       
  8918 .IX Item "-mregparm"
       
  8919 .PD 0
       
  8920 .IP "\fB\-mmemparm\fR" 4
       
  8921 .IX Item "-mmemparm"
       
  8922 .PD
       
  8923 Generate code that uses registers (stack) for passing arguments to functions.
       
  8924 By default, arguments are passed in registers where possible rather
       
  8925 than by pushing arguments on to the stack.
       
  8926 .IP "\fB\-mparallel\-insns\fR" 4
       
  8927 .IX Item "-mparallel-insns"
       
  8928 .PD 0
       
  8929 .IP "\fB\-mno\-parallel\-insns\fR" 4
       
  8930 .IX Item "-mno-parallel-insns"
       
  8931 .PD
       
  8932 Allow the generation of parallel instructions.  This is enabled by
       
  8933 default with \fB\-O2\fR.
       
  8934 .IP "\fB\-mparallel\-mpy\fR" 4
       
  8935 .IX Item "-mparallel-mpy"
       
  8936 .PD 0
       
  8937 .IP "\fB\-mno\-parallel\-mpy\fR" 4
       
  8938 .IX Item "-mno-parallel-mpy"
       
  8939 .PD
       
  8940 Allow the generation of MPY||ADD and MPY||SUB parallel instructions,
       
  8941 provided \fB\-mparallel\-insns\fR is also specified.  These instructions have
       
  8942 tight register constraints which can pessimize the code generation
       
  8943 of large functions.
       
  8944 .PP
       
  8945 \fIV850 Options\fR
       
  8946 .IX Subsection "V850 Options"
       
  8947 .PP
       
  8948 These \fB\-m\fR options are defined for V850 implementations:
       
  8949 .IP "\fB\-mlong\-calls\fR" 4
       
  8950 .IX Item "-mlong-calls"
       
  8951 .PD 0
       
  8952 .IP "\fB\-mno\-long\-calls\fR" 4
       
  8953 .IX Item "-mno-long-calls"
       
  8954 .PD
       
  8955 Treat all calls as being far away (near).  If calls are assumed to be
       
  8956 far away, the compiler will always load the functions address up into a
       
  8957 register, and call indirect through the pointer.
       
  8958 .IP "\fB\-mno\-ep\fR" 4
       
  8959 .IX Item "-mno-ep"
       
  8960 .PD 0
       
  8961 .IP "\fB\-mep\fR" 4
       
  8962 .IX Item "-mep"
       
  8963 .PD
       
  8964 Do not optimize (do optimize) basic blocks that use the same index
       
  8965 pointer 4 or more times to copy pointer into the \f(CW\*(C`ep\*(C'\fR register, and
       
  8966 use the shorter \f(CW\*(C`sld\*(C'\fR and \f(CW\*(C`sst\*(C'\fR instructions.  The \fB\-mep\fR
       
  8967 option is on by default if you optimize.
       
  8968 .IP "\fB\-mno\-prolog\-function\fR" 4
       
  8969 .IX Item "-mno-prolog-function"
       
  8970 .PD 0
       
  8971 .IP "\fB\-mprolog\-function\fR" 4
       
  8972 .IX Item "-mprolog-function"
       
  8973 .PD
       
  8974 Do not use (do use) external functions to save and restore registers
       
  8975 at the prologue and epilogue of a function.  The external functions
       
  8976 are slower, but use less code space if more than one function saves
       
  8977 the same number of registers.  The \fB\-mprolog\-function\fR option
       
  8978 is on by default if you optimize.
       
  8979 .IP "\fB\-mspace\fR" 4
       
  8980 .IX Item "-mspace"
       
  8981 Try to make the code as small as possible.  At present, this just turns
       
  8982 on the \fB\-mep\fR and \fB\-mprolog\-function\fR options.
       
  8983 .IP "\fB\-mtda=\fR\fIn\fR" 4
       
  8984 .IX Item "-mtda=n"
       
  8985 Put static or global variables whose size is \fIn\fR bytes or less into
       
  8986 the tiny data area that register \f(CW\*(C`ep\*(C'\fR points to.  The tiny data
       
  8987 area can hold up to 256 bytes in total (128 bytes for byte references).
       
  8988 .IP "\fB\-msda=\fR\fIn\fR" 4
       
  8989 .IX Item "-msda=n"
       
  8990 Put static or global variables whose size is \fIn\fR bytes or less into
       
  8991 the small data area that register \f(CW\*(C`gp\*(C'\fR points to.  The small data
       
  8992 area can hold up to 64 kilobytes.
       
  8993 .IP "\fB\-mzda=\fR\fIn\fR" 4
       
  8994 .IX Item "-mzda=n"
       
  8995 Put static or global variables whose size is \fIn\fR bytes or less into
       
  8996 the first 32 kilobytes of memory.
       
  8997 .IP "\fB\-mv850\fR" 4
       
  8998 .IX Item "-mv850"
       
  8999 Specify that the target processor is the V850.
       
  9000 .IP "\fB\-mbig\-switch\fR" 4
       
  9001 .IX Item "-mbig-switch"
       
  9002 Generate code suitable for big switch tables.  Use this option only if
       
  9003 the assembler/linker complain about out of range branches within a switch
       
  9004 table.
       
  9005 .IP "\fB\-mapp\-regs\fR" 4
       
  9006 .IX Item "-mapp-regs"
       
  9007 This option will cause r2 and r5 to be used in the code generated by
       
  9008 the compiler.  This setting is the default.
       
  9009 .IP "\fB\-mno\-app\-regs\fR" 4
       
  9010 .IX Item "-mno-app-regs"
       
  9011 This option will cause r2 and r5 to be treated as fixed registers.
       
  9012 .IP "\fB\-mv850e1\fR" 4
       
  9013 .IX Item "-mv850e1"
       
  9014 Specify that the target processor is the V850E1.  The preprocessor
       
  9015 constants \fB_\|_v850e1_\|_\fR and \fB_\|_v850e_\|_\fR will be defined if
       
  9016 this option is used.
       
  9017 .IP "\fB\-mv850e\fR" 4
       
  9018 .IX Item "-mv850e"
       
  9019 Specify that the target processor is the V850E.  The preprocessor
       
  9020 constant \fB_\|_v850e_\|_\fR will be defined if this option is used.
       
  9021 .Sp
       
  9022 If neither \fB\-mv850\fR nor \fB\-mv850e\fR nor \fB\-mv850e1\fR
       
  9023 are defined then a default target processor will be chosen and the
       
  9024 relevant \fB_\|_v850*_\|_\fR preprocessor constant will be defined.
       
  9025 .Sp
       
  9026 The preprocessor constants \fB_\|_v850\fR and \fB_\|_v851_\|_\fR are always
       
  9027 defined, regardless of which processor variant is the target.
       
  9028 .IP "\fB\-mdisable\-callt\fR" 4
       
  9029 .IX Item "-mdisable-callt"
       
  9030 This option will suppress generation of the \s-1CALLT\s0 instruction for the
       
  9031 v850e and v850e1 flavors of the v850 architecture.  The default is
       
  9032 \&\fB\-mno\-disable\-callt\fR which allows the \s-1CALLT\s0 instruction to be used.
       
  9033 .PP
       
  9034 \fI\s-1ARC\s0 Options\fR
       
  9035 .IX Subsection "ARC Options"
       
  9036 .PP
       
  9037 These options are defined for \s-1ARC\s0 implementations:
       
  9038 .IP "\fB\-EL\fR" 4
       
  9039 .IX Item "-EL"
       
  9040 Compile code for little endian mode.  This is the default.
       
  9041 .IP "\fB\-EB\fR" 4
       
  9042 .IX Item "-EB"
       
  9043 Compile code for big endian mode.
       
  9044 .IP "\fB\-mmangle\-cpu\fR" 4
       
  9045 .IX Item "-mmangle-cpu"
       
  9046 Prepend the name of the cpu to all public symbol names.
       
  9047 In multiple-processor systems, there are many \s-1ARC\s0 variants with different
       
  9048 instruction and register set characteristics.  This flag prevents code
       
  9049 compiled for one cpu to be linked with code compiled for another.
       
  9050 No facility exists for handling variants that are ``almost identical''.
       
  9051 This is an all or nothing option.
       
  9052 .IP "\fB\-mcpu=\fR\fIcpu\fR" 4
       
  9053 .IX Item "-mcpu=cpu"
       
  9054 Compile code for \s-1ARC\s0 variant \fIcpu\fR.
       
  9055 Which variants are supported depend on the configuration.
       
  9056 All variants support \fB\-mcpu=base\fR, this is the default.
       
  9057 .IP "\fB\-mtext=\fR\fItext-section\fR" 4
       
  9058 .IX Item "-mtext=text-section"
       
  9059 .PD 0
       
  9060 .IP "\fB\-mdata=\fR\fIdata-section\fR" 4
       
  9061 .IX Item "-mdata=data-section"
       
  9062 .IP "\fB\-mrodata=\fR\fIreadonly-data-section\fR" 4
       
  9063 .IX Item "-mrodata=readonly-data-section"
       
  9064 .PD
       
  9065 Put functions, data, and readonly data in \fItext-section\fR,
       
  9066 \&\fIdata-section\fR, and \fIreadonly-data-section\fR respectively
       
  9067 by default.  This can be overridden with the \f(CW\*(C`section\*(C'\fR attribute.
       
  9068 .PP
       
  9069 \fI\s-1NS32K\s0 Options\fR
       
  9070 .IX Subsection "NS32K Options"
       
  9071 .PP
       
  9072 These are the \fB\-m\fR options defined for the 32000 series.  The default
       
  9073 values for these options depends on which style of 32000 was selected when
       
  9074 the compiler was configured; the defaults for the most common choices are
       
  9075 given below.
       
  9076 .IP "\fB\-m32032\fR" 4
       
  9077 .IX Item "-m32032"
       
  9078 .PD 0
       
  9079 .IP "\fB\-m32032\fR" 4
       
  9080 .IX Item "-m32032"
       
  9081 .PD
       
  9082 Generate output for a 32032.  This is the default
       
  9083 when the compiler is configured for 32032 and 32016 based systems.
       
  9084 .IP "\fB\-m32332\fR" 4
       
  9085 .IX Item "-m32332"
       
  9086 .PD 0
       
  9087 .IP "\fB\-m32332\fR" 4
       
  9088 .IX Item "-m32332"
       
  9089 .PD
       
  9090 Generate output for a 32332.  This is the default
       
  9091 when the compiler is configured for 32332\-based systems.
       
  9092 .IP "\fB\-m32532\fR" 4
       
  9093 .IX Item "-m32532"
       
  9094 .PD 0
       
  9095 .IP "\fB\-m32532\fR" 4
       
  9096 .IX Item "-m32532"
       
  9097 .PD
       
  9098 Generate output for a 32532.  This is the default
       
  9099 when the compiler is configured for 32532\-based systems.
       
  9100 .IP "\fB\-m32081\fR" 4
       
  9101 .IX Item "-m32081"
       
  9102 Generate output containing 32081 instructions for floating point.
       
  9103 This is the default for all systems.
       
  9104 .IP "\fB\-m32381\fR" 4
       
  9105 .IX Item "-m32381"
       
  9106 Generate output containing 32381 instructions for floating point.  This
       
  9107 also implies \fB\-m32081\fR.  The 32381 is only compatible with the 32332
       
  9108 and 32532 cpus.  This is the default for the pc532\-netbsd configuration.
       
  9109 .IP "\fB\-mmulti\-add\fR" 4
       
  9110 .IX Item "-mmulti-add"
       
  9111 Try and generate multiply-add floating point instructions \f(CW\*(C`polyF\*(C'\fR
       
  9112 and \f(CW\*(C`dotF\*(C'\fR.  This option is only available if the \fB\-m32381\fR
       
  9113 option is in effect.  Using these instructions requires changes to
       
  9114 register allocation which generally has a negative impact on
       
  9115 performance.  This option should only be enabled when compiling code
       
  9116 particularly likely to make heavy use of multiply-add instructions.
       
  9117 .IP "\fB\-mnomulti\-add\fR" 4
       
  9118 .IX Item "-mnomulti-add"
       
  9119 Do not try and generate multiply-add floating point instructions
       
  9120 \&\f(CW\*(C`polyF\*(C'\fR and \f(CW\*(C`dotF\*(C'\fR.  This is the default on all platforms.
       
  9121 .IP "\fB\-msoft\-float\fR" 4
       
  9122 .IX Item "-msoft-float"
       
  9123 Generate output containing library calls for floating point.
       
  9124 \&\fBWarning:\fR the requisite libraries may not be available.
       
  9125 .IP "\fB\-mieee\-compare\fR" 4
       
  9126 .IX Item "-mieee-compare"
       
  9127 .PD 0
       
  9128 .IP "\fB\-mno\-ieee\-compare\fR" 4
       
  9129 .IX Item "-mno-ieee-compare"
       
  9130 .PD
       
  9131 Control whether or not the compiler uses \s-1IEEE\s0 floating point
       
  9132 comparisons.  These handle correctly the case where the result of a
       
  9133 comparison is unordered.
       
  9134 \&\fBWarning:\fR the requisite kernel support may not be available.
       
  9135 .IP "\fB\-mnobitfield\fR" 4
       
  9136 .IX Item "-mnobitfield"
       
  9137 Do not use the bit-field instructions.  On some machines it is faster to
       
  9138 use shifting and masking operations.  This is the default for the pc532.
       
  9139 .IP "\fB\-mbitfield\fR" 4
       
  9140 .IX Item "-mbitfield"
       
  9141 Do use the bit-field instructions.  This is the default for all platforms
       
  9142 except the pc532.
       
  9143 .IP "\fB\-mrtd\fR" 4
       
  9144 .IX Item "-mrtd"
       
  9145 Use a different function-calling convention, in which functions
       
  9146 that take a fixed number of arguments return pop their
       
  9147 arguments on return with the \f(CW\*(C`ret\*(C'\fR instruction.
       
  9148 .Sp
       
  9149 This calling convention is incompatible with the one normally
       
  9150 used on Unix, so you cannot use it if you need to call libraries
       
  9151 compiled with the Unix compiler.
       
  9152 .Sp
       
  9153 Also, you must provide function prototypes for all functions that
       
  9154 take variable numbers of arguments (including \f(CW\*(C`printf\*(C'\fR);
       
  9155 otherwise incorrect code will be generated for calls to those
       
  9156 functions.
       
  9157 .Sp
       
  9158 In addition, seriously incorrect code will result if you call a
       
  9159 function with too many arguments.  (Normally, extra arguments are
       
  9160 harmlessly ignored.)
       
  9161 .Sp
       
  9162 This option takes its name from the 680x0 \f(CW\*(C`rtd\*(C'\fR instruction.
       
  9163 .IP "\fB\-mregparam\fR" 4
       
  9164 .IX Item "-mregparam"
       
  9165 Use a different function-calling convention where the first two arguments
       
  9166 are passed in registers.
       
  9167 .Sp
       
  9168 This calling convention is incompatible with the one normally
       
  9169 used on Unix, so you cannot use it if you need to call libraries
       
  9170 compiled with the Unix compiler.
       
  9171 .IP "\fB\-mnoregparam\fR" 4
       
  9172 .IX Item "-mnoregparam"
       
  9173 Do not pass any arguments in registers.  This is the default for all
       
  9174 targets.
       
  9175 .IP "\fB\-msb\fR" 4
       
  9176 .IX Item "-msb"
       
  9177 It is \s-1OK\s0 to use the sb as an index register which is always loaded with
       
  9178 zero.  This is the default for the pc532\-netbsd target.
       
  9179 .IP "\fB\-mnosb\fR" 4
       
  9180 .IX Item "-mnosb"
       
  9181 The sb register is not available for use or has not been initialized to
       
  9182 zero by the run time system.  This is the default for all targets except
       
  9183 the pc532\-netbsd.  It is also implied whenever \fB\-mhimem\fR or
       
  9184 \&\fB\-fpic\fR is set.
       
  9185 .IP "\fB\-mhimem\fR" 4
       
  9186 .IX Item "-mhimem"
       
  9187 Many ns32000 series addressing modes use displacements of up to 512MB.
       
  9188 If an address is above 512MB then displacements from zero can not be used.
       
  9189 This option causes code to be generated which can be loaded above 512MB.
       
  9190 This may be useful for operating systems or \s-1ROM\s0 code.
       
  9191 .IP "\fB\-mnohimem\fR" 4
       
  9192 .IX Item "-mnohimem"
       
  9193 Assume code will be loaded in the first 512MB of virtual address space.
       
  9194 This is the default for all platforms.
       
  9195 .PP
       
  9196 \fI\s-1AVR\s0 Options\fR
       
  9197 .IX Subsection "AVR Options"
       
  9198 .PP
       
  9199 These options are defined for \s-1AVR\s0 implementations:
       
  9200 .IP "\fB\-mmcu=\fR\fImcu\fR" 4
       
  9201 .IX Item "-mmcu=mcu"
       
  9202 Specify \s-1ATMEL\s0 \s-1AVR\s0 instruction set or \s-1MCU\s0 type.
       
  9203 .Sp
       
  9204 Instruction set avr1 is for the minimal \s-1AVR\s0 core, not supported by the C
       
  9205 compiler, only for assembler programs (\s-1MCU\s0 types: at90s1200, attiny10,
       
  9206 attiny11, attiny12, attiny15, attiny28).
       
  9207 .Sp
       
  9208 Instruction set avr2 (default) is for the classic \s-1AVR\s0 core with up to
       
  9209 8K program memory space (\s-1MCU\s0 types: at90s2313, at90s2323, attiny22,
       
  9210 at90s2333, at90s2343, at90s4414, at90s4433, at90s4434, at90s8515,
       
  9211 at90c8534, at90s8535).
       
  9212 .Sp
       
  9213 Instruction set avr3 is for the classic \s-1AVR\s0 core with up to 128K program
       
  9214 memory space (\s-1MCU\s0 types: atmega103, atmega603, at43usb320, at76c711).
       
  9215 .Sp
       
  9216 Instruction set avr4 is for the enhanced \s-1AVR\s0 core with up to 8K program
       
  9217 memory space (\s-1MCU\s0 types: atmega8, atmega83, atmega85).
       
  9218 .Sp
       
  9219 Instruction set avr5 is for the enhanced \s-1AVR\s0 core with up to 128K program
       
  9220 memory space (\s-1MCU\s0 types: atmega16, atmega161, atmega163, atmega32, atmega323,
       
  9221 atmega64, atmega128, at43usb355, at94k).
       
  9222 .IP "\fB\-msize\fR" 4
       
  9223 .IX Item "-msize"
       
  9224 Output instruction sizes to the asm file.
       
  9225 .IP "\fB\-minit\-stack=\fR\fIN\fR" 4
       
  9226 .IX Item "-minit-stack=N"
       
  9227 Specify the initial stack address, which may be a symbol or numeric value,
       
  9228 \&\fB_\|_stack\fR is the default.
       
  9229 .IP "\fB\-mno\-interrupts\fR" 4
       
  9230 .IX Item "-mno-interrupts"
       
  9231 Generated code is not compatible with hardware interrupts.
       
  9232 Code size will be smaller.
       
  9233 .IP "\fB\-mcall\-prologues\fR" 4
       
  9234 .IX Item "-mcall-prologues"
       
  9235 Functions prologues/epilogues expanded as call to appropriate
       
  9236 subroutines.  Code size will be smaller.
       
  9237 .IP "\fB\-mno\-tablejump\fR" 4
       
  9238 .IX Item "-mno-tablejump"
       
  9239 Do not generate tablejump insns which sometimes increase code size.
       
  9240 .IP "\fB\-mtiny\-stack\fR" 4
       
  9241 .IX Item "-mtiny-stack"
       
  9242 Change only the low 8 bits of the stack pointer.
       
  9243 .PP
       
  9244 \fIMCore Options\fR
       
  9245 .IX Subsection "MCore Options"
       
  9246 .PP
       
  9247 These are the \fB\-m\fR options defined for the Motorola M*Core
       
  9248 processors.
       
  9249 .IP "\fB\-mhardlit\fR" 4
       
  9250 .IX Item "-mhardlit"
       
  9251 .PD 0
       
  9252 .IP "\fB\-mno\-hardlit\fR" 4
       
  9253 .IX Item "-mno-hardlit"
       
  9254 .PD
       
  9255 Inline constants into the code stream if it can be done in two
       
  9256 instructions or less.
       
  9257 .IP "\fB\-mdiv\fR" 4
       
  9258 .IX Item "-mdiv"
       
  9259 .PD 0
       
  9260 .IP "\fB\-mno\-div\fR" 4
       
  9261 .IX Item "-mno-div"
       
  9262 .PD
       
  9263 Use the divide instruction.  (Enabled by default).
       
  9264 .IP "\fB\-mrelax\-immediate\fR" 4
       
  9265 .IX Item "-mrelax-immediate"
       
  9266 .PD 0
       
  9267 .IP "\fB\-mno\-relax\-immediate\fR" 4
       
  9268 .IX Item "-mno-relax-immediate"
       
  9269 .PD
       
  9270 Allow arbitrary sized immediates in bit operations.
       
  9271 .IP "\fB\-mwide\-bitfields\fR" 4
       
  9272 .IX Item "-mwide-bitfields"
       
  9273 .PD 0
       
  9274 .IP "\fB\-mno\-wide\-bitfields\fR" 4
       
  9275 .IX Item "-mno-wide-bitfields"
       
  9276 .PD
       
  9277 Always treat bit-fields as int\-sized.
       
  9278 .IP "\fB\-m4byte\-functions\fR" 4
       
  9279 .IX Item "-m4byte-functions"
       
  9280 .PD 0
       
  9281 .IP "\fB\-mno\-4byte\-functions\fR" 4
       
  9282 .IX Item "-mno-4byte-functions"
       
  9283 .PD
       
  9284 Force all functions to be aligned to a four byte boundary.
       
  9285 .IP "\fB\-mcallgraph\-data\fR" 4
       
  9286 .IX Item "-mcallgraph-data"
       
  9287 .PD 0
       
  9288 .IP "\fB\-mno\-callgraph\-data\fR" 4
       
  9289 .IX Item "-mno-callgraph-data"
       
  9290 .PD
       
  9291 Emit callgraph information.
       
  9292 .IP "\fB\-mslow\-bytes\fR" 4
       
  9293 .IX Item "-mslow-bytes"
       
  9294 .PD 0
       
  9295 .IP "\fB\-mno\-slow\-bytes\fR" 4
       
  9296 .IX Item "-mno-slow-bytes"
       
  9297 .PD
       
  9298 Prefer word access when reading byte quantities.
       
  9299 .IP "\fB\-mlittle\-endian\fR" 4
       
  9300 .IX Item "-mlittle-endian"
       
  9301 .PD 0
       
  9302 .IP "\fB\-mbig\-endian\fR" 4
       
  9303 .IX Item "-mbig-endian"
       
  9304 .PD
       
  9305 Generate code for a little endian target.
       
  9306 .IP "\fB\-m210\fR" 4
       
  9307 .IX Item "-m210"
       
  9308 .PD 0
       
  9309 .IP "\fB\-m340\fR" 4
       
  9310 .IX Item "-m340"
       
  9311 .PD
       
  9312 Generate code for the 210 processor.
       
  9313 .PP
       
  9314 \fI\s-1IA\-64\s0 Options\fR
       
  9315 .IX Subsection "IA-64 Options"
       
  9316 .PP
       
  9317 These are the \fB\-m\fR options defined for the Intel \s-1IA\-64\s0 architecture.
       
  9318 .IP "\fB\-mbig\-endian\fR" 4
       
  9319 .IX Item "-mbig-endian"
       
  9320 Generate code for a big endian target.  This is the default for \s-1HP\-UX\s0.
       
  9321 .IP "\fB\-mlittle\-endian\fR" 4
       
  9322 .IX Item "-mlittle-endian"
       
  9323 Generate code for a little endian target.  This is the default for \s-1AIX5\s0
       
  9324 and GNU/Linux.
       
  9325 .IP "\fB\-mgnu\-as\fR" 4
       
  9326 .IX Item "-mgnu-as"
       
  9327 .PD 0
       
  9328 .IP "\fB\-mno\-gnu\-as\fR" 4
       
  9329 .IX Item "-mno-gnu-as"
       
  9330 .PD
       
  9331 Generate (or don't) code for the \s-1GNU\s0 assembler.  This is the default.
       
  9332 .IP "\fB\-mgnu\-ld\fR" 4
       
  9333 .IX Item "-mgnu-ld"
       
  9334 .PD 0
       
  9335 .IP "\fB\-mno\-gnu\-ld\fR" 4
       
  9336 .IX Item "-mno-gnu-ld"
       
  9337 .PD
       
  9338 Generate (or don't) code for the \s-1GNU\s0 linker.  This is the default.
       
  9339 .IP "\fB\-mno\-pic\fR" 4
       
  9340 .IX Item "-mno-pic"
       
  9341 Generate code that does not use a global pointer register.  The result
       
  9342 is not position independent code, and violates the \s-1IA\-64\s0 \s-1ABI\s0.
       
  9343 .IP "\fB\-mvolatile\-asm\-stop\fR" 4
       
  9344 .IX Item "-mvolatile-asm-stop"
       
  9345 .PD 0
       
  9346 .IP "\fB\-mno\-volatile\-asm\-stop\fR" 4
       
  9347 .IX Item "-mno-volatile-asm-stop"
       
  9348 .PD
       
  9349 Generate (or don't) a stop bit immediately before and after volatile asm
       
  9350 statements.
       
  9351 .IP "\fB\-mb\-step\fR" 4
       
  9352 .IX Item "-mb-step"
       
  9353 Generate code that works around Itanium B step errata.
       
  9354 .IP "\fB\-mregister\-names\fR" 4
       
  9355 .IX Item "-mregister-names"
       
  9356 .PD 0
       
  9357 .IP "\fB\-mno\-register\-names\fR" 4
       
  9358 .IX Item "-mno-register-names"
       
  9359 .PD
       
  9360 Generate (or don't) \fBin\fR, \fBloc\fR, and \fBout\fR register names for
       
  9361 the stacked registers.  This may make assembler output more readable.
       
  9362 .IP "\fB\-mno\-sdata\fR" 4
       
  9363 .IX Item "-mno-sdata"
       
  9364 .PD 0
       
  9365 .IP "\fB\-msdata\fR" 4
       
  9366 .IX Item "-msdata"
       
  9367 .PD
       
  9368 Disable (or enable) optimizations that use the small data section.  This may
       
  9369 be useful for working around optimizer bugs.
       
  9370 .IP "\fB\-mconstant\-gp\fR" 4
       
  9371 .IX Item "-mconstant-gp"
       
  9372 Generate code that uses a single constant global pointer value.  This is
       
  9373 useful when compiling kernel code.
       
  9374 .IP "\fB\-mauto\-pic\fR" 4
       
  9375 .IX Item "-mauto-pic"
       
  9376 Generate code that is self\-relocatable.  This implies \fB\-mconstant\-gp\fR.
       
  9377 This is useful when compiling firmware code.
       
  9378 .IP "\fB\-minline\-float\-divide\-min\-latency\fR" 4
       
  9379 .IX Item "-minline-float-divide-min-latency"
       
  9380 Generate code for inline divides of floating point values
       
  9381 using the minimum latency algorithm.
       
  9382 .IP "\fB\-minline\-float\-divide\-max\-throughput\fR" 4
       
  9383 .IX Item "-minline-float-divide-max-throughput"
       
  9384 Generate code for inline divides of floating point values
       
  9385 using the maximum throughput algorithm.
       
  9386 .IP "\fB\-minline\-int\-divide\-min\-latency\fR" 4
       
  9387 .IX Item "-minline-int-divide-min-latency"
       
  9388 Generate code for inline divides of integer values
       
  9389 using the minimum latency algorithm.
       
  9390 .IP "\fB\-minline\-int\-divide\-max\-throughput\fR" 4
       
  9391 .IX Item "-minline-int-divide-max-throughput"
       
  9392 Generate code for inline divides of integer values
       
  9393 using the maximum throughput algorithm.
       
  9394 .IP "\fB\-mno\-dwarf2\-asm\fR" 4
       
  9395 .IX Item "-mno-dwarf2-asm"
       
  9396 .PD 0
       
  9397 .IP "\fB\-mdwarf2\-asm\fR" 4
       
  9398 .IX Item "-mdwarf2-asm"
       
  9399 .PD
       
  9400 Don't (or do) generate assembler code for the \s-1DWARF2\s0 line number debugging
       
  9401 info.  This may be useful when not using the \s-1GNU\s0 assembler.
       
  9402 .IP "\fB\-mfixed\-range=\fR\fIregister-range\fR" 4
       
  9403 .IX Item "-mfixed-range=register-range"
       
  9404 Generate code treating the given register range as fixed registers.
       
  9405 A fixed register is one that the register allocator can not use.  This is
       
  9406 useful when compiling kernel code.  A register range is specified as
       
  9407 two registers separated by a dash.  Multiple register ranges can be
       
  9408 specified separated by a comma.
       
  9409 .IP "\fB\-mearly\-stop\-bits\fR" 4
       
  9410 .IX Item "-mearly-stop-bits"
       
  9411 .PD 0
       
  9412 .IP "\fB\-mno\-early\-stop\-bits\fR" 4
       
  9413 .IX Item "-mno-early-stop-bits"
       
  9414 .PD
       
  9415 Allow stop bits to be placed earlier than immediately preceding the
       
  9416 instruction that triggered the stop bit.  This can improve instruction
       
  9417 scheduling, but does not always do so.
       
  9418 .PP
       
  9419 \fID30V Options\fR
       
  9420 .IX Subsection "D30V Options"
       
  9421 .PP
       
  9422 These \fB\-m\fR options are defined for D30V implementations:
       
  9423 .IP "\fB\-mextmem\fR" 4
       
  9424 .IX Item "-mextmem"
       
  9425 Link the \fB.text\fR, \fB.data\fR, \fB.bss\fR, \fB.strings\fR,
       
  9426 \&\fB.rodata\fR, \fB.rodata1\fR, \fB.data1\fR sections into external
       
  9427 memory, which starts at location \f(CW0x80000000\fR.
       
  9428 .IP "\fB\-mextmemory\fR" 4
       
  9429 .IX Item "-mextmemory"
       
  9430 Same as the \fB\-mextmem\fR switch.
       
  9431 .IP "\fB\-monchip\fR" 4
       
  9432 .IX Item "-monchip"
       
  9433 Link the \fB.text\fR section into onchip text memory, which starts at
       
  9434 location \f(CW0x0\fR.  Also link \fB.data\fR, \fB.bss\fR,
       
  9435 \&\fB.strings\fR, \fB.rodata\fR, \fB.rodata1\fR, \fB.data1\fR sections
       
  9436 into onchip data memory, which starts at location \f(CW0x20000000\fR.
       
  9437 .IP "\fB\-mno\-asm\-optimize\fR" 4
       
  9438 .IX Item "-mno-asm-optimize"
       
  9439 .PD 0
       
  9440 .IP "\fB\-masm\-optimize\fR" 4
       
  9441 .IX Item "-masm-optimize"
       
  9442 .PD
       
  9443 Disable (enable) passing \fB\-O\fR to the assembler when optimizing.
       
  9444 The assembler uses the \fB\-O\fR option to automatically parallelize
       
  9445 adjacent short instructions where possible.
       
  9446 .IP "\fB\-mbranch\-cost=\fR\fIn\fR" 4
       
  9447 .IX Item "-mbranch-cost=n"
       
  9448 Increase the internal costs of branches to \fIn\fR.  Higher costs means
       
  9449 that the compiler will issue more instructions to avoid doing a branch.
       
  9450 The default is 2.
       
  9451 .IP "\fB\-mcond\-exec=\fR\fIn\fR" 4
       
  9452 .IX Item "-mcond-exec=n"
       
  9453 Specify the maximum number of conditionally executed instructions that
       
  9454 replace a branch.  The default is 4.
       
  9455 .PP
       
  9456 \fIS/390 and zSeries Options\fR
       
  9457 .IX Subsection "S/390 and zSeries Options"
       
  9458 .PP
       
  9459 These are the \fB\-m\fR options defined for the S/390 and zSeries architecture.
       
  9460 .IP "\fB\-mhard\-float\fR" 4
       
  9461 .IX Item "-mhard-float"
       
  9462 .PD 0
       
  9463 .IP "\fB\-msoft\-float\fR" 4
       
  9464 .IX Item "-msoft-float"
       
  9465 .PD
       
  9466 Use (do not use) the hardware floating-point instructions and registers
       
  9467 for floating-point operations.  When \fB\-msoft\-float\fR is specified,
       
  9468 functions in \fIlibgcc.a\fR will be used to perform floating-point
       
  9469 operations.  When \fB\-mhard\-float\fR is specified, the compiler
       
  9470 generates \s-1IEEE\s0 floating-point instructions.  This is the default.
       
  9471 .IP "\fB\-mbackchain\fR" 4
       
  9472 .IX Item "-mbackchain"
       
  9473 .PD 0
       
  9474 .IP "\fB\-mno\-backchain\fR" 4
       
  9475 .IX Item "-mno-backchain"
       
  9476 .PD
       
  9477 Generate (or do not generate) code which maintains an explicit
       
  9478 backchain within the stack frame that points to the caller's frame.
       
  9479 This may be needed to allow debugging using tools that do not understand
       
  9480 \&\s-1DWARF\-2\s0 call frame information.  The default is not to generate the
       
  9481 backchain.
       
  9482 .IP "\fB\-msmall\-exec\fR" 4
       
  9483 .IX Item "-msmall-exec"
       
  9484 .PD 0
       
  9485 .IP "\fB\-mno\-small\-exec\fR" 4
       
  9486 .IX Item "-mno-small-exec"
       
  9487 .PD
       
  9488 Generate (or do not generate) code using the \f(CW\*(C`bras\*(C'\fR instruction
       
  9489 to do subroutine calls.
       
  9490 This only works reliably if the total executable size does not
       
  9491 exceed 64k.  The default is to use the \f(CW\*(C`basr\*(C'\fR instruction instead,
       
  9492 which does not have this limitation.
       
  9493 .IP "\fB\-m64\fR" 4
       
  9494 .IX Item "-m64"
       
  9495 .PD 0
       
  9496 .IP "\fB\-m31\fR" 4
       
  9497 .IX Item "-m31"
       
  9498 .PD
       
  9499 When \fB\-m31\fR is specified, generate code compliant to the
       
  9500 GNU/Linux for S/390 \s-1ABI\s0.  When \fB\-m64\fR is specified, generate
       
  9501 code compliant to the GNU/Linux for zSeries \s-1ABI\s0.  This allows \s-1GCC\s0 in
       
  9502 particular to generate 64\-bit instructions.  For the \fBs390\fR
       
  9503 targets, the default is \fB\-m31\fR, while the \fBs390x\fR
       
  9504 targets default to \fB\-m64\fR.
       
  9505 .IP "\fB\-mzarch\fR" 4
       
  9506 .IX Item "-mzarch"
       
  9507 .PD 0
       
  9508 .IP "\fB\-mesa\fR" 4
       
  9509 .IX Item "-mesa"
       
  9510 .PD
       
  9511 When \fB\-mzarch\fR is specified, generate code using the
       
  9512 instructions available on z/Architecture.
       
  9513 When \fB\-mesa\fR is specified, generate code using the
       
  9514 instructions available on \s-1ESA/390\s0. Note that \fB\-mesa\fR is
       
  9515 not possible with \fB\-m64\fR.
       
  9516 When generating code compliant to the GNU/Linux for S/390 \s-1ABI\s0,
       
  9517 the default is \fB\-mesa\fR.  When generating code compliant
       
  9518 to the GNU/Linux for zSeries \s-1ABI\s0, the default is \fB\-mzarch\fR.
       
  9519 .IP "\fB\-mmvcle\fR" 4
       
  9520 .IX Item "-mmvcle"
       
  9521 .PD 0
       
  9522 .IP "\fB\-mno\-mvcle\fR" 4
       
  9523 .IX Item "-mno-mvcle"
       
  9524 .PD
       
  9525 Generate (or do not generate) code using the \f(CW\*(C`mvcle\*(C'\fR instruction
       
  9526 to perform block moves.  When \fB\-mno\-mvcle\fR is specified,
       
  9527 use a \f(CW\*(C`mvc\*(C'\fR loop instead.  This is the default.
       
  9528 .IP "\fB\-mdebug\fR" 4
       
  9529 .IX Item "-mdebug"
       
  9530 .PD 0
       
  9531 .IP "\fB\-mno\-debug\fR" 4
       
  9532 .IX Item "-mno-debug"
       
  9533 .PD
       
  9534 Print (or do not print) additional debug information when compiling.
       
  9535 The default is to not print debug information.
       
  9536 .IP "\fB\-march=\fR\fIcpu-type\fR" 4
       
  9537 .IX Item "-march=cpu-type"
       
  9538 Generate code that will run on \fIcpu-type\fR, which is the name of a system
       
  9539 representing a certain processor type. Possible values for
       
  9540 \&\fIcpu-type\fR are \fBg5\fR, \fBg6\fR, \fBz900\fR, and \fBz990\fR.
       
  9541 When generating code using the instructions available on z/Architecture,
       
  9542 the default is \fB\-march=z900\fR.  Otherwise, the default is
       
  9543 \&\fB\-march=g5\fR.
       
  9544 .IP "\fB\-mtune=\fR\fIcpu-type\fR" 4
       
  9545 .IX Item "-mtune=cpu-type"
       
  9546 Tune to \fIcpu-type\fR everything applicable about the generated code,
       
  9547 except for the \s-1ABI\s0 and the set of available instructions.
       
  9548 The list of \fIcpu-type\fR values is the same as for \fB\-march\fR.
       
  9549 The default is the value used for \fB\-march\fR.
       
  9550 .IP "\fB\-mfused\-madd\fR" 4
       
  9551 .IX Item "-mfused-madd"
       
  9552 .PD 0
       
  9553 .IP "\fB\-mno\-fused\-madd\fR" 4
       
  9554 .IX Item "-mno-fused-madd"
       
  9555 .PD
       
  9556 Generate code that uses (does not use) the floating point multiply and
       
  9557 accumulate instructions.  These instructions are generated by default if
       
  9558 hardware floating point is used.
       
  9559 .PP
       
  9560 \fI\s-1CRIS\s0 Options\fR
       
  9561 .IX Subsection "CRIS Options"
       
  9562 .PP
       
  9563 These options are defined specifically for the \s-1CRIS\s0 ports.
       
  9564 .IP "\fB\-march=\fR\fIarchitecture-type\fR" 4
       
  9565 .IX Item "-march=architecture-type"
       
  9566 .PD 0
       
  9567 .IP "\fB\-mcpu=\fR\fIarchitecture-type\fR" 4
       
  9568 .IX Item "-mcpu=architecture-type"
       
  9569 .PD
       
  9570 Generate code for the specified architecture.  The choices for
       
  9571 \&\fIarchitecture-type\fR are \fBv3\fR, \fBv8\fR and \fBv10\fR for
       
  9572 respectively \s-1ETRAX\s0\ 4, \s-1ETRAX\s0\ 100, and \s-1ETRAX\s0\ 100\ \s-1LX\s0.
       
  9573 Default is \fBv0\fR except for cris\-axis\-linux\-gnu, where the default is
       
  9574 \&\fBv10\fR.
       
  9575 .IP "\fB\-mtune=\fR\fIarchitecture-type\fR" 4
       
  9576 .IX Item "-mtune=architecture-type"
       
  9577 Tune to \fIarchitecture-type\fR everything applicable about the generated
       
  9578 code, except for the \s-1ABI\s0 and the set of available instructions.  The
       
  9579 choices for \fIarchitecture-type\fR are the same as for
       
  9580 \&\fB\-march=\fR\fIarchitecture-type\fR.
       
  9581 .IP "\fB\-mmax\-stack\-frame=\fR\fIn\fR" 4
       
  9582 .IX Item "-mmax-stack-frame=n"
       
  9583 Warn when the stack frame of a function exceeds \fIn\fR bytes.
       
  9584 .IP "\fB\-melinux\-stacksize=\fR\fIn\fR" 4
       
  9585 .IX Item "-melinux-stacksize=n"
       
  9586 Only available with the \fBcris-axis-aout\fR target.  Arranges for
       
  9587 indications in the program to the kernel loader that the stack of the
       
  9588 program should be set to \fIn\fR bytes.
       
  9589 .IP "\fB\-metrax4\fR" 4
       
  9590 .IX Item "-metrax4"
       
  9591 .PD 0
       
  9592 .IP "\fB\-metrax100\fR" 4
       
  9593 .IX Item "-metrax100"
       
  9594 .PD
       
  9595 The options \fB\-metrax4\fR and \fB\-metrax100\fR are synonyms for
       
  9596 \&\fB\-march=v3\fR and \fB\-march=v8\fR respectively.
       
  9597 .IP "\fB\-mmul\-bug\-workaround\fR" 4
       
  9598 .IX Item "-mmul-bug-workaround"
       
  9599 .PD 0
       
  9600 .IP "\fB\-mno\-mul\-bug\-workaround\fR" 4
       
  9601 .IX Item "-mno-mul-bug-workaround"
       
  9602 .PD
       
  9603 Work around a bug in the \f(CW\*(C`muls\*(C'\fR and \f(CW\*(C`mulu\*(C'\fR instructions for \s-1CPU\s0
       
  9604 models where it applies.  This option is active by default.
       
  9605 .IP "\fB\-mpdebug\fR" 4
       
  9606 .IX Item "-mpdebug"
       
  9607 Enable CRIS-specific verbose debug-related information in the assembly
       
  9608 code.  This option also has the effect to turn off the \fB#NO_APP\fR
       
  9609 formatted-code indicator to the assembler at the beginning of the
       
  9610 assembly file.
       
  9611 .IP "\fB\-mcc\-init\fR" 4
       
  9612 .IX Item "-mcc-init"
       
  9613 Do not use condition-code results from previous instruction; always emit
       
  9614 compare and test instructions before use of condition codes.
       
  9615 .IP "\fB\-mno\-side\-effects\fR" 4
       
  9616 .IX Item "-mno-side-effects"
       
  9617 Do not emit instructions with side-effects in addressing modes other than
       
  9618 post\-increment.
       
  9619 .IP "\fB\-mstack\-align\fR" 4
       
  9620 .IX Item "-mstack-align"
       
  9621 .PD 0
       
  9622 .IP "\fB\-mno\-stack\-align\fR" 4
       
  9623 .IX Item "-mno-stack-align"
       
  9624 .IP "\fB\-mdata\-align\fR" 4
       
  9625 .IX Item "-mdata-align"
       
  9626 .IP "\fB\-mno\-data\-align\fR" 4
       
  9627 .IX Item "-mno-data-align"
       
  9628 .IP "\fB\-mconst\-align\fR" 4
       
  9629 .IX Item "-mconst-align"
       
  9630 .IP "\fB\-mno\-const\-align\fR" 4
       
  9631 .IX Item "-mno-const-align"
       
  9632 .PD
       
  9633 These options (no\-options) arranges (eliminate arrangements) for the
       
  9634 stack\-frame, individual data and constants to be aligned for the maximum
       
  9635 single data access size for the chosen \s-1CPU\s0 model.  The default is to
       
  9636 arrange for 32\-bit alignment.  \s-1ABI\s0 details such as structure layout are
       
  9637 not affected by these options.
       
  9638 .IP "\fB\-m32\-bit\fR" 4
       
  9639 .IX Item "-m32-bit"
       
  9640 .PD 0
       
  9641 .IP "\fB\-m16\-bit\fR" 4
       
  9642 .IX Item "-m16-bit"
       
  9643 .IP "\fB\-m8\-bit\fR" 4
       
  9644 .IX Item "-m8-bit"
       
  9645 .PD
       
  9646 Similar to the stack\- data\- and const-align options above, these options
       
  9647 arrange for stack\-frame, writable data and constants to all be 32\-bit,
       
  9648 16\-bit or 8\-bit aligned.  The default is 32\-bit alignment.
       
  9649 .IP "\fB\-mno\-prologue\-epilogue\fR" 4
       
  9650 .IX Item "-mno-prologue-epilogue"
       
  9651 .PD 0
       
  9652 .IP "\fB\-mprologue\-epilogue\fR" 4
       
  9653 .IX Item "-mprologue-epilogue"
       
  9654 .PD
       
  9655 With \fB\-mno\-prologue\-epilogue\fR, the normal function prologue and
       
  9656 epilogue that sets up the stack-frame are omitted and no return
       
  9657 instructions or return sequences are generated in the code.  Use this
       
  9658 option only together with visual inspection of the compiled code: no
       
  9659 warnings or errors are generated when call-saved registers must be saved,
       
  9660 or storage for local variable needs to be allocated.
       
  9661 .IP "\fB\-mno\-gotplt\fR" 4
       
  9662 .IX Item "-mno-gotplt"
       
  9663 .PD 0
       
  9664 .IP "\fB\-mgotplt\fR" 4
       
  9665 .IX Item "-mgotplt"
       
  9666 .PD
       
  9667 With \fB\-fpic\fR and \fB\-fPIC\fR, don't generate (do generate)
       
  9668 instruction sequences that load addresses for functions from the \s-1PLT\s0 part
       
  9669 of the \s-1GOT\s0 rather than (traditional on other architectures) calls to the
       
  9670 \&\s-1PLT\s0.  The default is \fB\-mgotplt\fR.
       
  9671 .IP "\fB\-maout\fR" 4
       
  9672 .IX Item "-maout"
       
  9673 Legacy no-op option only recognized with the cris-axis-aout target.
       
  9674 .IP "\fB\-melf\fR" 4
       
  9675 .IX Item "-melf"
       
  9676 Legacy no-op option only recognized with the cris-axis-elf and
       
  9677 cris-axis-linux-gnu targets.
       
  9678 .IP "\fB\-melinux\fR" 4
       
  9679 .IX Item "-melinux"
       
  9680 Only recognized with the cris-axis-aout target, where it selects a
       
  9681 GNU/linux\-like multilib, include files and instruction set for
       
  9682 \&\fB\-march=v8\fR.
       
  9683 .IP "\fB\-mlinux\fR" 4
       
  9684 .IX Item "-mlinux"
       
  9685 Legacy no-op option only recognized with the cris-axis-linux-gnu target.
       
  9686 .IP "\fB\-sim\fR" 4
       
  9687 .IX Item "-sim"
       
  9688 This option, recognized for the cris-axis-aout and cris-axis-elf arranges
       
  9689 to link with input-output functions from a simulator library.  Code,
       
  9690 initialized data and zero-initialized data are allocated consecutively.
       
  9691 .IP "\fB\-sim2\fR" 4
       
  9692 .IX Item "-sim2"
       
  9693 Like \fB\-sim\fR, but pass linker options to locate initialized data at
       
  9694 0x40000000 and zero-initialized data at 0x80000000.
       
  9695 .PP
       
  9696 \fI\s-1MMIX\s0 Options\fR
       
  9697 .IX Subsection "MMIX Options"
       
  9698 .PP
       
  9699 These options are defined for the \s-1MMIX:\s0
       
  9700 .IP "\fB\-mlibfuncs\fR" 4
       
  9701 .IX Item "-mlibfuncs"
       
  9702 .PD 0
       
  9703 .IP "\fB\-mno\-libfuncs\fR" 4
       
  9704 .IX Item "-mno-libfuncs"
       
  9705 .PD
       
  9706 Specify that intrinsic library functions are being compiled, passing all
       
  9707 values in registers, no matter the size.
       
  9708 .IP "\fB\-mepsilon\fR" 4
       
  9709 .IX Item "-mepsilon"
       
  9710 .PD 0
       
  9711 .IP "\fB\-mno\-epsilon\fR" 4
       
  9712 .IX Item "-mno-epsilon"
       
  9713 .PD
       
  9714 Generate floating-point comparison instructions that compare with respect
       
  9715 to the \f(CW\*(C`rE\*(C'\fR epsilon register.
       
  9716 .IP "\fB\-mabi=mmixware\fR" 4
       
  9717 .IX Item "-mabi=mmixware"
       
  9718 .PD 0
       
  9719 .IP "\fB\-mabi=gnu\fR" 4
       
  9720 .IX Item "-mabi=gnu"
       
  9721 .PD
       
  9722 Generate code that passes function parameters and return values that (in
       
  9723 the called function) are seen as registers \f(CW$0\fR and up, as opposed to
       
  9724 the \s-1GNU\s0 \s-1ABI\s0 which uses global registers \f(CW$231\fR and up.
       
  9725 .IP "\fB\-mzero\-extend\fR" 4
       
  9726 .IX Item "-mzero-extend"
       
  9727 .PD 0
       
  9728 .IP "\fB\-mno\-zero\-extend\fR" 4
       
  9729 .IX Item "-mno-zero-extend"
       
  9730 .PD
       
  9731 When reading data from memory in sizes shorter than 64 bits, use (do not
       
  9732 use) zero-extending load instructions by default, rather than
       
  9733 sign-extending ones.
       
  9734 .IP "\fB\-mknuthdiv\fR" 4
       
  9735 .IX Item "-mknuthdiv"
       
  9736 .PD 0
       
  9737 .IP "\fB\-mno\-knuthdiv\fR" 4
       
  9738 .IX Item "-mno-knuthdiv"
       
  9739 .PD
       
  9740 Make the result of a division yielding a remainder have the same sign as
       
  9741 the divisor.  With the default, \fB\-mno\-knuthdiv\fR, the sign of the
       
  9742 remainder follows the sign of the dividend.  Both methods are
       
  9743 arithmetically valid, the latter being almost exclusively used.
       
  9744 .IP "\fB\-mtoplevel\-symbols\fR" 4
       
  9745 .IX Item "-mtoplevel-symbols"
       
  9746 .PD 0
       
  9747 .IP "\fB\-mno\-toplevel\-symbols\fR" 4
       
  9748 .IX Item "-mno-toplevel-symbols"
       
  9749 .PD
       
  9750 Prepend (do not prepend) a \fB:\fR to all global symbols, so the assembly
       
  9751 code can be used with the \f(CW\*(C`PREFIX\*(C'\fR assembly directive.
       
  9752 .IP "\fB\-melf\fR" 4
       
  9753 .IX Item "-melf"
       
  9754 Generate an executable in the \s-1ELF\s0 format, rather than the default
       
  9755 \&\fBmmo\fR format used by the \fBmmix\fR simulator.
       
  9756 .IP "\fB\-mbranch\-predict\fR" 4
       
  9757 .IX Item "-mbranch-predict"
       
  9758 .PD 0
       
  9759 .IP "\fB\-mno\-branch\-predict\fR" 4
       
  9760 .IX Item "-mno-branch-predict"
       
  9761 .PD
       
  9762 Use (do not use) the probable-branch instructions, when static branch
       
  9763 prediction indicates a probable branch.
       
  9764 .IP "\fB\-mbase\-addresses\fR" 4
       
  9765 .IX Item "-mbase-addresses"
       
  9766 .PD 0
       
  9767 .IP "\fB\-mno\-base\-addresses\fR" 4
       
  9768 .IX Item "-mno-base-addresses"
       
  9769 .PD
       
  9770 Generate (do not generate) code that uses \fIbase addresses\fR.  Using a
       
  9771 base address automatically generates a request (handled by the assembler
       
  9772 and the linker) for a constant to be set up in a global register.  The
       
  9773 register is used for one or more base address requests within the range 0
       
  9774 to 255 from the value held in the register.  The generally leads to short
       
  9775 and fast code, but the number of different data items that can be
       
  9776 addressed is limited.  This means that a program that uses lots of static
       
  9777 data may require \fB\-mno\-base\-addresses\fR.
       
  9778 .IP "\fB\-msingle\-exit\fR" 4
       
  9779 .IX Item "-msingle-exit"
       
  9780 .PD 0
       
  9781 .IP "\fB\-mno\-single\-exit\fR" 4
       
  9782 .IX Item "-mno-single-exit"
       
  9783 .PD
       
  9784 Force (do not force) generated code to have a single exit point in each
       
  9785 function.
       
  9786 .PP
       
  9787 \fI\s-1PDP\-11\s0 Options\fR
       
  9788 .IX Subsection "PDP-11 Options"
       
  9789 .PP
       
  9790 These options are defined for the \s-1PDP\-11:\s0
       
  9791 .IP "\fB\-mfpu\fR" 4
       
  9792 .IX Item "-mfpu"
       
  9793 Use hardware \s-1FPP\s0 floating point.  This is the default.  (\s-1FIS\s0 floating
       
  9794 point on the \s-1PDP\-11/40\s0 is not supported.)
       
  9795 .IP "\fB\-msoft\-float\fR" 4
       
  9796 .IX Item "-msoft-float"
       
  9797 Do not use hardware floating point.
       
  9798 .IP "\fB\-mac0\fR" 4
       
  9799 .IX Item "-mac0"
       
  9800 Return floating-point results in ac0 (fr0 in Unix assembler syntax).
       
  9801 .IP "\fB\-mno\-ac0\fR" 4
       
  9802 .IX Item "-mno-ac0"
       
  9803 Return floating-point results in memory.  This is the default.
       
  9804 .IP "\fB\-m40\fR" 4
       
  9805 .IX Item "-m40"
       
  9806 Generate code for a \s-1PDP\-11/40\s0.
       
  9807 .IP "\fB\-m45\fR" 4
       
  9808 .IX Item "-m45"
       
  9809 Generate code for a \s-1PDP\-11/45\s0.  This is the default.
       
  9810 .IP "\fB\-m10\fR" 4
       
  9811 .IX Item "-m10"
       
  9812 Generate code for a \s-1PDP\-11/10\s0.
       
  9813 .IP "\fB\-mbcopy\-builtin\fR" 4
       
  9814 .IX Item "-mbcopy-builtin"
       
  9815 Use inline \f(CW\*(C`movstrhi\*(C'\fR patterns for copying memory.  This is the
       
  9816 default.
       
  9817 .IP "\fB\-mbcopy\fR" 4
       
  9818 .IX Item "-mbcopy"
       
  9819 Do not use inline \f(CW\*(C`movstrhi\*(C'\fR patterns for copying memory.
       
  9820 .IP "\fB\-mint16\fR" 4
       
  9821 .IX Item "-mint16"
       
  9822 .PD 0
       
  9823 .IP "\fB\-mno\-int32\fR" 4
       
  9824 .IX Item "-mno-int32"
       
  9825 .PD
       
  9826 Use 16\-bit \f(CW\*(C`int\*(C'\fR.  This is the default.
       
  9827 .IP "\fB\-mint32\fR" 4
       
  9828 .IX Item "-mint32"
       
  9829 .PD 0
       
  9830 .IP "\fB\-mno\-int16\fR" 4
       
  9831 .IX Item "-mno-int16"
       
  9832 .PD
       
  9833 Use 32\-bit \f(CW\*(C`int\*(C'\fR.
       
  9834 .IP "\fB\-mfloat64\fR" 4
       
  9835 .IX Item "-mfloat64"
       
  9836 .PD 0
       
  9837 .IP "\fB\-mno\-float32\fR" 4
       
  9838 .IX Item "-mno-float32"
       
  9839 .PD
       
  9840 Use 64\-bit \f(CW\*(C`float\*(C'\fR.  This is the default.
       
  9841 .IP "\fB\-mfloat32\fR" 4
       
  9842 .IX Item "-mfloat32"
       
  9843 .PD 0
       
  9844 .IP "\fB\-mno\-float64\fR" 4
       
  9845 .IX Item "-mno-float64"
       
  9846 .PD
       
  9847 Use 32\-bit \f(CW\*(C`float\*(C'\fR.
       
  9848 .IP "\fB\-mabshi\fR" 4
       
  9849 .IX Item "-mabshi"
       
  9850 Use \f(CW\*(C`abshi2\*(C'\fR pattern.  This is the default.
       
  9851 .IP "\fB\-mno\-abshi\fR" 4
       
  9852 .IX Item "-mno-abshi"
       
  9853 Do not use \f(CW\*(C`abshi2\*(C'\fR pattern.
       
  9854 .IP "\fB\-mbranch\-expensive\fR" 4
       
  9855 .IX Item "-mbranch-expensive"
       
  9856 Pretend that branches are expensive.  This is for experimenting with
       
  9857 code generation only.
       
  9858 .IP "\fB\-mbranch\-cheap\fR" 4
       
  9859 .IX Item "-mbranch-cheap"
       
  9860 Do not pretend that branches are expensive.  This is the default.
       
  9861 .IP "\fB\-msplit\fR" 4
       
  9862 .IX Item "-msplit"
       
  9863 Generate code for a system with split I&D.
       
  9864 .IP "\fB\-mno\-split\fR" 4
       
  9865 .IX Item "-mno-split"
       
  9866 Generate code for a system without split I&D.  This is the default.
       
  9867 .IP "\fB\-munix\-asm\fR" 4
       
  9868 .IX Item "-munix-asm"
       
  9869 Use Unix assembler syntax.  This is the default when configured for
       
  9870 \&\fBpdp11\-*\-bsd\fR.
       
  9871 .IP "\fB\-mdec\-asm\fR" 4
       
  9872 .IX Item "-mdec-asm"
       
  9873 Use \s-1DEC\s0 assembler syntax.  This is the default when configured for any
       
  9874 \&\s-1PDP\-11\s0 target other than \fBpdp11\-*\-bsd\fR.
       
  9875 .PP
       
  9876 \fIXstormy16 Options\fR
       
  9877 .IX Subsection "Xstormy16 Options"
       
  9878 .PP
       
  9879 These options are defined for Xstormy16:
       
  9880 .IP "\fB\-msim\fR" 4
       
  9881 .IX Item "-msim"
       
  9882 Choose startup files and linker script suitable for the simulator.
       
  9883 .PP
       
  9884 \fI\s-1FRV\s0 Options\fR
       
  9885 .IX Subsection "FRV Options"
       
  9886 .IP "\fB\-mgpr\-32\fR" 4
       
  9887 .IX Item "-mgpr-32"
       
  9888 Only use the first 32 general purpose registers.
       
  9889 .IP "\fB\-mgpr\-64\fR" 4
       
  9890 .IX Item "-mgpr-64"
       
  9891 Use all 64 general purpose registers.
       
  9892 .IP "\fB\-mfpr\-32\fR" 4
       
  9893 .IX Item "-mfpr-32"
       
  9894 Use only the first 32 floating point registers.
       
  9895 .IP "\fB\-mfpr\-64\fR" 4
       
  9896 .IX Item "-mfpr-64"
       
  9897 Use all 64 floating point registers
       
  9898 .IP "\fB\-mhard\-float\fR" 4
       
  9899 .IX Item "-mhard-float"
       
  9900 Use hardware instructions for floating point operations.
       
  9901 .IP "\fB\-msoft\-float\fR" 4
       
  9902 .IX Item "-msoft-float"
       
  9903 Use library routines for floating point operations.
       
  9904 .IP "\fB\-malloc\-cc\fR" 4
       
  9905 .IX Item "-malloc-cc"
       
  9906 Dynamically allocate condition code registers.
       
  9907 .IP "\fB\-mfixed\-cc\fR" 4
       
  9908 .IX Item "-mfixed-cc"
       
  9909 Do not try to dynamically allocate condition code registers, only
       
  9910 use \f(CW\*(C`icc0\*(C'\fR and \f(CW\*(C`fcc0\*(C'\fR.
       
  9911 .IP "\fB\-mdword\fR" 4
       
  9912 .IX Item "-mdword"
       
  9913 Change \s-1ABI\s0 to use double word insns.
       
  9914 .IP "\fB\-mno\-dword\fR" 4
       
  9915 .IX Item "-mno-dword"
       
  9916 Do not use double word instructions.
       
  9917 .IP "\fB\-mdouble\fR" 4
       
  9918 .IX Item "-mdouble"
       
  9919 Use floating point double instructions.
       
  9920 .IP "\fB\-mno\-double\fR" 4
       
  9921 .IX Item "-mno-double"
       
  9922 Do not use floating point double instructions.
       
  9923 .IP "\fB\-mmedia\fR" 4
       
  9924 .IX Item "-mmedia"
       
  9925 Use media instructions.
       
  9926 .IP "\fB\-mno\-media\fR" 4
       
  9927 .IX Item "-mno-media"
       
  9928 Do not use media instructions.
       
  9929 .IP "\fB\-mmuladd\fR" 4
       
  9930 .IX Item "-mmuladd"
       
  9931 Use multiply and add/subtract instructions.
       
  9932 .IP "\fB\-mno\-muladd\fR" 4
       
  9933 .IX Item "-mno-muladd"
       
  9934 Do not use multiply and add/subtract instructions.
       
  9935 .IP "\fB\-mlibrary\-pic\fR" 4
       
  9936 .IX Item "-mlibrary-pic"
       
  9937 Enable \s-1PIC\s0 support for building libraries
       
  9938 .IP "\fB\-macc\-4\fR" 4
       
  9939 .IX Item "-macc-4"
       
  9940 Use only the first four media accumulator registers.
       
  9941 .IP "\fB\-macc\-8\fR" 4
       
  9942 .IX Item "-macc-8"
       
  9943 Use all eight media accumulator registers.
       
  9944 .IP "\fB\-mpack\fR" 4
       
  9945 .IX Item "-mpack"
       
  9946 Pack \s-1VLIW\s0 instructions.
       
  9947 .IP "\fB\-mno\-pack\fR" 4
       
  9948 .IX Item "-mno-pack"
       
  9949 Do not pack \s-1VLIW\s0 instructions.
       
  9950 .IP "\fB\-mno\-eflags\fR" 4
       
  9951 .IX Item "-mno-eflags"
       
  9952 Do not mark \s-1ABI\s0 switches in e_flags.
       
  9953 .IP "\fB\-mcond\-move\fR" 4
       
  9954 .IX Item "-mcond-move"
       
  9955 Enable the use of conditional-move instructions (default).
       
  9956 .Sp
       
  9957 This switch is mainly for debugging the compiler and will likely be removed
       
  9958 in a future version.
       
  9959 .IP "\fB\-mno\-cond\-move\fR" 4
       
  9960 .IX Item "-mno-cond-move"
       
  9961 Disable the use of conditional-move instructions.
       
  9962 .Sp
       
  9963 This switch is mainly for debugging the compiler and will likely be removed
       
  9964 in a future version.
       
  9965 .IP "\fB\-mscc\fR" 4
       
  9966 .IX Item "-mscc"
       
  9967 Enable the use of conditional set instructions (default).
       
  9968 .Sp
       
  9969 This switch is mainly for debugging the compiler and will likely be removed
       
  9970 in a future version.
       
  9971 .IP "\fB\-mno\-scc\fR" 4
       
  9972 .IX Item "-mno-scc"
       
  9973 Disable the use of conditional set instructions.
       
  9974 .Sp
       
  9975 This switch is mainly for debugging the compiler and will likely be removed
       
  9976 in a future version.
       
  9977 .IP "\fB\-mcond\-exec\fR" 4
       
  9978 .IX Item "-mcond-exec"
       
  9979 Enable the use of conditional execution (default).
       
  9980 .Sp
       
  9981 This switch is mainly for debugging the compiler and will likely be removed
       
  9982 in a future version.
       
  9983 .IP "\fB\-mno\-cond\-exec\fR" 4
       
  9984 .IX Item "-mno-cond-exec"
       
  9985 Disable the use of conditional execution.
       
  9986 .Sp
       
  9987 This switch is mainly for debugging the compiler and will likely be removed
       
  9988 in a future version.
       
  9989 .IP "\fB\-mvliw\-branch\fR" 4
       
  9990 .IX Item "-mvliw-branch"
       
  9991 Run a pass to pack branches into \s-1VLIW\s0 instructions (default).
       
  9992 .Sp
       
  9993 This switch is mainly for debugging the compiler and will likely be removed
       
  9994 in a future version.
       
  9995 .IP "\fB\-mno\-vliw\-branch\fR" 4
       
  9996 .IX Item "-mno-vliw-branch"
       
  9997 Do not run a pass to pack branches into \s-1VLIW\s0 instructions.
       
  9998 .Sp
       
  9999 This switch is mainly for debugging the compiler and will likely be removed
       
 10000 in a future version.
       
 10001 .IP "\fB\-mmulti\-cond\-exec\fR" 4
       
 10002 .IX Item "-mmulti-cond-exec"
       
 10003 Enable optimization of \f(CW\*(C`&&\*(C'\fR and \f(CW\*(C`||\*(C'\fR in conditional execution
       
 10004 (default).
       
 10005 .Sp
       
 10006 This switch is mainly for debugging the compiler and will likely be removed
       
 10007 in a future version.
       
 10008 .IP "\fB\-mno\-multi\-cond\-exec\fR" 4
       
 10009 .IX Item "-mno-multi-cond-exec"
       
 10010 Disable optimization of \f(CW\*(C`&&\*(C'\fR and \f(CW\*(C`||\*(C'\fR in conditional execution.
       
 10011 .Sp
       
 10012 This switch is mainly for debugging the compiler and will likely be removed
       
 10013 in a future version.
       
 10014 .IP "\fB\-mnested\-cond\-exec\fR" 4
       
 10015 .IX Item "-mnested-cond-exec"
       
 10016 Enable nested conditional execution optimizations (default).
       
 10017 .Sp
       
 10018 This switch is mainly for debugging the compiler and will likely be removed
       
 10019 in a future version.
       
 10020 .IP "\fB\-mno\-nested\-cond\-exec\fR" 4
       
 10021 .IX Item "-mno-nested-cond-exec"
       
 10022 Disable nested conditional execution optimizations.
       
 10023 .Sp
       
 10024 This switch is mainly for debugging the compiler and will likely be removed
       
 10025 in a future version.
       
 10026 .IP "\fB\-mtomcat\-stats\fR" 4
       
 10027 .IX Item "-mtomcat-stats"
       
 10028 Cause gas to print out tomcat statistics.
       
 10029 .IP "\fB\-mcpu=\fR\fIcpu\fR" 4
       
 10030 .IX Item "-mcpu=cpu"
       
 10031 Select the processor type for which to generate code.  Possible values are
       
 10032 \&\fBsimple\fR, \fBtomcat\fR, \fBfr500\fR, \fBfr400\fR, \fBfr300\fR,
       
 10033 \&\fBfrv\fR.
       
 10034 .PP
       
 10035 \fIXtensa Options\fR
       
 10036 .IX Subsection "Xtensa Options"
       
 10037 .PP
       
 10038 These options are supported for Xtensa targets:
       
 10039 .IP "\fB\-mconst16\fR" 4
       
 10040 .IX Item "-mconst16"
       
 10041 .PD 0
       
 10042 .IP "\fB\-mno\-const16\fR" 4
       
 10043 .IX Item "-mno-const16"
       
 10044 .PD
       
 10045 Enable or disable use of \f(CW\*(C`CONST16\*(C'\fR instructions for loading
       
 10046 constant values.  The \f(CW\*(C`CONST16\*(C'\fR instruction is currently not a
       
 10047 standard option from Tensilica.  When enabled, \f(CW\*(C`CONST16\*(C'\fR
       
 10048 instructions are always used in place of the standard \f(CW\*(C`L32R\*(C'\fR
       
 10049 instructions.  The use of \f(CW\*(C`CONST16\*(C'\fR is enabled by default only if
       
 10050 the \f(CW\*(C`L32R\*(C'\fR instruction is not available.
       
 10051 .IP "\fB\-mfused\-madd\fR" 4
       
 10052 .IX Item "-mfused-madd"
       
 10053 .PD 0
       
 10054 .IP "\fB\-mno\-fused\-madd\fR" 4
       
 10055 .IX Item "-mno-fused-madd"
       
 10056 .PD
       
 10057 Enable or disable use of fused multiply/add and multiply/subtract
       
 10058 instructions in the floating-point option.  This has no effect if the
       
 10059 floating-point option is not also enabled.  Disabling fused multiply/add
       
 10060 and multiply/subtract instructions forces the compiler to use separate
       
 10061 instructions for the multiply and add/subtract operations.  This may be
       
 10062 desirable in some cases where strict \s-1IEEE\s0 754\-compliant results are
       
 10063 required: the fused multiply add/subtract instructions do not round the
       
 10064 intermediate result, thereby producing results with \fImore\fR bits of
       
 10065 precision than specified by the \s-1IEEE\s0 standard.  Disabling fused multiply
       
 10066 add/subtract instructions also ensures that the program output is not
       
 10067 sensitive to the compiler's ability to combine multiply and add/subtract
       
 10068 operations.
       
 10069 .IP "\fB\-mtext\-section\-literals\fR" 4
       
 10070 .IX Item "-mtext-section-literals"
       
 10071 .PD 0
       
 10072 .IP "\fB\-mno\-text\-section\-literals\fR" 4
       
 10073 .IX Item "-mno-text-section-literals"
       
 10074 .PD
       
 10075 Control the treatment of literal pools.  The default is
       
 10076 \&\fB\-mno\-text\-section\-literals\fR, which places literals in a separate
       
 10077 section in the output file.  This allows the literal pool to be placed
       
 10078 in a data \s-1RAM/ROM\s0, and it also allows the linker to combine literal
       
 10079 pools from separate object files to remove redundant literals and
       
 10080 improve code size.  With \fB\-mtext\-section\-literals\fR, the literals
       
 10081 are interspersed in the text section in order to keep them as close as
       
 10082 possible to their references.  This may be necessary for large assembly
       
 10083 files.
       
 10084 .IP "\fB\-mtarget\-align\fR" 4
       
 10085 .IX Item "-mtarget-align"
       
 10086 .PD 0
       
 10087 .IP "\fB\-mno\-target\-align\fR" 4
       
 10088 .IX Item "-mno-target-align"
       
 10089 .PD
       
 10090 When this option is enabled, \s-1GCC\s0 instructs the assembler to
       
 10091 automatically align instructions to reduce branch penalties at the
       
 10092 expense of some code density.  The assembler attempts to widen density
       
 10093 instructions to align branch targets and the instructions following call
       
 10094 instructions.  If there are not enough preceding safe density
       
 10095 instructions to align a target, no widening will be performed.  The
       
 10096 default is \fB\-mtarget\-align\fR.  These options do not affect the
       
 10097 treatment of auto-aligned instructions like \f(CW\*(C`LOOP\*(C'\fR, which the
       
 10098 assembler will always align, either by widening density instructions or
       
 10099 by inserting no-op instructions.
       
 10100 .IP "\fB\-mlongcalls\fR" 4
       
 10101 .IX Item "-mlongcalls"
       
 10102 .PD 0
       
 10103 .IP "\fB\-mno\-longcalls\fR" 4
       
 10104 .IX Item "-mno-longcalls"
       
 10105 .PD
       
 10106 When this option is enabled, \s-1GCC\s0 instructs the assembler to translate
       
 10107 direct calls to indirect calls unless it can determine that the target
       
 10108 of a direct call is in the range allowed by the call instruction.  This
       
 10109 translation typically occurs for calls to functions in other source
       
 10110 files.  Specifically, the assembler translates a direct \f(CW\*(C`CALL\*(C'\fR
       
 10111 instruction into an \f(CW\*(C`L32R\*(C'\fR followed by a \f(CW\*(C`CALLX\*(C'\fR instruction.
       
 10112 The default is \fB\-mno\-longcalls\fR.  This option should be used in
       
 10113 programs where the call target can potentially be out of range.  This
       
 10114 option is implemented in the assembler, not the compiler, so the
       
 10115 assembly code generated by \s-1GCC\s0 will still show direct call
       
 10116 instructions\-\-\-look at the disassembled object code to see the actual
       
 10117 instructions.  Note that the assembler will use an indirect call for
       
 10118 every cross-file call, not just those that really will be out of range.
       
 10119 .Sh "Options for Code Generation Conventions"
       
 10120 .IX Subsection "Options for Code Generation Conventions"
       
 10121 These machine-independent options control the interface conventions
       
 10122 used in code generation.
       
 10123 .PP
       
 10124 Most of them have both positive and negative forms; the negative form
       
 10125 of \fB\-ffoo\fR would be \fB\-fno\-foo\fR.  In the table below, only
       
 10126 one of the forms is listed\-\-\-the one which is not the default.  You
       
 10127 can figure out the other form by either removing \fBno\-\fR or adding
       
 10128 it.
       
 10129 .IP "\fB\-fbounds\-check\fR" 4
       
 10130 .IX Item "-fbounds-check"
       
 10131 For front-ends that support it, generate additional code to check that
       
 10132 indices used to access arrays are within the declared range.  This is
       
 10133 currently only supported by the Java and Fortran 77 front\-ends, where
       
 10134 this option defaults to true and false respectively.
       
 10135 .IP "\fB\-ftrapv\fR" 4
       
 10136 .IX Item "-ftrapv"
       
 10137 This option generates traps for signed overflow on addition, subtraction,
       
 10138 multiplication operations.
       
 10139 .IP "\fB\-fwrapv\fR" 4
       
 10140 .IX Item "-fwrapv"
       
 10141 This option instructs the compiler to assume that signed arithmetic
       
 10142 overflow of addition, subtraction and multiplication wraps around
       
 10143 using twos-complement representation.  This flag enables some optimizations
       
 10144 and disables other.  This option is enabled by default for the Java
       
 10145 front\-end, as required by the Java language specification.
       
 10146 .IP "\fB\-fexceptions\fR" 4
       
 10147 .IX Item "-fexceptions"
       
 10148 Enable exception handling.  Generates extra code needed to propagate
       
 10149 exceptions.  For some targets, this implies \s-1GCC\s0 will generate frame
       
 10150 unwind information for all functions, which can produce significant data
       
 10151 size overhead, although it does not affect execution.  If you do not
       
 10152 specify this option, \s-1GCC\s0 will enable it by default for languages like
       
 10153 \&\*(C+ which normally require exception handling, and disable it for
       
 10154 languages like C that do not normally require it.  However, you may need
       
 10155 to enable this option when compiling C code that needs to interoperate
       
 10156 properly with exception handlers written in \*(C+.  You may also wish to
       
 10157 disable this option if you are compiling older \*(C+ programs that don't
       
 10158 use exception handling.
       
 10159 .IP "\fB\-fnon\-call\-exceptions\fR" 4
       
 10160 .IX Item "-fnon-call-exceptions"
       
 10161 Generate code that allows trapping instructions to throw exceptions.
       
 10162 Note that this requires platform-specific runtime support that does
       
 10163 not exist everywhere.  Moreover, it only allows \fItrapping\fR
       
 10164 instructions to throw exceptions, i.e. memory references or floating
       
 10165 point instructions.  It does not allow exceptions to be thrown from
       
 10166 arbitrary signal handlers such as \f(CW\*(C`SIGALRM\*(C'\fR.
       
 10167 .IP "\fB\-funwind\-tables\fR" 4
       
 10168 .IX Item "-funwind-tables"
       
 10169 Similar to \fB\-fexceptions\fR, except that it will just generate any needed
       
 10170 static data, but will not affect the generated code in any other way.
       
 10171 You will normally not enable this option; instead, a language processor
       
 10172 that needs this handling would enable it on your behalf.
       
 10173 .IP "\fB\-fasynchronous\-unwind\-tables\fR" 4
       
 10174 .IX Item "-fasynchronous-unwind-tables"
       
 10175 Generate unwind table in dwarf2 format, if supported by target machine.  The
       
 10176 table is exact at each instruction boundary, so it can be used for stack
       
 10177 unwinding from asynchronous events (such as debugger or garbage collector).
       
 10178 .IP "\fB\-fpcc\-struct\-return\fR" 4
       
 10179 .IX Item "-fpcc-struct-return"
       
 10180 Return ``short'' \f(CW\*(C`struct\*(C'\fR and \f(CW\*(C`union\*(C'\fR values in memory like
       
 10181 longer ones, rather than in registers.  This convention is less
       
 10182 efficient, but it has the advantage of allowing intercallability between
       
 10183 GCC-compiled files and files compiled with other compilers, particularly
       
 10184 the Portable C Compiler (pcc).
       
 10185 .Sp
       
 10186 The precise convention for returning structures in memory depends
       
 10187 on the target configuration macros.
       
 10188 .Sp
       
 10189 Short structures and unions are those whose size and alignment match
       
 10190 that of some integer type.
       
 10191 .Sp
       
 10192 \&\fBWarning:\fR code compiled with the \fB\-fpcc\-struct\-return\fR
       
 10193 switch is not binary compatible with code compiled with the
       
 10194 \&\fB\-freg\-struct\-return\fR switch.
       
 10195 Use it to conform to a non-default application binary interface.
       
 10196 .IP "\fB\-freg\-struct\-return\fR" 4
       
 10197 .IX Item "-freg-struct-return"
       
 10198 Return \f(CW\*(C`struct\*(C'\fR and \f(CW\*(C`union\*(C'\fR values in registers when possible.
       
 10199 This is more efficient for small structures than
       
 10200 \&\fB\-fpcc\-struct\-return\fR.
       
 10201 .Sp
       
 10202 If you specify neither \fB\-fpcc\-struct\-return\fR nor
       
 10203 \&\fB\-freg\-struct\-return\fR, \s-1GCC\s0 defaults to whichever convention is
       
 10204 standard for the target.  If there is no standard convention, \s-1GCC\s0
       
 10205 defaults to \fB\-fpcc\-struct\-return\fR, except on targets where \s-1GCC\s0 is
       
 10206 the principal compiler.  In those cases, we can choose the standard, and
       
 10207 we chose the more efficient register return alternative.
       
 10208 .Sp
       
 10209 \&\fBWarning:\fR code compiled with the \fB\-freg\-struct\-return\fR
       
 10210 switch is not binary compatible with code compiled with the
       
 10211 \&\fB\-fpcc\-struct\-return\fR switch.
       
 10212 Use it to conform to a non-default application binary interface.
       
 10213 .IP "\fB\-fshort\-enums\fR" 4
       
 10214 .IX Item "-fshort-enums"
       
 10215 Allocate to an \f(CW\*(C`enum\*(C'\fR type only as many bytes as it needs for the
       
 10216 declared range of possible values.  Specifically, the \f(CW\*(C`enum\*(C'\fR type
       
 10217 will be equivalent to the smallest integer type which has enough room.
       
 10218 .Sp
       
 10219 \&\fBWarning:\fR the \fB\-fshort\-enums\fR switch causes \s-1GCC\s0 to generate
       
 10220 code that is not binary compatible with code generated without that switch.
       
 10221 Use it to conform to a non-default application binary interface.
       
 10222 .IP "\fB\-fshort\-double\fR" 4
       
 10223 .IX Item "-fshort-double"
       
 10224 Use the same size for \f(CW\*(C`double\*(C'\fR as for \f(CW\*(C`float\*(C'\fR.
       
 10225 .Sp
       
 10226 \&\fBWarning:\fR the \fB\-fshort\-double\fR switch causes \s-1GCC\s0 to generate
       
 10227 code that is not binary compatible with code generated without that switch.
       
 10228 Use it to conform to a non-default application binary interface.
       
 10229 .IP "\fB\-fshort\-wchar\fR" 4
       
 10230 .IX Item "-fshort-wchar"
       
 10231 Override the underlying type for \fBwchar_t\fR to be \fBshort
       
 10232 unsigned int\fR instead of the default for the target.  This option is
       
 10233 useful for building programs to run under \s-1WINE\s0.
       
 10234 .Sp
       
 10235 \&\fBWarning:\fR the \fB\-fshort\-wchar\fR switch causes \s-1GCC\s0 to generate
       
 10236 code that is not binary compatible with code generated without that switch.
       
 10237 Use it to conform to a non-default application binary interface.
       
 10238 .IP "\fB\-fshared\-data\fR" 4
       
 10239 .IX Item "-fshared-data"
       
 10240 Requests that the data and non\-\f(CW\*(C`const\*(C'\fR variables of this
       
 10241 compilation be shared data rather than private data.  The distinction
       
 10242 makes sense only on certain operating systems, where shared data is
       
 10243 shared between processes running the same program, while private data
       
 10244 exists in one copy per process.
       
 10245 .IP "\fB\-fno\-common\fR" 4
       
 10246 .IX Item "-fno-common"
       
 10247 In C, allocate even uninitialized global variables in the data section of the
       
 10248 object file, rather than generating them as common blocks.  This has the
       
 10249 effect that if the same variable is declared (without \f(CW\*(C`extern\*(C'\fR) in
       
 10250 two different compilations, you will get an error when you link them.
       
 10251 The only reason this might be useful is if you wish to verify that the
       
 10252 program will work on other systems which always work this way.
       
 10253 .IP "\fB\-fno\-ident\fR" 4
       
 10254 .IX Item "-fno-ident"
       
 10255 Ignore the \fB#ident\fR directive.
       
 10256 .IP "\fB\-finhibit\-size\-directive\fR" 4
       
 10257 .IX Item "-finhibit-size-directive"
       
 10258 Don't output a \f(CW\*(C`.size\*(C'\fR assembler directive, or anything else that
       
 10259 would cause trouble if the function is split in the middle, and the
       
 10260 two halves are placed at locations far apart in memory.  This option is
       
 10261 used when compiling \fIcrtstuff.c\fR; you should not need to use it
       
 10262 for anything else.
       
 10263 .IP "\fB\-fverbose\-asm\fR" 4
       
 10264 .IX Item "-fverbose-asm"
       
 10265 Put extra commentary information in the generated assembly code to
       
 10266 make it more readable.  This option is generally only of use to those
       
 10267 who actually need to read the generated assembly code (perhaps while
       
 10268 debugging the compiler itself).
       
 10269 .Sp
       
 10270 \&\fB\-fno\-verbose\-asm\fR, the default, causes the
       
 10271 extra information to be omitted and is useful when comparing two assembler
       
 10272 files.
       
 10273 .IP "\fB\-fpic\fR" 4
       
 10274 .IX Item "-fpic"
       
 10275 Generate position-independent code (\s-1PIC\s0) suitable for use in a shared
       
 10276 library, if supported for the target machine.  Such code accesses all
       
 10277 constant addresses through a global offset table (\s-1GOT\s0).  The dynamic
       
 10278 loader resolves the \s-1GOT\s0 entries when the program starts (the dynamic
       
 10279 loader is not part of \s-1GCC\s0; it is part of the operating system).  If
       
 10280 the \s-1GOT\s0 size for the linked executable exceeds a machine-specific
       
 10281 maximum size, you get an error message from the linker indicating that
       
 10282 \&\fB\-fpic\fR does not work; in that case, recompile with \fB\-fPIC\fR
       
 10283 instead.  (These maximums are 8k on the \s-1SPARC\s0 and 32k
       
 10284 on the m68k and \s-1RS/6000\s0.  The 386 has no such limit.)
       
 10285 .Sp
       
 10286 Position-independent code requires special support, and therefore works
       
 10287 only on certain machines.  For the 386, \s-1GCC\s0 supports \s-1PIC\s0 for System V
       
 10288 but not for the Sun 386i.  Code generated for the \s-1IBM\s0 \s-1RS/6000\s0 is always
       
 10289 position\-independent.
       
 10290 .IP "\fB\-fPIC\fR" 4
       
 10291 .IX Item "-fPIC"
       
 10292 If supported for the target machine, emit position-independent code,
       
 10293 suitable for dynamic linking and avoiding any limit on the size of the
       
 10294 global offset table.  This option makes a difference on the m68k
       
 10295 and the \s-1SPARC\s0.
       
 10296 .Sp
       
 10297 Position-independent code requires special support, and therefore works
       
 10298 only on certain machines.
       
 10299 .IP "\fB\-fpie\fR" 4
       
 10300 .IX Item "-fpie"
       
 10301 .PD 0
       
 10302 .IP "\fB\-fPIE\fR" 4
       
 10303 .IX Item "-fPIE"
       
 10304 .PD
       
 10305 These options are similar to \fB\-fpic\fR and \fB\-fPIC\fR, but
       
 10306 generated position independent code can be only linked into executables.
       
 10307 Usually these options are used when \fB\-pie\fR \s-1GCC\s0 option will be
       
 10308 used during linking.
       
 10309 .IP "\fB\-ffixed\-\fR\fIreg\fR" 4
       
 10310 .IX Item "-ffixed-reg"
       
 10311 Treat the register named \fIreg\fR as a fixed register; generated code
       
 10312 should never refer to it (except perhaps as a stack pointer, frame
       
 10313 pointer or in some other fixed role).
       
 10314 .Sp
       
 10315 \&\fIreg\fR must be the name of a register.  The register names accepted
       
 10316 are machine-specific and are defined in the \f(CW\*(C`REGISTER_NAMES\*(C'\fR
       
 10317 macro in the machine description macro file.
       
 10318 .Sp
       
 10319 This flag does not have a negative form, because it specifies a
       
 10320 three-way choice.
       
 10321 .IP "\fB\-fcall\-used\-\fR\fIreg\fR" 4
       
 10322 .IX Item "-fcall-used-reg"
       
 10323 Treat the register named \fIreg\fR as an allocable register that is
       
 10324 clobbered by function calls.  It may be allocated for temporaries or
       
 10325 variables that do not live across a call.  Functions compiled this way
       
 10326 will not save and restore the register \fIreg\fR.
       
 10327 .Sp
       
 10328 It is an error to used this flag with the frame pointer or stack pointer.
       
 10329 Use of this flag for other registers that have fixed pervasive roles in
       
 10330 the machine's execution model will produce disastrous results.
       
 10331 .Sp
       
 10332 This flag does not have a negative form, because it specifies a
       
 10333 three-way choice.
       
 10334 .IP "\fB\-fcall\-saved\-\fR\fIreg\fR" 4
       
 10335 .IX Item "-fcall-saved-reg"
       
 10336 Treat the register named \fIreg\fR as an allocable register saved by
       
 10337 functions.  It may be allocated even for temporaries or variables that
       
 10338 live across a call.  Functions compiled this way will save and restore
       
 10339 the register \fIreg\fR if they use it.
       
 10340 .Sp
       
 10341 It is an error to used this flag with the frame pointer or stack pointer.
       
 10342 Use of this flag for other registers that have fixed pervasive roles in
       
 10343 the machine's execution model will produce disastrous results.
       
 10344 .Sp
       
 10345 A different sort of disaster will result from the use of this flag for
       
 10346 a register in which function values may be returned.
       
 10347 .Sp
       
 10348 This flag does not have a negative form, because it specifies a
       
 10349 three-way choice.
       
 10350 .IP "\fB\-fpack\-struct\fR" 4
       
 10351 .IX Item "-fpack-struct"
       
 10352 Pack all structure members together without holes.
       
 10353 .Sp
       
 10354 \&\fBWarning:\fR the \fB\-fpack\-struct\fR switch causes \s-1GCC\s0 to generate
       
 10355 code that is not binary compatible with code generated without that switch.
       
 10356 Additionally, it makes the code suboptimal.
       
 10357 Use it to conform to a non-default application binary interface.
       
 10358 .IP "\fB\-finstrument\-functions\fR" 4
       
 10359 .IX Item "-finstrument-functions"
       
 10360 Generate instrumentation calls for entry and exit to functions.  Just
       
 10361 after function entry and just before function exit, the following
       
 10362 profiling functions will be called with the address of the current
       
 10363 function and its call site.  (On some platforms,
       
 10364 \&\f(CW\*(C`_\|_builtin_return_address\*(C'\fR does not work beyond the current
       
 10365 function, so the call site information may not be available to the
       
 10366 profiling functions otherwise.)
       
 10367 .Sp
       
 10368 .Vb 4
       
 10369 \&        void __cyg_profile_func_enter (void *this_fn,
       
 10370 \&                                       void *call_site);
       
 10371 \&        void __cyg_profile_func_exit  (void *this_fn,
       
 10372 \&                                       void *call_site);
       
 10373 .Ve
       
 10374 .Sp
       
 10375 The first argument is the address of the start of the current function,
       
 10376 which may be looked up exactly in the symbol table.
       
 10377 .Sp
       
 10378 This currently disables function inlining.  This restriction is
       
 10379 expected to be removed in future releases.
       
 10380 .Sp
       
 10381 A function may be given the attribute \f(CW\*(C`no_instrument_function\*(C'\fR, in
       
 10382 which case this instrumentation will not be done.  This can be used, for
       
 10383 example, for the profiling functions listed above, high-priority
       
 10384 interrupt routines, and any functions from which the profiling functions
       
 10385 cannot safely be called (perhaps signal handlers, if the profiling
       
 10386 routines generate output or allocate memory).
       
 10387 .IP "\fB\-fstack\-check\fR" 4
       
 10388 .IX Item "-fstack-check"
       
 10389 Generate code to verify that you do not go beyond the boundary of the
       
 10390 stack.  You should specify this flag if you are running in an
       
 10391 environment with multiple threads, but only rarely need to specify it in
       
 10392 a single-threaded environment since stack overflow is automatically
       
 10393 detected on nearly all systems if there is only one stack.
       
 10394 .Sp
       
 10395 Note that this switch does not actually cause checking to be done; the
       
 10396 operating system must do that.  The switch causes generation of code
       
 10397 to ensure that the operating system sees the stack being extended.
       
 10398 .IP "\fB\-fstack\-limit\-register=\fR\fIreg\fR" 4
       
 10399 .IX Item "-fstack-limit-register=reg"
       
 10400 .PD 0
       
 10401 .IP "\fB\-fstack\-limit\-symbol=\fR\fIsym\fR" 4
       
 10402 .IX Item "-fstack-limit-symbol=sym"
       
 10403 .IP "\fB\-fno\-stack\-limit\fR" 4
       
 10404 .IX Item "-fno-stack-limit"
       
 10405 .PD
       
 10406 Generate code to ensure that the stack does not grow beyond a certain value,
       
 10407 either the value of a register or the address of a symbol.  If the stack
       
 10408 would grow beyond the value, a signal is raised.  For most targets,
       
 10409 the signal is raised before the stack overruns the boundary, so
       
 10410 it is possible to catch the signal without taking special precautions.
       
 10411 .Sp
       
 10412 For instance, if the stack starts at absolute address \fB0x80000000\fR
       
 10413 and grows downwards, you can use the flags
       
 10414 \&\fB\-fstack\-limit\-symbol=_\|_stack_limit\fR and
       
 10415 \&\fB\-Wl,\-\-defsym,_\|_stack_limit=0x7ffe0000\fR to enforce a stack limit
       
 10416 of 128KB.  Note that this may only work with the \s-1GNU\s0 linker.
       
 10417 .IP "\fB\-fargument\-alias\fR" 4
       
 10418 .IX Item "-fargument-alias"
       
 10419 .PD 0
       
 10420 .IP "\fB\-fargument\-noalias\fR" 4
       
 10421 .IX Item "-fargument-noalias"
       
 10422 .IP "\fB\-fargument\-noalias\-global\fR" 4
       
 10423 .IX Item "-fargument-noalias-global"
       
 10424 .PD
       
 10425 Specify the possible relationships among parameters and between
       
 10426 parameters and global data.
       
 10427 .Sp
       
 10428 \&\fB\-fargument\-alias\fR specifies that arguments (parameters) may
       
 10429 alias each other and may alias global storage.\fB\-fargument\-noalias\fR specifies that arguments do not alias
       
 10430 each other, but may alias global storage.\fB\-fargument\-noalias\-global\fR specifies that arguments do not
       
 10431 alias each other and do not alias global storage.
       
 10432 .Sp
       
 10433 Each language will automatically use whatever option is required by
       
 10434 the language standard.  You should not need to use these options yourself.
       
 10435 .IP "\fB\-fleading\-underscore\fR" 4
       
 10436 .IX Item "-fleading-underscore"
       
 10437 This option and its counterpart, \fB\-fno\-leading\-underscore\fR, forcibly
       
 10438 change the way C symbols are represented in the object file.  One use
       
 10439 is to help link with legacy assembly code.
       
 10440 .Sp
       
 10441 \&\fBWarning:\fR the \fB\-fleading\-underscore\fR switch causes \s-1GCC\s0 to
       
 10442 generate code that is not binary compatible with code generated without that
       
 10443 switch.  Use it to conform to a non-default application binary interface.
       
 10444 Not all targets provide complete support for this switch.
       
 10445 .IP "\fB\-ftls\-model=\fR\fImodel\fR" 4
       
 10446 .IX Item "-ftls-model=model"
       
 10447 Alter the thread-local storage model to be used.
       
 10448 The \fImodel\fR argument should be one of \f(CW\*(C`global\-dynamic\*(C'\fR,
       
 10449 \&\f(CW\*(C`local\-dynamic\*(C'\fR, \f(CW\*(C`initial\-exec\*(C'\fR or \f(CW\*(C`local\-exec\*(C'\fR.
       
 10450 .Sp
       
 10451 The default without \fB\-fpic\fR is \f(CW\*(C`initial\-exec\*(C'\fR; with
       
 10452 \&\fB\-fpic\fR the default is \f(CW\*(C`global\-dynamic\*(C'\fR.
       
 10453 .SH "ENVIRONMENT"
       
 10454 .IX Header "ENVIRONMENT"
       
 10455 This section describes several environment variables that affect how \s-1GCC\s0
       
 10456 operates.  Some of them work by specifying directories or prefixes to use
       
 10457 when searching for various kinds of files.  Some are used to specify other
       
 10458 aspects of the compilation environment.
       
 10459 .PP
       
 10460 Note that you can also specify places to search using options such as
       
 10461 \&\fB\-B\fR, \fB\-I\fR and \fB\-L\fR.  These
       
 10462 take precedence over places specified using environment variables, which
       
 10463 in turn take precedence over those specified by the configuration of \s-1GCC\s0.
       
 10464 .IP "\fB\s-1LANG\s0\fR" 4
       
 10465 .IX Item "LANG"
       
 10466 .PD 0
       
 10467 .IP "\fB\s-1LC_CTYPE\s0\fR" 4
       
 10468 .IX Item "LC_CTYPE"
       
 10469 .IP "\fB\s-1LC_MESSAGES\s0\fR" 4
       
 10470 .IX Item "LC_MESSAGES"
       
 10471 .IP "\fB\s-1LC_ALL\s0\fR" 4
       
 10472 .IX Item "LC_ALL"
       
 10473 .PD
       
 10474 These environment variables control the way that \s-1GCC\s0 uses
       
 10475 localization information that allow \s-1GCC\s0 to work with different
       
 10476 national conventions.  \s-1GCC\s0 inspects the locale categories
       
 10477 \&\fB\s-1LC_CTYPE\s0\fR and \fB\s-1LC_MESSAGES\s0\fR if it has been configured to do
       
 10478 so.  These locale categories can be set to any value supported by your
       
 10479 installation.  A typical value is \fBen_GB.UTF\-8\fR for English in the United
       
 10480 Kingdom encoded in \s-1UTF\-8\s0.
       
 10481 .Sp
       
 10482 The \fB\s-1LC_CTYPE\s0\fR environment variable specifies character
       
 10483 classification.  \s-1GCC\s0 uses it to determine the character boundaries in
       
 10484 a string; this is needed for some multibyte encodings that contain quote
       
 10485 and escape characters that would otherwise be interpreted as a string
       
 10486 end or escape.
       
 10487 .Sp
       
 10488 The \fB\s-1LC_MESSAGES\s0\fR environment variable specifies the language to
       
 10489 use in diagnostic messages.
       
 10490 .Sp
       
 10491 If the \fB\s-1LC_ALL\s0\fR environment variable is set, it overrides the value
       
 10492 of \fB\s-1LC_CTYPE\s0\fR and \fB\s-1LC_MESSAGES\s0\fR; otherwise, \fB\s-1LC_CTYPE\s0\fR
       
 10493 and \fB\s-1LC_MESSAGES\s0\fR default to the value of the \fB\s-1LANG\s0\fR
       
 10494 environment variable.  If none of these variables are set, \s-1GCC\s0
       
 10495 defaults to traditional C English behavior.
       
 10496 .IP "\fB\s-1TMPDIR\s0\fR" 4
       
 10497 .IX Item "TMPDIR"
       
 10498 If \fB\s-1TMPDIR\s0\fR is set, it specifies the directory to use for temporary
       
 10499 files.  \s-1GCC\s0 uses temporary files to hold the output of one stage of
       
 10500 compilation which is to be used as input to the next stage: for example,
       
 10501 the output of the preprocessor, which is the input to the compiler
       
 10502 proper.
       
 10503 .IP "\fB\s-1GCC_EXEC_PREFIX\s0\fR" 4
       
 10504 .IX Item "GCC_EXEC_PREFIX"
       
 10505 If \fB\s-1GCC_EXEC_PREFIX\s0\fR is set, it specifies a prefix to use in the
       
 10506 names of the subprograms executed by the compiler.  No slash is added
       
 10507 when this prefix is combined with the name of a subprogram, but you can
       
 10508 specify a prefix that ends with a slash if you wish.
       
 10509 .Sp
       
 10510 If \fB\s-1GCC_EXEC_PREFIX\s0\fR is not set, \s-1GCC\s0 will attempt to figure out
       
 10511 an appropriate prefix to use based on the pathname it was invoked with.
       
 10512 .Sp
       
 10513 If \s-1GCC\s0 cannot find the subprogram using the specified prefix, it
       
 10514 tries looking in the usual places for the subprogram.
       
 10515 .Sp
       
 10516 The default value of \fB\s-1GCC_EXEC_PREFIX\s0\fR is
       
 10517 \&\fI\fIprefix\fI/lib/gcc/\fR where \fIprefix\fR is the value
       
 10518 of \f(CW\*(C`prefix\*(C'\fR when you ran the \fIconfigure\fR script.
       
 10519 .Sp
       
 10520 Other prefixes specified with \fB\-B\fR take precedence over this prefix.
       
 10521 .Sp
       
 10522 This prefix is also used for finding files such as \fIcrt0.o\fR that are
       
 10523 used for linking.
       
 10524 .Sp
       
 10525 In addition, the prefix is used in an unusual way in finding the
       
 10526 directories to search for header files.  For each of the standard
       
 10527 directories whose name normally begins with \fB/usr/local/lib/gcc\fR
       
 10528 (more precisely, with the value of \fB\s-1GCC_INCLUDE_DIR\s0\fR), \s-1GCC\s0 tries
       
 10529 replacing that beginning with the specified prefix to produce an
       
 10530 alternate directory name.  Thus, with \fB\-Bfoo/\fR, \s-1GCC\s0 will search
       
 10531 \&\fIfoo/bar\fR where it would normally search \fI/usr/local/lib/bar\fR.
       
 10532 These alternate directories are searched first; the standard directories
       
 10533 come next.
       
 10534 .IP "\fB\s-1COMPILER_PATH\s0\fR" 4
       
 10535 .IX Item "COMPILER_PATH"
       
 10536 The value of \fB\s-1COMPILER_PATH\s0\fR is a colon-separated list of
       
 10537 directories, much like \fB\s-1PATH\s0\fR.  \s-1GCC\s0 tries the directories thus
       
 10538 specified when searching for subprograms, if it can't find the
       
 10539 subprograms using \fB\s-1GCC_EXEC_PREFIX\s0\fR.
       
 10540 .IP "\fB\s-1LIBRARY_PATH\s0\fR" 4
       
 10541 .IX Item "LIBRARY_PATH"
       
 10542 The value of \fB\s-1LIBRARY_PATH\s0\fR is a colon-separated list of
       
 10543 directories, much like \fB\s-1PATH\s0\fR.  When configured as a native compiler,
       
 10544 \&\s-1GCC\s0 tries the directories thus specified when searching for special
       
 10545 linker files, if it can't find them using \fB\s-1GCC_EXEC_PREFIX\s0\fR.  Linking
       
 10546 using \s-1GCC\s0 also uses these directories when searching for ordinary
       
 10547 libraries for the \fB\-l\fR option (but directories specified with
       
 10548 \&\fB\-L\fR come first).
       
 10549 .IP "\fB\s-1LANG\s0\fR" 4
       
 10550 .IX Item "LANG"
       
 10551 This variable is used to pass locale information to the compiler.  One way in
       
 10552 which this information is used is to determine the character set to be used
       
 10553 when character literals, string literals and comments are parsed in C and \*(C+.
       
 10554 When the compiler is configured to allow multibyte characters,
       
 10555 the following values for \fB\s-1LANG\s0\fR are recognized:
       
 10556 .RS 4
       
 10557 .IP "\fBC\-JIS\fR" 4
       
 10558 .IX Item "C-JIS"
       
 10559 Recognize \s-1JIS\s0 characters.
       
 10560 .IP "\fBC\-SJIS\fR" 4
       
 10561 .IX Item "C-SJIS"
       
 10562 Recognize \s-1SJIS\s0 characters.
       
 10563 .IP "\fBC\-EUCJP\fR" 4
       
 10564 .IX Item "C-EUCJP"
       
 10565 Recognize \s-1EUCJP\s0 characters.
       
 10566 .RE
       
 10567 .RS 4
       
 10568 .Sp
       
 10569 If \fB\s-1LANG\s0\fR is not defined, or if it has some other value, then the
       
 10570 compiler will use mblen and mbtowc as defined by the default locale to
       
 10571 recognize and translate multibyte characters.
       
 10572 .RE
       
 10573 .PP
       
 10574 Some additional environments variables affect the behavior of the
       
 10575 preprocessor.
       
 10576 .IP "\fB\s-1CPATH\s0\fR" 4
       
 10577 .IX Item "CPATH"
       
 10578 .PD 0
       
 10579 .IP "\fBC_INCLUDE_PATH\fR" 4
       
 10580 .IX Item "C_INCLUDE_PATH"
       
 10581 .IP "\fB\s-1CPLUS_INCLUDE_PATH\s0\fR" 4
       
 10582 .IX Item "CPLUS_INCLUDE_PATH"
       
 10583 .IP "\fB\s-1OBJC_INCLUDE_PATH\s0\fR" 4
       
 10584 .IX Item "OBJC_INCLUDE_PATH"
       
 10585 .PD
       
 10586 Each variable's value is a list of directories separated by a special
       
 10587 character, much like \fB\s-1PATH\s0\fR, in which to look for header files.
       
 10588 The special character, \f(CW\*(C`PATH_SEPARATOR\*(C'\fR, is target-dependent and
       
 10589 determined at \s-1GCC\s0 build time.  For Microsoft Windows-based targets it is a
       
 10590 semicolon, and for almost all other targets it is a colon.
       
 10591 .Sp
       
 10592 \&\fB\s-1CPATH\s0\fR specifies a list of directories to be searched as if
       
 10593 specified with \fB\-I\fR, but after any paths given with \fB\-I\fR
       
 10594 options on the command line.  This environment variable is used
       
 10595 regardless of which language is being preprocessed.
       
 10596 .Sp
       
 10597 The remaining environment variables apply only when preprocessing the
       
 10598 particular language indicated.  Each specifies a list of directories
       
 10599 to be searched as if specified with \fB\-isystem\fR, but after any
       
 10600 paths given with \fB\-isystem\fR options on the command line.
       
 10601 .Sp
       
 10602 In all these variables, an empty element instructs the compiler to
       
 10603 search its current working directory.  Empty elements can appear at the
       
 10604 beginning or end of a path.  For instance, if the value of
       
 10605 \&\fB\s-1CPATH\s0\fR is \f(CW\*(C`:/special/include\*(C'\fR, that has the same
       
 10606 effect as \fB\-I.\ \-I/special/include\fR.
       
 10607 .IP "\fB\s-1DEPENDENCIES_OUTPUT\s0\fR" 4
       
 10608 .IX Item "DEPENDENCIES_OUTPUT"
       
 10609 If this variable is set, its value specifies how to output
       
 10610 dependencies for Make based on the non-system header files processed
       
 10611 by the compiler.  System header files are ignored in the dependency
       
 10612 output.
       
 10613 .Sp
       
 10614 The value of \fB\s-1DEPENDENCIES_OUTPUT\s0\fR can be just a file name, in
       
 10615 which case the Make rules are written to that file, guessing the target
       
 10616 name from the source file name.  Or the value can have the form
       
 10617 \&\fIfile\fR\fB \fR\fItarget\fR, in which case the rules are written to
       
 10618 file \fIfile\fR using \fItarget\fR as the target name.
       
 10619 .Sp
       
 10620 In other words, this environment variable is equivalent to combining
       
 10621 the options \fB\-MM\fR and \fB\-MF\fR,
       
 10622 with an optional \fB\-MT\fR switch too.
       
 10623 .IP "\fB\s-1SUNPRO_DEPENDENCIES\s0\fR" 4
       
 10624 .IX Item "SUNPRO_DEPENDENCIES"
       
 10625 This variable is the same as \fB\s-1DEPENDENCIES_OUTPUT\s0\fR (see above),
       
 10626 except that system header files are not ignored, so it implies
       
 10627 \&\fB\-M\fR rather than \fB\-MM\fR.  However, the dependence on the
       
 10628 main input file is omitted.
       
 10629 .SH "BUGS"
       
 10630 .IX Header "BUGS"
       
 10631 For instructions on reporting bugs, see
       
 10632 <\fBhttp://gcc.gnu.org/bugs.html\fR>.  Use of the \fBgccbug\fR
       
 10633 script to report bugs is recommended.
       
 10634 .SH "FOOTNOTES"
       
 10635 .IX Header "FOOTNOTES"
       
 10636 .IP "1." 4
       
 10637 On some systems, \fBgcc \-shared\fR
       
 10638 needs to build supplementary stub code for constructors to work.  On
       
 10639 multi-libbed systems, \fBgcc \-shared\fR must select the correct support
       
 10640 libraries to link against.  Failing to supply the correct flags may lead
       
 10641 to subtle defects.  Supplying them in cases where they are not necessary
       
 10642 is innocuous.
       
 10643 .SH "SEE ALSO"
       
 10644 .IX Header "SEE ALSO"
       
 10645 \&\fIgpl\fR\|(7), \fIgfdl\fR\|(7), \fIfsf\-funding\fR\|(7),
       
 10646 \&\fIcpp\fR\|(1), \fIgcov\fR\|(1), \fIg77\fR\|(1), \fIas\fR\|(1), \fIld\fR\|(1), \fIgdb\fR\|(1), \fIadb\fR\|(1), \fIdbx\fR\|(1), \fIsdb\fR\|(1)
       
 10647 and the Info entries for \fIgcc\fR, \fIcpp\fR, \fIg77\fR, \fIas\fR,
       
 10648 \&\fIld\fR, \fIbinutils\fR and \fIgdb\fR.
       
 10649 .SH "AUTHOR"
       
 10650 .IX Header "AUTHOR"
       
 10651 See the Info entry for \fBgcc\fR, or
       
 10652 <\fBhttp://gcc.gnu.org/onlinedocs/gcc/Contributors.html\fR>,
       
 10653 for contributors to \s-1GCC\s0.
       
 10654 .SH "COPYRIGHT"
       
 10655 .IX Header "COPYRIGHT"
       
 10656 Copyright (c) 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997,
       
 10657 1998, 1999, 2000, 2001, 2002, 2003, 2004 Free Software Foundation, Inc.
       
 10658 .PP
       
 10659 Permission is granted to copy, distribute and/or modify this document
       
 10660 under the terms of the \s-1GNU\s0 Free Documentation License, Version 1.2 or
       
 10661 any later version published by the Free Software Foundation; with the
       
 10662 Invariant Sections being ``\s-1GNU\s0 General Public License'' and ``Funding
       
 10663 Free Software'', the Front-Cover texts being (a) (see below), and with
       
 10664 the Back-Cover Texts being (b) (see below).  A copy of the license is
       
 10665 included in the \fIgfdl\fR\|(7) man page.
       
 10666 .PP
       
 10667 (a) The \s-1FSF\s0's Front-Cover Text is:
       
 10668 .PP
       
 10669 .Vb 1
       
 10670 \&     A GNU Manual
       
 10671 .Ve
       
 10672 .PP
       
 10673 (b) The \s-1FSF\s0's Back-Cover Text is:
       
 10674 .PP
       
 10675 .Vb 3
       
 10676 \&     You have freedom to copy and modify this GNU Manual, like GNU
       
 10677 \&     software.  Copies published by the Free Software Foundation raise
       
 10678 \&     funds for GNU development.
       
 10679 .Ve