equal
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replaced
18 # |
18 # |
19 # CDDL HEADER END |
19 # CDDL HEADER END |
20 # |
20 # |
21 |
21 |
22 # |
22 # |
23 # Copyright (c) 2015, 2016, Oracle and/or its affiliates. All rights reserved. |
23 # Copyright (c) 2015, 2017, Oracle and/or its affiliates. All rights reserved. |
24 # |
24 # |
25 |
25 |
26 include ../../../make-rules/shared-macros.mk |
26 include ../../../make-rules/shared-macros.mk |
27 |
27 |
28 COMPONENT_NAME= urllib3 |
28 COMPONENT_NAME= urllib3 |
32 COMPONENT_ARCHIVE_HASH= \ |
32 COMPONENT_ARCHIVE_HASH= \ |
33 sha256:d0a1dc60433f7e9b90b4f085f1d45753174b4594558b29eda0009abe0b82da4c |
33 sha256:d0a1dc60433f7e9b90b4f085f1d45753174b4594558b29eda0009abe0b82da4c |
34 COMPONENT_ARCHIVE_URL= $(call pypi_url) |
34 COMPONENT_ARCHIVE_URL= $(call pypi_url) |
35 COMPONENT_PROJECT_URL= https://github.com/shazow/urllib3 |
35 COMPONENT_PROJECT_URL= https://github.com/shazow/urllib3 |
36 COMPONENT_BUGDB= python-mod/urllib3 |
36 COMPONENT_BUGDB= python-mod/urllib3 |
|
37 COMPONENT_ANITYA_ID= 4078 |
37 |
38 |
38 TPNO= 28746 |
39 TPNO= 28746 |
39 |
40 |
40 include $(WS_MAKE_RULES)/prep.mk |
41 include $(WS_MAKE_RULES)/prep.mk |
41 include $(WS_MAKE_RULES)/setup.py.mk |
42 include $(WS_MAKE_RULES)/setup.py.mk |