components/tidy/Makefile
changeset 3643 1a4ba329c762
parent 2225 f064d3d3190d
child 3817 30b42c38bbc4
equal deleted inserted replaced
3642:41b777a03942 3643:1a4ba329c762
    18 #
    18 #
    19 # CDDL HEADER END
    19 # CDDL HEADER END
    20 #
    20 #
    21 
    21 
    22 #
    22 #
    23 # Copyright (c) 2011, 2014, Oracle and/or its affiliates. All rights reserved.
    23 # Copyright (c) 2011, 2015, Oracle and/or its affiliates. All rights reserved.
    24 #
    24 #
    25 
    25 
    26 include ../../make-rules/shared-macros.mk
    26 include ../../make-rules/shared-macros.mk
    27 
    27 
    28 COMPONENT_NAME=		tidy
    28 COMPONENT_NAME=		tidy
    61 PROTODOCDIR=$(PROTOUSRSHAREDIR)/doc/tidy
    61 PROTODOCDIR=$(PROTOUSRSHAREDIR)/doc/tidy
    62 
    62 
    63 $(PROTODOCDIR):
    63 $(PROTODOCDIR):
    64 	$(MKDIR) $@
    64 	$(MKDIR) $@
    65 
    65 
       
    66 COMPONENT_TEST_DIR =    $(@D)/test
       
    67 COMPONENT_TEST_CMD =	./testall.sh
       
    68 COMPONENT_TEST_TARGETS =
       
    69 
       
    70 # Master test results are the same for both 32-bit and 64-bit, so override
       
    71 # here, rather than create multiple identical master files.
       
    72 COMPONENT_TEST_MASTER = $(COMPONENT_TEST_RESULTS_DIR)/results-all.master
       
    73 
    66 ASLR_MODE = $(ASLR_ENABLE)
    74 ASLR_MODE = $(ASLR_ENABLE)
    67 
    75 
    68 # common targets
    76 # common targets
    69 configure:	$(CONFIGURE_32_and_64)
    77 configure:	$(CONFIGURE_32_and_64)
    70 
    78