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1 # |
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2 # This file addds inline T4 instruction support to OpenSSL upstream code. |
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3 # |
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4 Index: Configure |
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5 =================================================================== |
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6 diff -ru openssl-1.0.1e/Configure openssl-1.0.1e/Configure |
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7 --- openssl-1.0.1e/Configure 2011-05-24 17:02:24.000000000 -0700 |
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8 +++ openssl-1.0.1e/Configure 2011-07-27 10:48:17.817470000 -0700 |
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9 @@ -135,7 +135,7 @@ |
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10 |
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11 my $x86_64_asm="x86_64cpuid.o:x86_64-gcc.o x86_64-mont.o x86_64-mont5.o x86_64-gf2m.o modexp512-x86_64.o::aes-x86_64.o vpaes-x86_64.o bsaes-x86_64.o aesni-x86_64.o aesni-sha1-x86_64.o::md5-x86_64.o:sha1-x86_64.o sha256-x86_64.o sha512-x86_64.o::rc4-x86_64.o rc4-md5-x86_64.o:::wp-x86_64.o:cmll-x86_64.o cmll_misc.o:ghash-x86_64.o:"; |
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12 my $ia64_asm="ia64cpuid.o:bn-ia64.o ia64-mont.o::aes_core.o aes_cbc.o aes-ia64.o::md5-ia64.o:sha1-ia64.o sha256-ia64.o sha512-ia64.o::rc4-ia64.o rc4_skey.o:::::ghash-ia64.o::void"; |
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13 -my $sparcv9_asm="sparcv9cap.o sparccpuid.o:bn-sparcv9.o sparcv9-mont.o sparcv9a-mont.o:des_enc-sparc.o fcrypt_b.o:aes_core.o aes_cbc.o aes-sparcv9.o:::sha1-sparcv9.o sha256-sparcv9.o sha512-sparcv9.o:::::::ghash-sparcv9.o::void"; |
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14 +my $sparcv9_asm="sparcv9cap.o sparccpuid.o:bn-sparcv9.o sparcv9-mont.o sparcv9a-mont.o:des_enc-sparc.o fcrypt_b.o:aes_core.o aes_cbc.o aes-sparcv9.o::md5-sparcv9.o:sha1-sparcv9.o sha256-sparcv9.o sha512-sparcv9.o:::::::ghash-sparcv9.o::void"; |
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15 my $sparcv8_asm=":sparcv8.o:des_enc-sparc.o fcrypt_b.o:::::::::::::void"; |
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16 my $alpha_asm="alphacpuid.o:bn_asm.o alpha-mont.o:::::sha1-alpha.o:::::::ghash-alpha.o::void"; |
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17 my $mips32_asm=":bn-mips.o::aes_cbc.o aes-mips.o:::sha1-mips.o sha256-mips.o::::::::"; |
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18 Index: crypto/sparccpuid.S |
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19 =================================================================== |
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20 diff -ru openssl-1.0.1e/crypto/sparccpuid.S openssl-1.0.1e/crypto/sparccpuid.S |
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21 --- openssl-1.0.1e/crypto/sparccpuid.S 2011-05-24 17:02:24.000000000 -0700 |
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22 +++ openssl-1.0.1e/crypto/sparccpuid.S 2011-07-27 10:48:17.817470000 -0700 |
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23 @@ -251,6 +251,11 @@ |
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24 ! UltraSPARC IIe 7 |
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25 ! UltraSPARC III 7 |
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26 ! UltraSPARC T1 24 |
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27 +! SPARC T4 65(*) |
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28 +! |
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29 +! (*) result has lesser to do with VIS instruction latencies, rdtick |
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30 +! appears that slow, but it does the trick in sense that FP and |
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31 +! VIS code paths are still slower than integer-only ones. |
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32 ! |
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33 ! Numbers for T2 and SPARC64 V-VII are more than welcomed. |
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34 ! |
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35 @@ -260,6 +265,8 @@ |
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36 .global _sparcv9_vis1_instrument |
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37 .align 8 |
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38 _sparcv9_vis1_instrument: |
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39 + .word 0x81b00d80 !fxor %f0,%f0,%f0 |
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40 + .word 0x85b08d82 !fxor %f2,%f2,%f2 |
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41 .word 0x91410000 !rd %tick,%o0 |
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42 .word 0x81b00d80 !fxor %f0,%f0,%f0 |
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43 .word 0x85b08d82 !fxor %f2,%f2,%f2 |
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44 @@ -314,6 +321,30 @@ |
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45 .type _sparcv9_fmadd_probe,#function |
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46 .size _sparcv9_fmadd_probe,.-_sparcv9_fmadd_probe |
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47 |
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48 +.global _sparcv9_rdcfr |
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49 +.align 8 |
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50 +_sparcv9_rdcfr: |
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51 + retl |
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52 + .word 0x91468000 !rd %asr26,%o0 |
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53 +.type _sparcv9_rdcfr,#function |
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54 +.size _sparcv9_rdcfr,.-_sparcv9_rdcfr |
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55 + |
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56 +.global _sparcv9_vis3_probe |
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57 +.align 8 |
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58 +_sparcv9_vis3_probe: |
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59 + retl |
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60 + .word 0x81b022a0 !xmulx %g0,%g0,%g0 |
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61 +.type _sparcv9_vis3_probe,#function |
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62 +.size _sparcv9_vis3_probe,.-_sparcv9_vis3_probe |
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63 + |
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64 +.global _sparcv9_random |
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65 +.align 8 |
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66 +_sparcv9_random: |
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67 + retl |
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68 + .word 0x91b002a0 !random %o0 |
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69 +.type _sparcv9_random,#function |
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70 +.size _sparcv9_random,.-_sparcv9_vis3_probe |
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71 + |
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72 .global OPENSSL_cleanse |
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73 .align 32 |
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74 OPENSSL_cleanse: |
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75 |
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76 Index: crypto/sparcv9cap.c |
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77 =================================================================== |
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78 diff -ru openssl-1.0.1e/crypto/sparcv9cap.c openssl-1.0.1e/crypto/sparcv9cap.c |
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79 --- openssl-1.0.1e/crypto/sparcv9cap.c 2011-05-24 17:02:24.000000000 -0700 |
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80 +++ openssl-1.0.1e/crypto/sparcv9cap.c 2011-07-27 10:48:17.817470000 -0700 |
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81 @@ -6,17 +6,12 @@ |
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82 #include <sys/time.h> |
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83 #include <openssl/bn.h> |
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84 |
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85 -#define SPARCV9_TICK_PRIVILEGED (1<<0) |
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86 -#define SPARCV9_PREFER_FPU (1<<1) |
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87 -#define SPARCV9_VIS1 (1<<2) |
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88 -#define SPARCV9_VIS2 (1<<3) /* reserved */ |
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89 -#define SPARCV9_FMADD (1<<4) /* reserved for SPARC64 V */ |
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90 +#include "sparc_arch.h" |
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91 |
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92 -#ifndef _BOOT |
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93 -static int OPENSSL_sparcv9cap_P=SPARCV9_TICK_PRIVILEGED; |
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94 -#else |
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95 -static int OPENSSL_sparcv9cap_P = SPARCV9_VIS1; |
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96 +#if defined(__GNUC__) && defined(__linux) |
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97 +__attribute__((visibility("hidden"))) |
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98 #endif |
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99 +unsigned int OPENSSL_sparcv9cap_P[2]={SPARCV9_TICK_PRIVILEGED,0}; |
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100 |
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101 int bn_mul_mont(BN_ULONG *rp, const BN_ULONG *ap, const BN_ULONG *bp, const BN_ULONG *np,const BN_ULONG *n0, int num) |
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102 { |
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103 @@ -24,7 +19,7 @@ |
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104 int bn_mul_mont_int(BN_ULONG *rp, const BN_ULONG *ap, const BN_ULONG *bp, const BN_ULONG *np,const BN_ULONG *n0, int num); |
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105 |
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106 if (num>=8 && !(num&1) && |
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107 - (OPENSSL_sparcv9cap_P&(SPARCV9_PREFER_FPU|SPARCV9_VIS1)) == |
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108 + (OPENSSL_sparcv9cap_P[0]&(SPARCV9_PREFER_FPU|SPARCV9_VIS1)) == |
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109 (SPARCV9_PREFER_FPU|SPARCV9_VIS1)) |
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110 return bn_mul_mont_fpu(rp,ap,bp,np,n0,num); |
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111 else |
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112 @@ -36,11 +31,15 @@ |
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113 unsigned long _sparcv9_vis1_instrument(void); |
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114 void _sparcv9_vis2_probe(void); |
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115 void _sparcv9_fmadd_probe(void); |
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116 +unsigned long _sparcv9_rdcfr(void); |
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117 +void _sparcv9_vis3_probe(void); |
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118 +unsigned long _sparcv9_random(void); |
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119 +size_t _sparcv9_vis1_instrument_bus(unsigned int *,size_t); |
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120 +size_t _sparcv8_vis1_instrument_bus2(unsigned int *,size_t,size_t); |
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121 |
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122 -#ifndef _BOOT |
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123 unsigned long OPENSSL_rdtsc(void) |
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124 { |
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125 - if (OPENSSL_sparcv9cap_P&SPARCV9_TICK_PRIVILEGED) |
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126 + if (OPENSSL_sparcv9cap_P[0]&SPARCV9_TICK_PRIVILEGED) |
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127 #if defined(__sun) && defined(__SVR4) |
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128 return gethrtime(); |
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129 #else |
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130 @@ -49,19 +48,26 @@ |
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131 else |
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132 return _sparcv9_rdtick(); |
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133 } |
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134 -#endif |
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135 |
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136 -#if defined(_BOOT) |
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137 -/* |
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138 - * Hardcoding sparc capabilities for wanboot. |
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139 - * Older CPUs are EOLed anyway. |
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140 - */ |
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141 -void OPENSSL_cpuid_setup(void) |
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142 +size_t OPENSSL_instrument_bus(unsigned int *out,size_t cnt) |
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143 { |
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144 - OPENSSL_sparcv9cap_P = SPARCV9_VIS1; |
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145 + if (OPENSSL_sparcv9cap_P[0]&(SPARCV9_TICK_PRIVILEGED|SPARCV9_BLK) == |
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146 + SPARCV9_BLK) |
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147 + return _sparcv9_vis1_instrument_bus(out,cnt); |
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148 + else |
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149 + return 0; |
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150 } |
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151 |
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152 -#elif 0 && defined(__sun) && defined(__SVR4) |
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153 +size_t OPENSSL_instrument_bus2(unsigned int *out,size_t cnt,size_t max) |
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154 + { |
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155 + if (OPENSSL_sparcv9cap_P[0]&(SPARCV9_TICK_PRIVILEGED|SPARCV9_BLK) == |
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156 + SPARCV9_BLK) |
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157 + return _sparcv9_vis1_instrument_bus2(out,cnt,max); |
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158 + else |
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159 + return 0; |
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160 + } |
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161 + |
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162 +#if 0 && defined(__sun) && defined(__SVR4) |
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163 /* This code path is disabled, because of incompatibility of |
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164 * libdevinfo.so.1 and libmalloc.so.1 (see below for details) |
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165 */ |
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166 @@ -85,11 +91,11 @@ |
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167 if (!strcmp (name,"SUNW,UltraSPARC") || |
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168 !strncmp(name,"SUNW,UltraSPARC-I",17)) /* covers II,III,IV */ |
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169 { |
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170 - OPENSSL_sparcv9cap_P |= SPARCV9_PREFER_FPU|SPARCV9_VIS1; |
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171 + OPENSSL_sparcv9cap_P[0] |= SPARCV9_PREFER_FPU|SPARCV9_VIS1; |
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172 |
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173 /* %tick is privileged only on UltraSPARC-I/II, but not IIe */ |
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174 if (name[14]!='\0' && name[17]!='\0' && name[18]!='\0') |
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175 - OPENSSL_sparcv9cap_P &= ~SPARCV9_TICK_PRIVILEGED; |
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176 + OPENSSL_sparcv9cap_P[0] &= ~SPARCV9_TICK_PRIVILEGED; |
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177 |
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178 return DI_WALK_TERMINATE; |
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179 } |
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180 @@ -96,7 +102,7 @@ |
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181 /* This is expected to catch remaining UltraSPARCs, such as T1 */ |
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182 else if (!strncmp(name,"SUNW,UltraSPARC",15)) |
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183 { |
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184 - OPENSSL_sparcv9cap_P &= ~SPARCV9_TICK_PRIVILEGED; |
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185 + OPENSSL_sparcv9cap_P[0] &= ~SPARCV9_TICK_PRIVILEGED; |
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186 |
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187 return DI_WALK_TERMINATE; |
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188 } |
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189 @@ -115,7 +121,7 @@ |
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190 |
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191 if ((e=getenv("OPENSSL_sparcv9cap"))) |
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192 { |
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193 - OPENSSL_sparcv9cap_P=strtoul(e,NULL,0); |
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194 + OPENSSL_sparcv9cap_P[0]=strtoul(e,NULL,0); |
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195 return; |
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196 } |
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197 |
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198 @@ -123,17 +129,17 @@ |
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199 { |
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200 if (strcmp(si,"sun4v")) |
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201 /* FPU is preferred for all CPUs, but US-T1/2 */ |
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202 - OPENSSL_sparcv9cap_P |= SPARCV9_PREFER_FPU; |
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203 + OPENSSL_sparcv9cap_P[0] |= SPARCV9_PREFER_FPU; |
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204 } |
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205 |
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206 if (sysinfo(SI_ISALIST,si,sizeof(si))>0) |
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207 { |
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208 if (strstr(si,"+vis")) |
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209 - OPENSSL_sparcv9cap_P |= SPARCV9_VIS1; |
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210 + OPENSSL_sparcv9cap_P[0] |= SPARCV9_VIS1|SPARCV9_BLK; |
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211 if (strstr(si,"+vis2")) |
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212 { |
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213 - OPENSSL_sparcv9cap_P |= SPARCV9_VIS2; |
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214 - OPENSSL_sparcv9cap_P &= ~SPARCV9_TICK_PRIVILEGED; |
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215 + OPENSSL_sparcv9cap_P[0] |= SPARCV9_VIS2; |
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216 + OPENSSL_sparcv9cap_P[0] &= ~SPARCV9_TICK_PRIVILEGED; |
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217 return; |
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218 } |
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219 } |
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220 @@ -193,12 +199,14 @@ |
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221 |
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222 if ((e=getenv("OPENSSL_sparcv9cap"))) |
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223 { |
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224 - OPENSSL_sparcv9cap_P=strtoul(e,NULL,0); |
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225 + OPENSSL_sparcv9cap_P[0]=strtoul(e,NULL,0); |
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226 + if ((e=strchr(e,':'))) |
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227 + OPENSSL_sparcv9cap_P[1]=strtoul(e+1,NULL,0); |
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228 return; |
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229 } |
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230 |
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231 /* Initial value, fits UltraSPARC-I&II... */ |
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232 - OPENSSL_sparcv9cap_P = SPARCV9_PREFER_FPU|SPARCV9_TICK_PRIVILEGED; |
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233 + OPENSSL_sparcv9cap_P[0] = SPARCV9_PREFER_FPU|SPARCV9_TICK_PRIVILEGED; |
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234 |
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235 sigfillset(&all_masked); |
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236 sigdelset(&all_masked,SIGILL); |
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237 @@ -221,20 +229,20 @@ |
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238 if (sigsetjmp(common_jmp,1) == 0) |
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239 { |
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240 _sparcv9_rdtick(); |
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241 - OPENSSL_sparcv9cap_P &= ~SPARCV9_TICK_PRIVILEGED; |
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242 + OPENSSL_sparcv9cap_P[0] &= ~SPARCV9_TICK_PRIVILEGED; |
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243 } |
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244 |
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245 if (sigsetjmp(common_jmp,1) == 0) |
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246 { |
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247 _sparcv9_vis1_probe(); |
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248 - OPENSSL_sparcv9cap_P |= SPARCV9_VIS1; |
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249 + OPENSSL_sparcv9cap_P[0] |= SPARCV9_VIS1|SPARCV9_BLK; |
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250 /* detect UltraSPARC-Tx, see sparccpud.S for details... */ |
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251 if (_sparcv9_vis1_instrument() >= 12) |
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252 - OPENSSL_sparcv9cap_P &= ~(SPARCV9_VIS1|SPARCV9_PREFER_FPU); |
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253 + OPENSSL_sparcv9cap_P[0] &= ~(SPARCV9_VIS1|SPARCV9_PREFER_FPU); |
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254 else |
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255 { |
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256 _sparcv9_vis2_probe(); |
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257 - OPENSSL_sparcv9cap_P |= SPARCV9_VIS2; |
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258 + OPENSSL_sparcv9cap_P[0] |= SPARCV9_VIS2; |
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259 } |
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260 } |
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261 |
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262 @@ -241,9 +249,37 @@ |
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263 if (sigsetjmp(common_jmp,1) == 0) |
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264 { |
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265 _sparcv9_fmadd_probe(); |
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266 - OPENSSL_sparcv9cap_P |= SPARCV9_FMADD; |
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267 + OPENSSL_sparcv9cap_P[0] |= SPARCV9_FMADD; |
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268 } |
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269 |
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270 + /* |
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271 + * VIS3 flag is tested independently from VIS1, unlike VIS2 that is, |
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272 + * because VIS3 defines even integer instructions. |
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273 + */ |
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274 + if (sigsetjmp(common_jmp,1) == 0) |
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275 + { |
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276 + _sparcv9_vis3_probe(); |
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277 + OPENSSL_sparcv9cap_P[0] |= SPARCV9_VIS3; |
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278 + } |
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279 + |
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280 + if (sigsetjmp(common_jmp,1) == 0) |
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281 + { |
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282 + (void)_sparcv9_random(); |
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283 + OPENSSL_sparcv9cap_P[0] |= SPARCV9_RANDOM; |
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284 + } |
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285 + |
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286 + /* |
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287 + * In wait for better solution _sparcv9_rdcfr is masked by |
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288 + * VIS3 flag, because it goes to uninterruptable endless |
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289 + * loop on UltraSPARC II running Solaris. Things might be |
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290 + * different on Linux... |
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291 + */ |
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292 + if ((OPENSSL_sparcv9cap_P[0]&SPARCV9_VIS3) && |
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293 + sigsetjmp(common_jmp,1) == 0) |
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294 + { |
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295 + OPENSSL_sparcv9cap_P[1] = (unsigned int)_sparcv9_rdcfr(); |
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296 + } |
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297 + |
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298 sigaction(SIGBUS,&bus_oact,NULL); |
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299 sigaction(SIGILL,&ill_oact,NULL); |
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300 |
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301 Index: crypto/md5/Makefile |
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302 =================================================================== |
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303 diff -ru openssl-1.0.1e/crypto/md5/Makefile openssl-1.0.1e/crypto/md5/Makefile |
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304 --- openssl-1.0.1e/crypto/md5/Makefile 2011-05-24 17:02:24.000000000 -0700 |
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305 +++ openssl-1.0.1e/crypto/md5/Makefile 2011-07-27 10:48:17.817470000 -0700 |
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306 @@ -52,6 +52,9 @@ |
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307 $(CC) $(CFLAGS) -E asm/md5-ia64.S | \ |
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308 $(PERL) -ne 's/;\s+/;\n/g; print;' > $@ |
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309 |
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310 +md5-sparcv9.S: asm/md5-sparcv9.pl |
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311 + $(PERL) asm/md5-sparcv9.pl $@ $(CFLAGS) |
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312 + |
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313 files: |
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314 $(PERL) $(TOP)/util/files.pl Makefile >> $(TOP)/MINFO |
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315 |
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316 Index: crypto/md5/md5_locl.h |
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317 =================================================================== |
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318 diff -ru openssl-1.0.1e/crypto/md5/md5_locl.h openssl-1.0.1e/crypto/md5/md5_locl.h |
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319 --- openssl-1.0.1e/crypto/md5/md5_locl.h 2011-05-24 17:02:24.000000000 -0700 |
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320 +++ openssl-1.0.1e/crypto/md5/md5_locl.h 2011-07-27 10:48:17.817470000 -0700 |
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321 @@ -71,6 +71,8 @@ |
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322 # define md5_block_data_order md5_block_asm_data_order |
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323 # elif defined(__ia64) || defined(__ia64__) || defined(_M_IA64) |
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324 # define md5_block_data_order md5_block_asm_data_order |
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325 +# elif defined(__sparc) || defined(__sparc__) |
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326 +# define md5_block_data_order md5_block_asm_data_order |
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327 # endif |
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328 #endif |
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329 |
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330 Index: crypto/sha/Makefile |
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331 =================================================================== |
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332 diff -ru openssl-1.0.1e/crypto/sha/Makefile openssl-1.0.1e/crypto/sha/Makefile |
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333 --- openssl-1.0.1e/crypto/sha/Makefile 2011-05-24 17:02:24.000000000 -0700 |
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334 +++ openssl-1.0.1e/crypto/sha/Makefile 2011-07-27 10:48:17.817470000 -0700 |
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335 @@ -66,9 +66,9 @@ |
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336 sha1-x86_64.s: asm/sha1-x86_64.pl; $(PERL) asm/sha1-x86_64.pl $(PERLASM_SCHEME) > $@ |
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337 sha256-x86_64.s:asm/sha512-x86_64.pl; $(PERL) asm/sha512-x86_64.pl $(PERLASM_SCHEME) $@ |
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338 sha512-x86_64.s:asm/sha512-x86_64.pl; $(PERL) asm/sha512-x86_64.pl $(PERLASM_SCHEME) $@ |
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339 -sha1-sparcv9.s: asm/sha1-sparcv9.pl; $(PERL) asm/sha1-sparcv9.pl $@ $(CFLAGS) |
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340 -sha256-sparcv9.s:asm/sha512-sparcv9.pl; $(PERL) asm/sha512-sparcv9.pl $@ $(CFLAGS) |
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341 -sha512-sparcv9.s:asm/sha512-sparcv9.pl; $(PERL) asm/sha512-sparcv9.pl $@ $(CFLAGS) |
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342 +sha1-sparcv9.S: asm/sha1-sparcv9.pl; $(PERL) asm/sha1-sparcv9.pl $@ $(CFLAGS) |
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343 +sha256-sparcv9.S:asm/sha512-sparcv9.pl; $(PERL) asm/sha512-sparcv9.pl $@ $(CFLAGS) |
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344 +sha512-sparcv9.S:asm/sha512-sparcv9.pl; $(PERL) asm/sha512-sparcv9.pl $@ $(CFLAGS) |
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345 |
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346 sha1-ppc.s: asm/sha1-ppc.pl; $(PERL) asm/sha1-ppc.pl $(PERLASM_SCHEME) $@ |
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347 sha256-ppc.s: asm/sha512-ppc.pl; $(PERL) asm/sha512-ppc.pl $(PERLASM_SCHEME) $@ |
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348 Index: crypto/sha/asm/sha1-sparcv9.pl |
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349 =================================================================== |
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350 diff -ru openssl-1.0.1e/crypto/sha/asm/sha1-sparcv9.pl openssl-1.0.1e/crypto/sha/asm/sha1-sparcv9.pl |
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351 --- openssl-1.0.1e/crypto/sha/asm/sha1-sparcv9.pl 2011-05-24 17:02:24.000000000 -0700 |
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352 +++ openssl-1.0.1e/crypto/sha/asm/sha1-sparcv9.pl 2011-07-27 10:48:17.817470000 -0700 |
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353 @@ -5,6 +5,8 @@ |
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354 # project. The module is, however, dual licensed under OpenSSL and |
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355 # CRYPTOGAMS licenses depending on where you obtain it. For further |
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356 # details see http://www.openssl.org/~appro/cryptogams/. |
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357 +# |
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358 +# Hardware SPARC T4 support by David S. Miller <[email protected]>. |
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359 # ==================================================================== |
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360 |
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361 # Performance improvement is not really impressive on pre-T1 CPU: +8% |
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362 @@ -18,6 +20,11 @@ |
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363 # ensure scalability on UltraSPARC T1, or rather to avoid decay when |
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364 # amount of active threads exceeds the number of physical cores. |
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365 |
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366 +# SPARC T4 SHA1 hardware achieves 3.72 cycles per byte, which is 3.1x |
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367 +# faster than software. Multi-process benchmark saturates at 11x |
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368 +# single-process result on 8-core processor, or ~9GBps per 2.85GHz |
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369 +# socket. |
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370 + |
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371 $bits=32; |
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372 for (@ARGV) { $bits=64 if (/\-m64/ || /\-xarch\=v9/); } |
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373 if ($bits==64) { $bias=2047; $frame=192; } |
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374 @@ -183,11 +190,93 @@ |
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375 .register %g3,#scratch |
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376 ___ |
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377 $code.=<<___; |
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378 +#include "sparc_arch.h" |
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379 + |
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380 .section ".text",#alloc,#execinstr |
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381 |
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382 +#ifdef __PIC__ |
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383 +SPARC_PIC_THUNK(%g1) |
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384 +#endif |
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385 + |
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386 .align 32 |
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387 .globl sha1_block_data_order |
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388 sha1_block_data_order: |
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389 + SPARC_LOAD_ADDRESS_LEAF(OPENSSL_sparcv9cap_P,%g1,%g5) |
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390 + ld [%g1+4],%g1 ! OPENSSL_sparcv9cap_P[1] |
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391 + |
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392 + andcc %g1, CFR_SHA1, %g0 |
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393 + be .Lsoftware |
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394 + nop |
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395 + |
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396 + ld [%o0 + 0x00], %f0 ! load context |
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397 + ld [%o0 + 0x04], %f1 |
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398 + ld [%o0 + 0x08], %f2 |
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399 + andcc %o1, 0x7, %g0 |
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400 + ld [%o0 + 0x0c], %f3 |
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401 + bne,pn %icc, .Lhwunaligned |
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402 + ld [%o0 + 0x10], %f4 |
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403 + |
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404 +.Lhw_loop: |
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405 + ldd [%o1 + 0x00], %f8 |
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406 + ldd [%o1 + 0x08], %f10 |
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407 + ldd [%o1 + 0x10], %f12 |
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408 + ldd [%o1 + 0x18], %f14 |
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409 + ldd [%o1 + 0x20], %f16 |
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410 + ldd [%o1 + 0x28], %f18 |
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411 + ldd [%o1 + 0x30], %f20 |
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412 + subcc %o2, 1, %o2 ! done yet? |
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413 + ldd [%o1 + 0x38], %f22 |
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414 + add %o1, 0x40, %o1 |
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415 + |
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416 + .word 0x81b02820 ! SHA1 |
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417 + |
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418 + bne,pt `$bits==64?"%xcc":"%icc"`, .Lhw_loop |
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419 + nop |
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420 + |
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421 +.Lhwfinish: |
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422 + st %f0, [%o0 + 0x00] ! store context |
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423 + st %f1, [%o0 + 0x04] |
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424 + st %f2, [%o0 + 0x08] |
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425 + st %f3, [%o0 + 0x0c] |
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426 + retl |
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427 + st %f4, [%o0 + 0x10] |
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428 + |
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429 +.align 8 |
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430 +.Lhwunaligned: |
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431 + alignaddr %o1, %g0, %o1 |
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432 + |
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433 + ldd [%o1 + 0x00], %f10 |
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434 +.Lhwunaligned_loop: |
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435 + ldd [%o1 + 0x08], %f12 |
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436 + ldd [%o1 + 0x10], %f14 |
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437 + ldd [%o1 + 0x18], %f16 |
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438 + ldd [%o1 + 0x20], %f18 |
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439 + ldd [%o1 + 0x28], %f20 |
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440 + ldd [%o1 + 0x30], %f22 |
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441 + ldd [%o1 + 0x38], %f24 |
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442 + subcc %o2, 1, %o2 ! done yet? |
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443 + ldd [%o1 + 0x40], %f26 |
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444 + add %o1, 0x40, %o1 |
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445 + |
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446 + faligndata %f10, %f12, %f8 |
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447 + faligndata %f12, %f14, %f10 |
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448 + faligndata %f14, %f16, %f12 |
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449 + faligndata %f16, %f18, %f14 |
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450 + faligndata %f18, %f20, %f16 |
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451 + faligndata %f20, %f22, %f18 |
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452 + faligndata %f22, %f24, %f20 |
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453 + faligndata %f24, %f26, %f22 |
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454 + |
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455 + .word 0x81b02820 ! SHA1 |
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456 + |
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457 + bne,pt `$bits==64?"%xcc":"%icc"`, .Lhwunaligned_loop |
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458 + for %f26, %f26, %f10 ! %f10=%f26 |
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459 + |
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460 + ba .Lhwfinish |
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461 + nop |
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462 + |
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463 +.align 16 |
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464 +.Lsoftware: |
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465 save %sp,-$frame,%sp |
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466 sllx $len,6,$len |
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467 add $inp,$len,$len |
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468 @@ -279,6 +368,62 @@ |
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469 .align 4 |
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470 ___ |
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471 |
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472 -$code =~ s/\`([^\`]*)\`/eval $1/gem; |
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473 -print $code; |
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474 +# Purpose of these subroutines is to explicitly encode VIS instructions, |
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475 +# so that one can compile the module without having to specify VIS |
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476 +# extentions on compiler command line, e.g. -xarch=v9 vs. -xarch=v9a. |
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477 +# Idea is to reserve for option to produce "universal" binary and let |
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478 +# programmer detect if current CPU is VIS capable at run-time. |
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479 +sub unvis { |
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480 +my ($mnemonic,$rs1,$rs2,$rd)=@_; |
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481 +my $ref,$opf; |
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482 +my %visopf = ( "faligndata" => 0x048, |
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483 + "for" => 0x07c ); |
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484 + |
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485 + $ref = "$mnemonic\t$rs1,$rs2,$rd"; |
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486 + |
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487 + if ($opf=$visopf{$mnemonic}) { |
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488 + foreach ($rs1,$rs2,$rd) { |
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489 + return $ref if (!/%f([0-9]{1,2})/); |
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490 + $_=$1; |
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491 + if ($1>=32) { |
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492 + return $ref if ($1&1); |
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493 + # re-encode for upper double register addressing |
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494 + $_=($1|$1>>5)&31; |
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495 + } |
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496 + } |
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497 + |
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498 + return sprintf ".word\t0x%08x !%s", |
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499 + 0x81b00000|$rd<<25|$rs1<<14|$opf<<5|$rs2, |
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500 + $ref; |
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501 + } else { |
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502 + return $ref; |
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503 + } |
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504 +} |
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505 +sub unalignaddr { |
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506 +my ($mnemonic,$rs1,$rs2,$rd)=@_; |
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507 +my %bias = ( "g" => 0, "o" => 8, "l" => 16, "i" => 24 ); |
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508 +my $ref="$mnemonic\t$rs1,$rs2,$rd"; |
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509 + |
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510 + foreach ($rs1,$rs2,$rd) { |
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511 + if (/%([goli])([0-7])/) { $_=$bias{$1}+$2; } |
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512 + else { return $ref; } |
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513 + } |
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514 + return sprintf ".word\t0x%08x !%s", |
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515 + 0x81b00300|$rd<<25|$rs1<<14|$rs2, |
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516 + $ref; |
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517 +} |
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518 + |
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519 +foreach (split("\n",$code)) { |
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520 + s/\`([^\`]*)\`/eval $1/ge; |
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521 + |
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522 + s/\b(f[^\s]*)\s+(%f[0-9]{1,2}),\s*(%f[0-9]{1,2}),\s*(%f[0-9]{1,2})/ |
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523 + &unvis($1,$2,$3,$4) |
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524 + /ge; |
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525 + s/\b(alignaddr)\s+(%[goli][0-7]),\s*(%[goli][0-7]),\s*(%[goli][0-7])/ |
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526 + &unalignaddr($1,$2,$3,$4) |
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527 + /ge; |
|
528 + |
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529 + print $_,"\n"; |
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530 +} |
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531 + |
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532 close STDOUT; |
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533 |
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534 Index: crypto/sha/asm/sha512-sparcv9.pl |
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535 =================================================================== |
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536 diff -ru openssl-1.0.1e/crypto/sha/asm/sha512-sparcv9.pl openssl-1.0.1e/crypto/sha/asm/sha512-sparcv9.pl |
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537 --- openssl-1.0.1e/crypto/sha/asm/sha512-sparcv9.pl 2011-05-24 17:02:24.000000000 -0700 |
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538 +++ openssl-1.0.1e/crypto/sha/asm/sha512-sparcv9.pl 2011-07-27 10:48:17.817470000 -0700 |
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539 @@ -5,6 +5,8 @@ |
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540 # project. The module is, however, dual licensed under OpenSSL and |
|
541 # CRYPTOGAMS licenses depending on where you obtain it. For further |
|
542 # details see http://www.openssl.org/~appro/cryptogams/. |
|
543 +# |
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544 +# Hardware SPARC T4 support by David S. Miller <[email protected]>. |
|
545 # ==================================================================== |
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546 |
|
547 # SHA256 performance improvement over compiler generated code varies |
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548 @@ -41,6 +43,12 @@ |
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549 # loads are always slower than one 64-bit load. Once again this |
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550 # is unlike pre-T1 UltraSPARC, where, if scheduled appropriately, |
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551 # 2x32-bit loads can be as fast as 1x64-bit ones. |
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552 +# |
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553 +# SPARC T4 SHA256/512 hardware achieves 3.17/2.01 cycles per byte, |
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554 +# which is 9.3x/11.1x faster than software. Multi-process benchmark |
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555 +# saturates at 11.5x single-process result on 8-core processor, or |
|
556 +# ~11/16GBps per 2.85GHz socket. |
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557 + |
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558 |
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559 $bits=32; |
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560 for (@ARGV) { $bits=64 if (/\-m64/ || /\-xarch\=v9/); } |
|
561 @@ -386,6 +394,8 @@ |
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562 .register %g3,#scratch |
|
563 ___ |
|
564 $code.=<<___; |
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565 +#include "sparc_arch.h" |
|
566 + |
|
567 .section ".text",#alloc,#execinstr |
|
568 |
|
569 .align 64 |
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570 @@ -457,8 +467,196 @@ |
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571 } |
|
572 $code.=<<___; |
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573 .size K${label},.-K${label} |
|
574 + |
|
575 +#ifdef __PIC__ |
|
576 +SPARC_PIC_THUNK(%g1) |
|
577 +#endif |
|
578 + |
|
579 .globl sha${label}_block_data_order |
|
580 +.align 32 |
|
581 sha${label}_block_data_order: |
|
582 + SPARC_LOAD_ADDRESS_LEAF(OPENSSL_sparcv9cap_P,%g1,%g5) |
|
583 + ld [%g1+4],%g1 ! OPENSSL_sparcv9cap_P[1] |
|
584 + |
|
585 + andcc %g1, CFR_SHA${label}, %g0 |
|
586 + be .Lsoftware |
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587 + nop |
|
588 +___ |
|
589 +$code.=<<___ if ($SZ==8); # SHA512 |
|
590 + ldd [%o0 + 0x00], %f0 ! load context |
|
591 + ldd [%o0 + 0x08], %f2 |
|
592 + ldd [%o0 + 0x10], %f4 |
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593 + ldd [%o0 + 0x18], %f6 |
|
594 + ldd [%o0 + 0x20], %f8 |
|
595 + ldd [%o0 + 0x28], %f10 |
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596 + andcc %o1, 0x7, %g0 |
|
597 + ldd [%o0 + 0x30], %f12 |
|
598 + bne,pn %icc, .Lhwunaligned |
|
599 + ldd [%o0 + 0x38], %f14 |
|
600 + |
|
601 +.Lhwaligned_loop: |
|
602 + ldd [%o1 + 0x00], %f16 |
|
603 + ldd [%o1 + 0x08], %f18 |
|
604 + ldd [%o1 + 0x10], %f20 |
|
605 + ldd [%o1 + 0x18], %f22 |
|
606 + ldd [%o1 + 0x20], %f24 |
|
607 + ldd [%o1 + 0x28], %f26 |
|
608 + ldd [%o1 + 0x30], %f28 |
|
609 + ldd [%o1 + 0x38], %f30 |
|
610 + ldd [%o1 + 0x40], %f32 |
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611 + ldd [%o1 + 0x48], %f34 |
|
612 + ldd [%o1 + 0x50], %f36 |
|
613 + ldd [%o1 + 0x58], %f38 |
|
614 + ldd [%o1 + 0x60], %f40 |
|
615 + ldd [%o1 + 0x68], %f42 |
|
616 + ldd [%o1 + 0x70], %f44 |
|
617 + subcc %o2, 1, %o2 ! done yet? |
|
618 + ldd [%o1 + 0x78], %f46 |
|
619 + add %o1, 0x80, %o1 |
|
620 + |
|
621 + .word 0x81b02860 ! SHA512 |
|
622 + |
|
623 + bne,pt `$bits==64?"%xcc":"%icc"`, .Lhwaligned_loop |
|
624 + nop |
|
625 + |
|
626 +.Lhwfinish: |
|
627 + std %f0, [%o0 + 0x00] ! store context |
|
628 + std %f2, [%o0 + 0x08] |
|
629 + std %f4, [%o0 + 0x10] |
|
630 + std %f6, [%o0 + 0x18] |
|
631 + std %f8, [%o0 + 0x20] |
|
632 + std %f10, [%o0 + 0x28] |
|
633 + std %f12, [%o0 + 0x30] |
|
634 + retl |
|
635 + std %f14, [%o0 + 0x38] |
|
636 + |
|
637 +.align 16 |
|
638 +.Lhwunaligned: |
|
639 + alignaddr %o1, %g0, %o1 |
|
640 + |
|
641 + ldd [%o1 + 0x00], %f18 |
|
642 +.Lhwunaligned_loop: |
|
643 + ldd [%o1 + 0x08], %f20 |
|
644 + ldd [%o1 + 0x10], %f22 |
|
645 + ldd [%o1 + 0x18], %f24 |
|
646 + ldd [%o1 + 0x20], %f26 |
|
647 + ldd [%o1 + 0x28], %f28 |
|
648 + ldd [%o1 + 0x30], %f30 |
|
649 + ldd [%o1 + 0x38], %f32 |
|
650 + ldd [%o1 + 0x40], %f34 |
|
651 + ldd [%o1 + 0x48], %f36 |
|
652 + ldd [%o1 + 0x50], %f38 |
|
653 + ldd [%o1 + 0x58], %f40 |
|
654 + ldd [%o1 + 0x60], %f42 |
|
655 + ldd [%o1 + 0x68], %f44 |
|
656 + ldd [%o1 + 0x70], %f46 |
|
657 + ldd [%o1 + 0x78], %f48 |
|
658 + subcc %o2, 1, %o2 ! done yet? |
|
659 + ldd [%o1 + 0x80], %f50 |
|
660 + add %o1, 0x80, %o1 |
|
661 + |
|
662 + faligndata %f18, %f20, %f16 |
|
663 + faligndata %f20, %f22, %f18 |
|
664 + faligndata %f22, %f24, %f20 |
|
665 + faligndata %f24, %f26, %f22 |
|
666 + faligndata %f26, %f28, %f24 |
|
667 + faligndata %f28, %f30, %f26 |
|
668 + faligndata %f30, %f32, %f28 |
|
669 + faligndata %f32, %f34, %f30 |
|
670 + faligndata %f34, %f36, %f32 |
|
671 + faligndata %f36, %f38, %f34 |
|
672 + faligndata %f38, %f40, %f36 |
|
673 + faligndata %f40, %f42, %f38 |
|
674 + faligndata %f42, %f44, %f40 |
|
675 + faligndata %f44, %f46, %f42 |
|
676 + faligndata %f46, %f48, %f44 |
|
677 + faligndata %f48, %f50, %f46 |
|
678 + |
|
679 + .word 0x81b02860 ! SHA512 |
|
680 + |
|
681 + bne,pt `$bits==64?"%xcc":"%icc"`, .Lhwunaligned_loop |
|
682 + for %f50, %f50, %f18 ! %f18=%f50 |
|
683 + |
|
684 + ba .Lhwfinish |
|
685 + nop |
|
686 +___ |
|
687 +$code.=<<___ if ($SZ==4); # SHA256 |
|
688 + ld [%o0 + 0x00], %f0 |
|
689 + ld [%o0 + 0x04], %f1 |
|
690 + ld [%o0 + 0x08], %f2 |
|
691 + ld [%o0 + 0x0c], %f3 |
|
692 + ld [%o0 + 0x10], %f4 |
|
693 + ld [%o0 + 0x14], %f5 |
|
694 + andcc %o1, 0x7, %g0 |
|
695 + ld [%o0 + 0x18], %f6 |
|
696 + bne,pn %icc, .Lhwunaligned |
|
697 + ld [%o0 + 0x1c], %f7 |
|
698 + |
|
699 +.Lhwloop: |
|
700 + ldd [%o1 + 0x00], %f8 |
|
701 + ldd [%o1 + 0x08], %f10 |
|
702 + ldd [%o1 + 0x10], %f12 |
|
703 + ldd [%o1 + 0x18], %f14 |
|
704 + ldd [%o1 + 0x20], %f16 |
|
705 + ldd [%o1 + 0x28], %f18 |
|
706 + ldd [%o1 + 0x30], %f20 |
|
707 + subcc %o2, 1, %o2 ! done yet? |
|
708 + ldd [%o1 + 0x38], %f22 |
|
709 + add %o1, 0x40, %o1 |
|
710 + |
|
711 + .word 0x81b02840 ! SHA256 |
|
712 + |
|
713 + bne,pt `$bits==64?"%xcc":"%icc"`, .Lhwloop |
|
714 + nop |
|
715 + |
|
716 +.Lhwfinish: |
|
717 + st %f0, [%o0 + 0x00] ! store context |
|
718 + st %f1, [%o0 + 0x04] |
|
719 + st %f2, [%o0 + 0x08] |
|
720 + st %f3, [%o0 + 0x0c] |
|
721 + st %f4, [%o0 + 0x10] |
|
722 + st %f5, [%o0 + 0x14] |
|
723 + st %f6, [%o0 + 0x18] |
|
724 + retl |
|
725 + st %f7, [%o0 + 0x1c] |
|
726 + |
|
727 +.align 8 |
|
728 +.Lhwunaligned: |
|
729 + alignaddr %o1, %g0, %o1 |
|
730 + |
|
731 + ldd [%o1 + 0x00], %f10 |
|
732 +.Lhwunaligned_loop: |
|
733 + ldd [%o1 + 0x08], %f12 |
|
734 + ldd [%o1 + 0x10], %f14 |
|
735 + ldd [%o1 + 0x18], %f16 |
|
736 + ldd [%o1 + 0x20], %f18 |
|
737 + ldd [%o1 + 0x28], %f20 |
|
738 + ldd [%o1 + 0x30], %f22 |
|
739 + ldd [%o1 + 0x38], %f24 |
|
740 + subcc %o2, 1, %o2 ! done yet? |
|
741 + ldd [%o1 + 0x40], %f26 |
|
742 + add %o1, 0x40, %o1 |
|
743 + |
|
744 + faligndata %f10, %f12, %f8 |
|
745 + faligndata %f12, %f14, %f10 |
|
746 + faligndata %f14, %f16, %f12 |
|
747 + faligndata %f16, %f18, %f14 |
|
748 + faligndata %f18, %f20, %f16 |
|
749 + faligndata %f20, %f22, %f18 |
|
750 + faligndata %f22, %f24, %f20 |
|
751 + faligndata %f24, %f26, %f22 |
|
752 + |
|
753 + .word 0x81b02840 ! SHA256 |
|
754 + |
|
755 + bne,pt `$bits==64?"%xcc":"%icc"`, .Lhwunaligned_loop |
|
756 + for %f26, %f26, %f10 ! %f10=%f26 |
|
757 + |
|
758 + ba .Lhwfinish |
|
759 + nop |
|
760 +___ |
|
761 +$code.=<<___; |
|
762 +.align 16 |
|
763 +.Lsoftware: |
|
764 save %sp,`-$frame-$locals`,%sp |
|
765 and $inp,`$align-1`,$tmp31 |
|
766 sllx $len,`log(16*$SZ)/log(2)`,$len |
|
767 @@ -589,6 +787,62 @@ |
|
768 .align 4 |
|
769 ___ |
|
770 |
|
771 -$code =~ s/\`([^\`]*)\`/eval $1/gem; |
|
772 -print $code; |
|
773 +# Purpose of these subroutines is to explicitly encode VIS instructions, |
|
774 +# so that one can compile the module without having to specify VIS |
|
775 +# extentions on compiler command line, e.g. -xarch=v9 vs. -xarch=v9a. |
|
776 +# Idea is to reserve for option to produce "universal" binary and let |
|
777 +# programmer detect if current CPU is VIS capable at run-time. |
|
778 +sub unvis { |
|
779 +my ($mnemonic,$rs1,$rs2,$rd)=@_; |
|
780 +my $ref,$opf; |
|
781 +my %visopf = ( "faligndata" => 0x048, |
|
782 + "for" => 0x07c ); |
|
783 + |
|
784 + $ref = "$mnemonic\t$rs1,$rs2,$rd"; |
|
785 + |
|
786 + if ($opf=$visopf{$mnemonic}) { |
|
787 + foreach ($rs1,$rs2,$rd) { |
|
788 + return $ref if (!/%f([0-9]{1,2})/); |
|
789 + $_=$1; |
|
790 + if ($1>=32) { |
|
791 + return $ref if ($1&1); |
|
792 + # re-encode for upper double register addressing |
|
793 + $_=($1|$1>>5)&31; |
|
794 + } |
|
795 + } |
|
796 + |
|
797 + return sprintf ".word\t0x%08x !%s", |
|
798 + 0x81b00000|$rd<<25|$rs1<<14|$opf<<5|$rs2, |
|
799 + $ref; |
|
800 + } else { |
|
801 + return $ref; |
|
802 + } |
|
803 +} |
|
804 +sub unalignaddr { |
|
805 +my ($mnemonic,$rs1,$rs2,$rd)=@_; |
|
806 +my %bias = ( "g" => 0, "o" => 8, "l" => 16, "i" => 24 ); |
|
807 +my $ref="$mnemonic\t$rs1,$rs2,$rd"; |
|
808 + |
|
809 + foreach ($rs1,$rs2,$rd) { |
|
810 + if (/%([goli])([0-7])/) { $_=$bias{$1}+$2; } |
|
811 + else { return $ref; } |
|
812 + } |
|
813 + return sprintf ".word\t0x%08x !%s", |
|
814 + 0x81b00300|$rd<<25|$rs1<<14|$rs2, |
|
815 + $ref; |
|
816 +} |
|
817 + |
|
818 +foreach (split("\n",$code)) { |
|
819 + s/\`([^\`]*)\`/eval $1/ge; |
|
820 + |
|
821 + s/\b(f[^\s]*)\s+(%f[0-9]{1,2}),\s*(%f[0-9]{1,2}),\s*(%f[0-9]{1,2})/ |
|
822 + &unvis($1,$2,$3,$4) |
|
823 + /ge; |
|
824 + s/\b(alignaddr)\s+(%[goli][0-7]),\s*(%[goli][0-7]),\s*(%[goli][0-7])/ |
|
825 + &unalignaddr($1,$2,$3,$4) |
|
826 + /ge; |
|
827 + |
|
828 + print $_,"\n"; |
|
829 +} |
|
830 + |
|
831 close STDOUT; |
|
832 Index: openssl/apps/speed.c |
|
833 =================================================================== |
|
834 diff -ru openssl-1.0.1e/apps/spped.c openssl-1.0.1e/apps/speed.c |
|
835 --- openssl-1.0.1e/apps/speed.c 2011-05-24 17:02:24.000000000 -0700 |
|
836 +++ openssl-1.0.1e/apps/spped.c 2011-07-27 10:48:17.817470000 -0700 |
|
837 @@ -1551,7 +1551,7 @@ |
|
838 print_message(names[D_MD5],c[D_MD5][j],lengths[j]); |
|
839 Time_F(START); |
|
840 for (count=0,run=1; COND(c[D_MD5][j]); count++) |
|
841 - EVP_Digest(&(buf[0]),(unsigned long)lengths[j],&(md5[0]),NULL,EVP_get_digestbyname("md5"),NULL); |
|
842 + MD5(buf,lengths[j],md5); |
|
843 d=Time_F(STOP); |
|
844 print_result(D_MD5,j,count,d); |
|
845 } |
|
846 @@ -1591,7 +1591,7 @@ |
|
847 print_message(names[D_SHA1],c[D_SHA1][j],lengths[j]); |
|
848 Time_F(START); |
|
849 for (count=0,run=1; COND(c[D_SHA1][j]); count++) |
|
850 - EVP_Digest(buf,(unsigned long)lengths[j],&(sha[0]),NULL,EVP_sha1(),NULL); |
|
851 + SHA1(buf,lengths[j],sha); |
|
852 d=Time_F(STOP); |
|
853 print_result(D_SHA1,j,count,d); |
|
854 } |