|
1 # XML representation of 32-bit SPARC integer registers. |
|
2 --- /dev/null 2013-10-05 19:42:45.000000000 -0700 |
|
3 +++ gdb-7.6/gdb/features/sparc-cpu.xml 2013-08-27 20:10:12.000000000 -0700 |
|
4 @@ -0,0 +1,42 @@ |
|
5 +<?xml version="1.0"?> |
|
6 +<!-- Copyright (c) 2013, Oraclel and/or its affiliates. All rights reserved. |
|
7 + |
|
8 + Copying and distribution of this file, with or without modification, |
|
9 + are permitted in any medium without royalty provided the copyright |
|
10 + notice and this notice are preserved. --> |
|
11 + |
|
12 +<!DOCTYPE feature SYSTEM "gdb-target.dtd"> |
|
13 +<feature name="org.gnu.gdb.sparc.cpu"> |
|
14 + <reg name="g0" bitsize="32" type="uint32" regnum="0"/> |
|
15 + <reg name="g1" bitsize="32" type="uint32" regnum="1"/> |
|
16 + <reg name="g2" bitsize="32" type="uint32" regnum="2"/> |
|
17 + <reg name="g3" bitsize="32" type="uint32" regnum="3"/> |
|
18 + <reg name="g4" bitsize="32" type="uint32" regnum="4"/> |
|
19 + <reg name="g5" bitsize="32" type="uint32" regnum="5"/> |
|
20 + <reg name="g6" bitsize="32" type="uint32" regnum="6"/> |
|
21 + <reg name="g7" bitsize="32" type="uint32" regnum="7"/> |
|
22 + <reg name="o0" bitsize="32" type="uint32" regnum="8"/> |
|
23 + <reg name="o1" bitsize="32" type="uint32" regnum="9"/> |
|
24 + <reg name="o2" bitsize="32" type="uint32" regnum="10"/> |
|
25 + <reg name="o3" bitsize="32" type="uint32" regnum="11"/> |
|
26 + <reg name="o4" bitsize="32" type="uint32" regnum="12"/> |
|
27 + <reg name="o5" bitsize="32" type="uint32" regnum="13"/> |
|
28 + <reg name="sp" bitsize="32" type="uint32" regnum="14"/> |
|
29 + <reg name="o7" bitsize="32" type="uint32" regnum="15"/> |
|
30 + <reg name="l0" bitsize="32" type="uint32" regnum="16"/> |
|
31 + <reg name="l1" bitsize="32" type="uint32" regnum="17"/> |
|
32 + <reg name="l2" bitsize="32" type="uint32" regnum="18"/> |
|
33 + <reg name="l3" bitsize="32" type="uint32" regnum="19"/> |
|
34 + <reg name="l4" bitsize="32" type="uint32" regnum="20"/> |
|
35 + <reg name="l5" bitsize="32" type="uint32" regnum="21"/> |
|
36 + <reg name="l6" bitsize="32" type="uint32" regnum="22"/> |
|
37 + <reg name="l7" bitsize="32" type="uint32" regnum="23"/> |
|
38 + <reg name="i0" bitsize="32" type="uint32" regnum="24"/> |
|
39 + <reg name="i1" bitsize="32" type="uint32" regnum="25"/> |
|
40 + <reg name="i2" bitsize="32" type="uint32" regnum="26"/> |
|
41 + <reg name="i3" bitsize="32" type="uint32" regnum="27"/> |
|
42 + <reg name="i4" bitsize="32" type="uint32" regnum="28"/> |
|
43 + <reg name="i5" bitsize="32" type="uint32" regnum="29"/> |
|
44 + <reg name="fp" bitsize="32" type="uint32" regnum="30"/> |
|
45 + <reg name="i7" bitsize="32" type="uint32" regnum="31"/> |
|
46 +</feature> |