14 else |
14 else |
15 mlx4libdir = $(libdir)/infiniband |
15 mlx4libdir = $(libdir)/infiniband |
16 diff -r -u /tmp/839450/libmlx4-1.0.1/src/mlx4-abi.h libmlx4-1.0.1/src/mlx4-abi.h |
16 diff -r -u /tmp/839450/libmlx4-1.0.1/src/mlx4-abi.h libmlx4-1.0.1/src/mlx4-abi.h |
17 --- /tmp/839450/libmlx4-1.0.1/src/mlx4-abi.h Thu Mar 10 04:48:34 2011 |
17 --- /tmp/839450/libmlx4-1.0.1/src/mlx4-abi.h Thu Mar 10 04:48:34 2011 |
18 +++ libmlx4-1.0.1/src/mlx4-abi.h Fri Feb 11 03:49:51 2011 |
18 +++ libmlx4-1.0.1/src/mlx4-abi.h Fri Feb 11 03:49:51 2011 |
19 @@ -35,6 +35,10 @@ |
19 @@ -35,6 +35,14 @@ |
20 |
20 |
21 #include <infiniband/kern-abi.h> |
21 #include <infiniband/kern-abi.h> |
22 |
22 |
23 +#if defined(__SVR4) && defined(__sun) |
23 +#if defined(__SVR4) && defined(__sun) |
24 +#include <sys/ib/adapters/mlnx_umap.h> /* Opaque CI data out definitions */ |
24 +/* Restore once build systems are in sync |
|
25 + See 21170572 - libmlx4 should be built with the system mlnx_umap.h |
|
26 +#include <sys/ib/adapters/mlnx_umap.h> / * Opaque CI data out definitions * / |
|
27 +*/ |
|
28 +#include "mlnx_umap.h" /* Opaque CI data out definitions */ |
25 +#endif |
29 +#endif |
26 + |
30 + |
27 #define MLX4_UVERBS_MIN_ABI_VERSION 2 |
31 #define MLX4_UVERBS_MIN_ABI_VERSION 2 |
28 #define MLX4_UVERBS_MAX_ABI_VERSION 3 |
32 #define MLX4_UVERBS_MAX_ABI_VERSION 3 |
29 |
33 |
30 @@ -49,6 +53,12 @@ |
34 @@ -43,6 +51,10 @@ |
31 struct ibv_alloc_pd_resp ibv_resp; |
35 __u32 qp_tab_size; |
32 __u32 pdn; |
36 __u16 bf_reg_size; |
|
37 __u16 bf_regs_per_page; |
|
38 +#if defined(__SVR4) && defined(__sun) |
|
39 + uint32_t muc_rev; |
|
40 + uint32_t muc_reserved; |
|
41 +#endif |
|
42 }; |
|
43 |
|
44 struct mlx4_alloc_pd_resp { |
|
45 @@ -51,23 +63,45 @@ |
33 __u32 reserved; |
46 __u32 reserved; |
34 +}; |
47 }; |
35 + |
48 |
36 +struct mlx4_share_pd_resp { |
49 +struct mlx4_share_pd_resp { |
37 + struct ibv_share_pd_resp ibv_resp; |
50 + struct ibv_share_pd_resp ibv_resp; |
38 + __u32 pdn; |
51 + __u32 pdn; |
39 + __u32 reserved; |
52 + __u32 reserved; |
|
53 +}; |
|
54 + |
|
55 struct mlx4_create_cq { |
|
56 struct ibv_create_cq ibv_cmd; |
|
57 +#if !(defined(__SVR4) && defined(__sun)) |
|
58 __u64 buf_addr; |
|
59 __u64 db_addr; |
|
60 +#endif |
40 }; |
61 }; |
41 |
62 |
42 struct mlx4_create_cq { |
63 struct mlx4_create_cq_resp { |
|
64 struct ibv_create_cq_resp ibv_resp; |
|
65 +#if !(defined(__SVR4) && defined(__sun)) |
|
66 __u32 cqn; |
|
67 __u32 reserved; |
|
68 +#else |
|
69 + mlnx_umap_cq_data_out_t mdd; |
|
70 +#endif |
|
71 }; |
|
72 |
|
73 struct mlx4_resize_cq { |
|
74 struct ibv_resize_cq ibv_cmd; |
|
75 +#if !(defined(__SVR4) && defined(__sun)) |
|
76 __u64 buf_addr; |
|
77 +#endif |
|
78 }; |
|
79 |
|
80 +#if defined(__SVR4) && defined(__sun) |
|
81 +struct mlx4_resize_cq_resp { |
|
82 + struct ibv_resize_cq_resp ibv_resp; |
|
83 + mlnx_umap_cq_data_out_t mdd; |
|
84 +}; |
|
85 +#endif |
|
86 + |
|
87 + |
|
88 #ifdef HAVE_IBV_XRC_OPS |
|
89 struct mlx4_create_xrc_srq { |
|
90 struct ibv_create_xrc_srq ibv_cmd; |
|
91 @@ -78,18 +112,25 @@ |
|
92 |
|
93 struct mlx4_create_srq { |
|
94 struct ibv_create_srq ibv_cmd; |
|
95 +#if !(defined(__SVR4) && defined(__sun)) |
|
96 __u64 buf_addr; |
|
97 __u64 db_addr; |
|
98 +#endif |
|
99 }; |
|
100 |
|
101 struct mlx4_create_srq_resp { |
|
102 struct ibv_create_srq_resp ibv_resp; |
|
103 +#if !(defined(__SVR4) && defined(__sun)) |
|
104 __u32 srqn; |
|
105 __u32 reserved; |
|
106 +#else |
|
107 + mlnx_umap_srq_data_out_t mdd; |
|
108 +#endif |
|
109 }; |
|
110 |
|
111 struct mlx4_create_qp { |
|
112 struct ibv_create_qp ibv_cmd; |
|
113 +#if !(defined(__SVR4) && defined(__sun)) |
|
114 __u64 buf_addr; |
|
115 __u64 db_addr; |
|
116 __u8 log_sq_bb_count; |
|
117 @@ -96,8 +137,16 @@ |
|
118 __u8 log_sq_stride; |
|
119 __u8 sq_no_prefetch; /* was reserved in ABI 2 */ |
|
120 __u8 reserved[5]; |
|
121 +#endif |
|
122 }; |
|
123 |
|
124 +#if defined(__SVR4) && defined(__sun) |
|
125 +struct mlx4_create_qp_resp { |
|
126 + struct ibv_create_qp_resp ibv_resp; |
|
127 + mlnx_umap_qp_data_out_t mdd; |
|
128 +}; |
|
129 +#endif |
|
130 + |
|
131 #ifdef HAVE_IBV_XRC_OPS |
|
132 struct mlx4_open_xrc_domain_resp { |
|
133 struct ibv_open_xrc_domain_resp ibv_resp; |
43 diff -r -u /tmp/839450/libmlx4-1.0.1/src/verbs.c libmlx4-1.0.1/src/verbs.c |
134 diff -r -u /tmp/839450/libmlx4-1.0.1/src/verbs.c libmlx4-1.0.1/src/verbs.c |
44 --- /tmp/839450/libmlx4-1.0.1/src/verbs.c Thu Mar 10 04:48:34 2011 |
135 --- /tmp/839450/libmlx4-1.0.1/src/verbs.c Thu Mar 10 04:48:34 2011 |
45 +++ libmlx4-1.0.1/src/verbs.c Fri Mar 11 14:40:18 2011 |
136 +++ libmlx4-1.0.1/src/verbs.c Fri Mar 11 14:40:18 2011 |
46 @@ -56,6 +56,14 @@ |
137 @@ -56,6 +56,14 @@ |
47 if (ret) |
138 if (ret) |
56 + attr->max_srq_wr -=1; |
147 + attr->max_srq_wr -=1; |
57 +#endif |
148 +#endif |
58 major = (raw_fw_ver >> 32) & 0xffff; |
149 major = (raw_fw_ver >> 32) & 0xffff; |
59 minor = (raw_fw_ver >> 16) & 0xffff; |
150 minor = (raw_fw_ver >> 16) & 0xffff; |
60 sub_minor = raw_fw_ver & 0xffff; |
151 sub_minor = raw_fw_ver & 0xffff; |
61 @@ -79,6 +87,9 @@ |
152 @@ -95,6 +103,39 @@ |
62 struct ibv_alloc_pd cmd; |
|
63 struct mlx4_alloc_pd_resp resp; |
|
64 struct mlx4_pd *pd; |
|
65 +#if defined(__SVR4) && defined(__sun) |
|
66 + mlnx_umap_pd_data_out_t *mdd; |
|
67 +#endif |
|
68 |
|
69 pd = malloc(sizeof *pd); |
|
70 if (!pd) |
|
71 @@ -90,11 +101,67 @@ |
|
72 return NULL; |
|
73 } |
|
74 |
|
75 +#if defined(__SVR4) && defined(__sun) |
|
76 + /* |
|
77 + * kernel driver passes back the PD table index as opaque data. This |
|
78 + * is required for specifying the PD in user space address vectors. |
|
79 + */ |
|
80 + mdd = (mlnx_umap_pd_data_out_t *) &resp.ibv_resp.drv_out; |
|
81 + pd->pdn = mdd->mpd_pdnum; |
|
82 +#else |
|
83 pd->pdn = resp.pdn; |
|
84 +#endif |
|
85 |
|
86 return &pd->ibv_pd; |
153 return &pd->ibv_pd; |
87 } |
154 } |
88 |
155 |
89 +struct ibv_shpd *mlx4_alloc_shpd(struct ibv_pd *pd, uint64_t share_key, struct ibv_shpd *shpd) |
156 +struct ibv_shpd *mlx4_alloc_shpd(struct ibv_pd *pd, uint64_t share_key, struct ibv_shpd *shpd) |
90 +{ |
157 +{ |
103 +struct ibv_pd *mlx4_share_pd(struct ibv_context *context, struct ibv_shpd *shpd, uint64_t share_key) |
170 +struct ibv_pd *mlx4_share_pd(struct ibv_context *context, struct ibv_shpd *shpd, uint64_t share_key) |
104 +{ |
171 +{ |
105 + struct ibv_share_pd cmd; |
172 + struct ibv_share_pd cmd; |
106 + struct mlx4_share_pd_resp resp; |
173 + struct mlx4_share_pd_resp resp; |
107 + struct mlx4_pd *pd; |
174 + struct mlx4_pd *pd; |
108 +#if defined(__SVR4) && defined(__sun) |
|
109 + mlnx_umap_pd_data_out_t *mdd; |
|
110 +#endif |
|
111 + |
175 + |
112 + pd = malloc(sizeof *pd); |
176 + pd = malloc(sizeof *pd); |
113 + if (!pd) |
177 + if (!pd) |
114 + return NULL; |
178 + return NULL; |
115 + |
179 + |
116 + if (ibv_cmd_share_pd(context, shpd, share_key, &pd->ibv_pd, &cmd, sizeof cmd, |
180 + if (ibv_cmd_share_pd(context, shpd, share_key, &pd->ibv_pd, &cmd, sizeof cmd, |
117 + &resp.ibv_resp, sizeof resp)) { |
181 + &resp.ibv_resp, sizeof resp)) { |
118 + free(pd); |
182 + free(pd); |
119 + return NULL; |
183 + return NULL; |
120 + } |
184 + } |
121 + |
|
122 +#if defined(__SVR4) && defined(__sun) |
|
123 + /* |
|
124 + * kernel driver passes back the PD table index as opaque data. This |
|
125 + * is required for specifying the PD in user space address vectors. |
|
126 + */ |
|
127 + mdd = (mlnx_umap_pd_data_out_t *) &resp.ibv_resp.drv_out; |
|
128 + pd->pdn = mdd->mpd_pdnum; |
|
129 +#else |
|
130 + pd->pdn = resp.pdn; |
185 + pd->pdn = resp.pdn; |
131 +#endif |
|
132 + |
|
133 + return &pd->ibv_pd; |
186 + return &pd->ibv_pd; |
134 +} |
187 +} |
135 + |
188 + |
136 int mlx4_free_pd(struct ibv_pd *pd) |
189 int mlx4_free_pd(struct ibv_pd *pd) |
137 { |
190 { |
138 int ret; |
191 int ret; |
139 @@ -138,6 +205,37 @@ |
192 @@ -138,6 +179,37 @@ |
140 return mr; |
193 return mr; |
141 } |
194 } |
142 |
195 |
143 +struct ibv_mr *mlx4_reg_mr_relaxed(struct ibv_pd *pd, void *addr, size_t length, |
196 +struct ibv_mr *mlx4_reg_mr_relaxed(struct ibv_pd *pd, void *addr, size_t length, |
144 + int access) |
197 + int access) |
202 +} |
255 +} |
203 + |
256 + |
204 static int align_queue_size(int req) |
257 static int align_queue_size(int req) |
205 { |
258 { |
206 int nent; |
259 int nent; |
207 @@ -168,6 +289,10 @@ |
260 @@ -168,6 +263,9 @@ |
208 struct mlx4_create_cq_resp resp; |
261 struct mlx4_create_cq_resp resp; |
209 struct mlx4_cq *cq; |
262 struct mlx4_cq *cq; |
210 int ret; |
263 int ret; |
211 +#if defined(__SVR4) && defined(__sun) |
264 +#if defined(__SVR4) && defined(__sun) |
212 + void *cqbuf; |
265 + void *cqbuf; |
213 + mlnx_umap_cq_data_out_t *mdd; |
|
214 +#endif |
266 +#endif |
215 |
267 |
216 /* Sanity check CQ size before proceeding */ |
268 /* Sanity check CQ size before proceeding */ |
217 if (cqe > 0x3fffff) |
269 if (cqe > 0x3fffff) |
218 @@ -184,7 +309,8 @@ |
270 @@ -184,7 +282,8 @@ |
219 |
271 |
220 cqe = align_queue_size(cqe + 1); |
272 cqe = align_queue_size(cqe + 1); |
221 |
273 |
222 - if (mlx4_alloc_cq_buf(to_mdev(context->device), &cq->buf, cqe)) |
274 - if (mlx4_alloc_cq_buf(to_mdev(context->device), &cq->buf, cqe)) |
223 +#if !(defined(__SVR4) && defined(__sun)) |
275 +#if !(defined(__SVR4) && defined(__sun)) |
224 + if (mlx4_alloc_cq_buf((to_mdev(context->device), &cq->buf, cqe)) |
276 + if (mlx4_alloc_cq_buf((to_mdev(context->device), &cq->buf, cqe)) |
225 goto err; |
277 goto err; |
226 |
278 |
227 cq->set_ci_db = mlx4_alloc_db(to_mctx(context), MLX4_DB_TYPE_CQ); |
279 cq->set_ci_db = mlx4_alloc_db(to_mctx(context), MLX4_DB_TYPE_CQ); |
228 @@ -198,15 +324,78 @@ |
280 @@ -198,15 +297,73 @@ |
229 |
281 |
230 cmd.buf_addr = (uintptr_t) cq->buf.buf; |
282 cmd.buf_addr = (uintptr_t) cq->buf.buf; |
231 cmd.db_addr = (uintptr_t) cq->set_ci_db; |
283 cmd.db_addr = (uintptr_t) cq->set_ci_db; |
232 +#else |
284 +#else |
233 + cq->buf.buf = NULL; |
285 + cq->buf.buf = NULL; |
237 +#endif |
289 +#endif |
238 |
290 |
239 ret = ibv_cmd_create_cq(context, cqe - 1, channel, comp_vector, |
291 ret = ibv_cmd_create_cq(context, cqe - 1, channel, comp_vector, |
240 &cq->ibv_cq, &cmd.ibv_cmd, sizeof cmd, |
292 &cq->ibv_cq, &cmd.ibv_cmd, sizeof cmd, |
241 &resp.ibv_resp, sizeof resp); |
293 &resp.ibv_resp, sizeof resp); |
242 +#if defined(__SVR4) && defined(__sun) |
|
243 if (ret) |
294 if (ret) |
|
295 +#if !(defined(__SVR4) && defined(__sun)) |
|
296 goto err_db; |
|
297 - |
|
298 cq->cqn = resp.cqn; |
|
299 +#else |
244 + goto err; |
300 + goto err; |
245 +#else |
301 |
246 + if (ret) |
|
247 goto err_db; |
|
248 +#endif |
|
249 |
|
250 cq->cqn = resp.cqn; |
|
251 |
|
252 +#if defined(__SVR4) && defined(__sun) |
|
253 + /* |
302 + /* |
254 + * For Solaris the kernel driver passes back mmap information for |
303 + * For Solaris the kernel driver passes back mmap information for |
255 + * mapping the CQ memory it allocated. |
304 + * mapping the CQ memory it allocated. |
256 + */ |
305 + */ |
257 + mdd = (mlnx_umap_cq_data_out_t *) &resp.ibv_resp.drv_out; |
306 + if (resp.mdd.mcq_rev < MLNX_UMAP_IF_VERSION) { |
258 + if (mdd->mcq_rev < MLNX_UMAP_IF_VERSION) { |
|
259 + fprintf(stderr, PFX "libmlx4_create_cq: libmlx4/hermon umap " |
307 + fprintf(stderr, PFX "libmlx4_create_cq: libmlx4/hermon umap " |
260 + "rev mismatch (kernel rev=%d)\n", mdd->mcq_rev); |
308 + "rev mismatch (kernel rev=%d)\n", resp.mdd.mcq_rev); |
261 + goto err_destroy; |
309 + goto err_destroy; |
262 + } |
310 + } |
263 + |
311 + |
264 + cqbuf = mmap64((void *)0, mdd->mcq_maplen, (PROT_READ | PROT_WRITE), |
312 + cqbuf = mmap64((void *)0, resp.mdd.mcq_maplen, (PROT_READ | PROT_WRITE), |
265 + MAP_SHARED, context->mmap_fd, mdd->mcq_mapoffset); |
313 + MAP_SHARED, context->mmap_fd, resp.mdd.mcq_mapoffset); |
266 + |
314 + |
267 + if (cqbuf == MAP_FAILED) |
315 + if (cqbuf == MAP_FAILED) |
268 + goto err_destroy; |
316 + goto err_destroy; |
269 + |
317 + |
270 + /* |
318 + /* |
271 + * Extract hardware driver values for the number of CQEs and the |
319 + * Extract hardware driver values for the number of CQEs and the |
272 + * hardware CQ number to use (needed for user space doorbells). |
320 + * hardware CQ number to use (needed for user space doorbells). |
273 + */ |
321 + */ |
274 + cqe = mdd->mcq_numcqe; |
322 + cqe = resp.mdd.mcq_numcqe; |
275 + cq->cqn = mdd->mcq_cqnum; |
323 + cq->cqn = resp.mdd.mcq_cqnum; |
276 + cq->buf.buf = cqbuf; |
324 + cq->buf.buf = cqbuf; |
277 + cq->buf.length = mdd->mcq_maplen; |
325 + cq->buf.length = resp.mdd.mcq_maplen; |
278 + cq->ibv_cq.cqe = cqe-1; |
326 + cq->ibv_cq.cqe = cqe-1; |
279 + |
327 + |
280 + /* |
328 + /* |
281 + * We map both poll and arm as seperate doorbells (OFED assumes 1 word |
329 + * We map both poll and arm as seperate doorbells (OFED assumes 1 word |
282 + * offset and just bumpts the address) since Solaris provides a |
330 + * offset and just bumps the address) since Solaris provides a |
283 + * separate offst. This will amount to the same thing (a second |
331 + * separate offst. This will amount to the same thing (a second |
284 + * reference to the first doorbell is added) but is more flexible. |
332 + * reference to the first doorbell is added) but is more flexible. |
285 + */ |
333 + */ |
286 + cq->set_ci_db = mlx4_alloc_db(to_mctx(context), |
334 + cq->set_ci_db = mlx4_alloc_db(to_mctx(context), |
287 + mdd->mcq_polldbr_mapoffset, |
335 + resp.mdd.mcq_polldbr_mapoffset, resp.mdd.mcq_polldbr_maplen, |
288 + mdd->mcq_polldbr_maplen, |
336 + resp.mdd.mcq_polldbr_offset); |
289 + mdd->mcq_polldbr_offset); |
337 + |
290 + if (cq->set_ci_db == NULL) |
338 + if (cq->set_ci_db == NULL) |
291 + goto err_buf; |
339 + goto err_buf; |
292 + |
340 + |
293 + cq->arm_db = mlx4_alloc_db(to_mctx(context), |
341 + cq->arm_db = mlx4_alloc_db(to_mctx(context), |
294 + mdd->mcq_armdbr_mapoffset, |
342 + resp.mdd.mcq_armdbr_mapoffset, resp.mdd.mcq_armdbr_maplen, |
295 + mdd->mcq_armdbr_maplen, |
343 + resp.mdd.mcq_armdbr_offset); |
296 + mdd->mcq_armdbr_offset); |
344 + |
297 + if (cq->arm_db == NULL) |
345 + if (cq->arm_db == NULL) |
298 + goto err_db; |
346 + goto err_db; |
299 + |
347 + |
300 + *cq->arm_db = 0; |
348 + *cq->arm_db = 0; |
301 + cq->arm_sn = 1; |
349 + cq->arm_sn = 1; |
302 + *cq->set_ci_db = 0; |
350 + *cq->set_ci_db = 0; |
303 +#endif |
351 +#endif |
304 return &cq->ibv_cq; |
352 return &cq->ibv_cq; |
305 |
353 |
306 err_db: |
354 err_db: |
307 @@ -215,6 +404,21 @@ |
355 @@ -215,6 +372,21 @@ |
308 err_buf: |
356 err_buf: |
309 mlx4_free_buf(&cq->buf); |
357 mlx4_free_buf(&cq->buf); |
310 |
358 |
311 +#if defined(__SVR4) && defined(__sun) |
359 +#if defined(__SVR4) && defined(__sun) |
312 +err_destroy: |
360 +err_destroy: |
324 + ibv_cmd_destroy_cq(&cq->ibv_cq); |
372 + ibv_cmd_destroy_cq(&cq->ibv_cq); |
325 +#endif |
373 +#endif |
326 err: |
374 err: |
327 free(cq); |
375 free(cq); |
328 |
376 |
329 @@ -225,12 +429,16 @@ |
377 @@ -227,10 +399,15 @@ |
330 { |
|
331 struct mlx4_cq *cq = to_mcq(ibcq); |
|
332 struct mlx4_resize_cq cmd; |
378 struct mlx4_resize_cq cmd; |
333 + struct ibv_resize_cq_resp resp; |
|
334 struct mlx4_buf buf; |
379 struct mlx4_buf buf; |
335 int old_cqe, outst_cqe, ret; |
380 int old_cqe, outst_cqe, ret; |
336 - |
381 - |
337 +#if defined(__SVR4) && defined(__sun) |
382 +#if !(defined(__SVR4) && defined(__sun)) |
338 + void *cqbuf; |
383 + struct ibv_resize_cq_resp resp; |
339 + mlnx_umap_cq_data_out_t *mdd; |
384 +#else |
|
385 + struct mlx4_resize_cq_resp resp; |
|
386 + void *cqbuf; |
340 +#endif |
387 +#endif |
341 /* Sanity check CQ size before proceeding */ |
388 /* Sanity check CQ size before proceeding */ |
342 if (cqe > 0x3fffff) |
389 if (cqe > 0x3fffff) |
343 - return EINVAL; |
390 - return EINVAL; |
344 + return EINVAL; |
391 + return EINVAL; |
345 |
392 |
346 pthread_spin_lock(&cq->lock); |
393 pthread_spin_lock(&cq->lock); |
347 |
394 |
348 @@ -247,32 +455,76 @@ |
395 @@ -247,32 +424,79 @@ |
349 goto out; |
396 goto out; |
350 } |
397 } |
351 |
398 |
352 +#if !(defined(__SVR4) && defined(__sun)) |
399 +#if !(defined(__SVR4) && defined(__sun)) |
353 ret = mlx4_alloc_cq_buf(to_mdev(ibcq->context->device), &buf, cqe); |
400 ret = mlx4_alloc_cq_buf(to_mdev(ibcq->context->device), &buf, cqe); |
362 #ifdef IBV_CMD_RESIZE_CQ_HAS_RESP_PARAMS |
409 #ifdef IBV_CMD_RESIZE_CQ_HAS_RESP_PARAMS |
363 - { |
410 - { |
364 - struct ibv_resize_cq_resp resp; |
411 - struct ibv_resize_cq_resp resp; |
365 - ret = ibv_cmd_resize_cq(ibcq, cqe - 1, &cmd.ibv_cmd, sizeof cmd, |
412 - ret = ibv_cmd_resize_cq(ibcq, cqe - 1, &cmd.ibv_cmd, sizeof cmd, |
366 + ret = ibv_cmd_resize_cq(ibcq, cqe - 1, &cmd.ibv_cmd, sizeof cmd, |
413 + ret = ibv_cmd_resize_cq(ibcq, cqe - 1, &cmd.ibv_cmd, sizeof cmd, |
|
414 +#if !(defined(__SVR4) && defined(__sun)) |
367 &resp, sizeof resp); |
415 &resp, sizeof resp); |
368 - } |
416 - } |
369 #else |
417 #else |
|
418 + &resp.ibv_resp, sizeof resp); |
|
419 +#endif |
|
420 +#else |
370 ret = ibv_cmd_resize_cq(ibcq, cqe - 1, &cmd.ibv_cmd, sizeof cmd); |
421 ret = ibv_cmd_resize_cq(ibcq, cqe - 1, &cmd.ibv_cmd, sizeof cmd); |
371 #endif |
422 #endif |
372 - if (ret) { |
423 - if (ret) { |
373 - mlx4_free_buf(&buf); |
424 - mlx4_free_buf(&buf); |
374 + |
425 + |
404 + } |
455 + } |
405 + /* |
456 + /* |
406 + * For Solaris the kernel driver passes back mmap information for |
457 + * For Solaris the kernel driver passes back mmap information for |
407 + * mapping the CQ memory it allocated. |
458 + * mapping the CQ memory it allocated. |
408 + */ |
459 + */ |
409 + mdd = (mlnx_umap_cq_data_out_t *) &resp.drv_out; |
460 + if (resp.mdd.mcq_rev < MLNX_UMAP_IF_VERSION) { |
410 + if (mdd->mcq_rev < MLNX_UMAP_IF_VERSION) { |
|
411 + fprintf(stderr, PFX "libmlx4_resize_cq: libmlx4/hermon umap " |
461 + fprintf(stderr, PFX "libmlx4_resize_cq: libmlx4/hermon umap " |
412 + "rev mismatch (kernel rev=%d)\n", mdd->mcq_rev); |
462 + "rev mismatch (kernel rev=%d)\n", resp.mdd.mcq_rev); |
413 + ret = EINVAL; |
463 + ret = EINVAL; |
414 + goto out; |
464 + goto out; |
415 + } |
465 + } |
416 |
466 |
417 + cqbuf = mmap64((void *)0, mdd->mcq_maplen, (PROT_READ | PROT_WRITE), |
467 + cqbuf = mmap64((void *)0, resp.mdd.mcq_maplen, (PROT_READ | PROT_WRITE), |
418 + MAP_SHARED, ibcq->context->mmap_fd, mdd->mcq_mapoffset); |
468 + MAP_SHARED, ibcq->context->mmap_fd, resp.mdd.mcq_mapoffset); |
419 + |
469 + |
420 + if (cqbuf == MAP_FAILED) { |
470 + if (cqbuf == MAP_FAILED) { |
421 + ret = EINVAL; |
471 + ret = EINVAL; |
422 + goto out; |
472 + goto out; |
423 + } |
473 + } |
424 + cq->buf.buf = buf.buf; |
474 + cq->buf.buf = buf.buf; |
425 + cq->buf.length = buf.length; |
475 + cq->buf.length = buf.length; |
426 + mlx4_cq_resize_copy_cqes(cq, cqbuf, old_cqe); |
476 + mlx4_cq_resize_copy_cqes(cq, cqbuf, old_cqe); |
427 + cq->buf.buf = cqbuf; |
477 + cq->buf.buf = cqbuf; |
428 + cq->buf.length = mdd->mcq_maplen; |
478 + cq->buf.length = resp.mdd.mcq_maplen; |
429 + free(buf.buf); |
479 + free(buf.buf); |
430 + cq->ibv_cq.cqe = mdd->mcq_numcqe - 1; |
480 + cq->ibv_cq.cqe = resp.mdd.mcq_numcqe - 1; |
431 + cq->cqn = mdd->mcq_cqnum; |
481 + cq->cqn = resp.mdd.mcq_cqnum; |
432 +#endif |
482 +#endif |
433 out: |
483 out: |
434 pthread_spin_unlock(&cq->lock); |
484 pthread_spin_unlock(&cq->lock); |
435 return ret; |
485 return ret; |
436 @@ -287,6 +539,9 @@ |
486 @@ -287,6 +511,9 @@ |
437 return ret; |
487 return ret; |
438 |
488 |
439 mlx4_free_db(to_mctx(cq->context), MLX4_DB_TYPE_CQ, to_mcq(cq)->set_ci_db); |
489 mlx4_free_db(to_mctx(cq->context), MLX4_DB_TYPE_CQ, to_mcq(cq)->set_ci_db); |
440 +#if defined(__SVR4) && defined(__sun) |
490 +#if defined(__SVR4) && defined(__sun) |
441 + mlx4_free_db(to_mctx(cq->context), MLX4_DB_TYPE_CQ, to_mcq(cq)->arm_db); |
491 + mlx4_free_db(to_mctx(cq->context), MLX4_DB_TYPE_CQ, to_mcq(cq)->arm_db); |
442 +#endif |
492 +#endif |
443 mlx4_free_buf(&to_mcq(cq)->buf); |
493 mlx4_free_buf(&to_mcq(cq)->buf); |
444 free(to_mcq(cq)); |
494 free(to_mcq(cq)); |
445 |
495 |
446 @@ -300,6 +555,10 @@ |
496 @@ -300,6 +527,9 @@ |
447 struct mlx4_create_srq_resp resp; |
497 struct mlx4_create_srq_resp resp; |
448 struct mlx4_srq *srq; |
498 struct mlx4_srq *srq; |
449 int ret; |
499 int ret; |
450 +#if defined(__SVR4) && defined(__sun) |
500 +#if defined(__SVR4) && defined(__sun) |
451 + mlnx_umap_srq_data_out_t *mdd; |
|
452 + void *srqbuf; |
501 + void *srqbuf; |
453 +#endif |
502 +#endif |
454 |
503 |
455 /* Sanity check SRQ size before proceeding */ |
504 /* Sanity check SRQ size before proceeding */ |
456 if (attr->attr.max_wr > 1 << 16 || attr->attr.max_sge > 64) |
505 if (attr->attr.max_wr > 1 << 16 || attr->attr.max_sge > 64) |
457 @@ -312,6 +571,7 @@ |
506 @@ -312,6 +542,7 @@ |
458 if (pthread_spin_init(&srq->lock, PTHREAD_PROCESS_PRIVATE)) |
507 if (pthread_spin_init(&srq->lock, PTHREAD_PROCESS_PRIVATE)) |
459 goto err; |
508 goto err; |
460 |
509 |
461 +#if !(defined(__SVR4) && defined(__sun)) |
510 +#if !(defined(__SVR4) && defined(__sun)) |
462 srq->max = align_queue_size(attr->attr.max_wr + 1); |
511 srq->max = align_queue_size(attr->attr.max_wr + 1); |
463 srq->max_gs = attr->attr.max_sge; |
512 srq->max_gs = attr->attr.max_sge; |
464 srq->counter = 0; |
513 srq->counter = 0; |
465 @@ -324,7 +584,23 @@ |
514 @@ -327,23 +558,118 @@ |
466 goto err_free; |
515 |
467 |
516 cmd.buf_addr = (uintptr_t) srq->buf.buf; |
468 *srq->db = 0; |
517 cmd.db_addr = (uintptr_t) srq->db; |
469 +#else |
518 +#else |
470 + /* |
519 + /* |
471 + * Solaris SRQ WQE memory is supplied by the kernel; we'll update |
520 + * Solaris SRQ WQE memory is supplied by the kernel; we'll update |
472 + * these after the creation. |
521 + * these after the creation. |
473 + */ |
522 + */ |
481 + * will round up to the nearest power of 2 as align_queue_size() |
530 + * will round up to the nearest power of 2 as align_queue_size() |
482 + * does for OFED. |
531 + * does for OFED. |
483 + */ |
532 + */ |
484 + attr->attr.max_wr += 1; |
533 + attr->attr.max_wr += 1; |
485 +#endif |
534 +#endif |
486 cmd.buf_addr = (uintptr_t) srq->buf.buf; |
535 + |
487 cmd.db_addr = (uintptr_t) srq->db; |
|
488 |
|
489 @@ -331,19 +607,97 @@ |
|
490 ret = ibv_cmd_create_srq(pd, &srq->ibv_srq, attr, |
536 ret = ibv_cmd_create_srq(pd, &srq->ibv_srq, attr, |
491 &cmd.ibv_cmd, sizeof cmd, |
537 &cmd.ibv_cmd, sizeof cmd, |
492 &resp.ibv_resp, sizeof resp); |
538 &resp.ibv_resp, sizeof resp); |
493 +#if defined(__SVR4) && defined(__sun) |
539 +#if defined(__SVR4) && defined(__sun) |
494 + if (ret) { |
540 + if (ret) { |
498 + /* |
544 + /* |
499 + * The kernel driver passes back mmap information for mapping the |
545 + * The kernel driver passes back mmap information for mapping the |
500 + * SRQ work queue memory it allocated and the doorbell for |
546 + * SRQ work queue memory it allocated and the doorbell for |
501 + * for posting. |
547 + * for posting. |
502 + */ |
548 + */ |
503 + mdd = (mlnx_umap_srq_data_out_t *) &resp.ibv_resp.drv_out; |
549 + if (resp.mdd.msrq_rev < 1) { |
504 + if (mdd->msrq_rev < 1) { |
|
505 + fprintf(stderr, PFX "libmlx4_create_srq libmlx4/hermon umap " |
550 + fprintf(stderr, PFX "libmlx4_create_srq libmlx4/hermon umap " |
506 + "rev mismatch (kernel rev=%d)\n", mdd->msrq_rev); |
551 + "rev mismatch (kernel rev=%d)\n", resp.mdd.msrq_rev); |
507 + goto err_destroy; |
552 + goto err_destroy; |
508 + } |
553 + } |
509 + |
554 + |
510 + srqbuf = mmap64((void *)0, mdd->msrq_maplen, (PROT_READ | PROT_WRITE), |
555 + srqbuf = mmap64((void *)0, resp.mdd.msrq_maplen, |
511 + MAP_SHARED, pd->context->mmap_fd, mdd->msrq_mapoffset); |
556 + (PROT_READ | PROT_WRITE), MAP_SHARED, pd->context->mmap_fd, |
|
557 + resp.mdd.msrq_mapoffset); |
512 + |
558 + |
513 + if (srqbuf == MAP_FAILED) { |
559 + if (srqbuf == MAP_FAILED) { |
514 + goto err_destroy; |
560 + goto err_destroy; |
515 + } |
561 + } |
516 + |
562 + |
517 + srq->buf.buf = srqbuf; |
563 + srq->buf.buf = srqbuf; |
518 + srq->buf.length = mdd->msrq_maplen; |
564 + srq->buf.length = resp.mdd.msrq_maplen; |
519 + srq->max = resp.ibv_resp.max_wr; |
565 + srq->max = resp.ibv_resp.max_wr; |
520 + srq->max_gs = resp.ibv_resp.max_sge; |
566 + srq->max_gs = resp.ibv_resp.max_sge; |
521 + srq->srqn = mdd->msrq_srqnum; |
567 + srq->srqn = resp.mdd.msrq_srqnum; |
522 + srq->counter = 0; |
568 + srq->counter = 0; |
523 + |
569 + |
524 + srq->db = mlx4_alloc_db(to_mctx(pd->context), |
570 + srq->db = mlx4_alloc_db(to_mctx(pd->context), |
525 + mdd->msrq_rdbr_mapoffset, |
571 + resp.mdd.msrq_rdbr_mapoffset, resp.mdd.msrq_rdbr_maplen, |
526 + mdd->msrq_rdbr_maplen, |
572 + resp.mdd.msrq_rdbr_offset); |
527 + mdd->msrq_rdbr_offset); |
|
528 + if (srq->db == NULL) { |
573 + if (srq->db == NULL) { |
529 + goto err_unmap; |
574 + goto err_unmap; |
530 + } |
575 + } |
531 + |
576 + |
532 + /* |
577 + /* |
533 + * The following call only initializes memory and control structures, |
578 + * The following call only initializes memory and control structures, |
534 + * it utilizes the memory allocated by the kernel. |
579 + * it utilizes the memory allocated by the kernel. |
535 + * It also allocates the srq->wrid memory. |
580 + * It also allocates the srq->wrid memory. |
536 + */ |
581 + */ |
537 + if (mlx4_set_srq_buf(pd, srq, mdd->msrq_wqesz, mdd->msrq_numwqe)) { |
582 + if (mlx4_set_srq_buf(pd, srq, resp.mdd.msrq_wqesz, |
|
583 + resp.mdd.msrq_numwqe)) { |
538 + goto err_db; |
584 + goto err_db; |
539 + } |
585 + } |
540 + |
586 + |
541 + /* |
587 + /* |
542 + * The rturned max wr will have been rounded up to the nearest |
588 + * The rturned max wr will have been rounded up to the nearest |
617 + return (ret); |
663 + return (ret); |
618 +#endif |
664 +#endif |
619 } |
665 } |
620 |
666 |
621 int mlx4_destroy_srq(struct ibv_srq *ibsrq) |
667 int mlx4_destroy_srq(struct ibv_srq *ibsrq) |
622 @@ -447,6 +820,10 @@ |
668 @@ -443,12 +788,16 @@ |
|
669 struct ibv_qp *mlx4_create_qp(struct ibv_pd *pd, struct ibv_qp_init_attr *attr) |
|
670 { |
|
671 struct mlx4_create_qp cmd; |
|
672 - struct ibv_create_qp_resp resp; |
623 struct mlx4_qp *qp; |
673 struct mlx4_qp *qp; |
624 int ret; |
674 int ret; |
625 struct mlx4_context *context = to_mctx(pd->context); |
675 struct mlx4_context *context = to_mctx(pd->context); |
626 +#if defined(__SVR4) && defined(__sun) |
676 +#if !(defined(__SVR4) && defined(__sun)) |
627 + mlnx_umap_qp_data_out_t *mdd; |
677 + struct ibv_create_qp_resp resp; |
628 + void *qpbuf; |
678 +#else |
629 +#endif |
679 + struct mlx4_create_qp_resp resp; |
630 |
680 + void *qpbuf; |
631 |
681 +#endif |
|
682 |
|
683 - |
632 /* Sanity check QP size before proceeding */ |
684 /* Sanity check QP size before proceeding */ |
633 @@ -457,6 +834,7 @@ |
685 if (verify_sizes(attr, context)) |
|
686 return NULL; |
|
687 @@ -457,6 +806,7 @@ |
634 if (!qp) |
688 if (!qp) |
635 return NULL; |
689 return NULL; |
636 |
690 |
637 +#if !(defined(__SVR4) && defined(__sun)) |
691 +#if !(defined(__SVR4) && defined(__sun)) |
638 mlx4_calc_sq_wqe_size(&attr->cap, attr->qp_type, qp); |
692 mlx4_calc_sq_wqe_size(&attr->cap, attr->qp_type, qp); |
639 |
693 |
640 /* |
694 /* |
641 @@ -466,6 +844,7 @@ |
695 @@ -466,6 +816,7 @@ |
642 qp->sq_spare_wqes = (2048 >> qp->sq.wqe_shift) + 1; |
696 qp->sq_spare_wqes = (2048 >> qp->sq.wqe_shift) + 1; |
643 qp->sq.wqe_cnt = align_queue_size(attr->cap.max_send_wr + qp->sq_spare_wqes); |
697 qp->sq.wqe_cnt = align_queue_size(attr->cap.max_send_wr + qp->sq_spare_wqes); |
644 qp->rq.wqe_cnt = align_queue_size(attr->cap.max_recv_wr); |
698 qp->rq.wqe_cnt = align_queue_size(attr->cap.max_recv_wr); |
645 +#endif |
699 +#endif |
646 |
700 |
647 if (attr->srq || attr->qp_type == IBV_QPT_XRC) |
701 if (attr->srq || attr->qp_type == IBV_QPT_XRC) |
648 attr->cap.max_recv_wr = qp->rq.wqe_cnt = 0; |
702 attr->cap.max_recv_wr = qp->rq.wqe_cnt = 0; |
649 @@ -476,6 +855,22 @@ |
703 @@ -476,6 +827,22 @@ |
650 attr->cap.max_recv_wr = 1; |
704 attr->cap.max_recv_wr = 1; |
651 } |
705 } |
652 |
706 |
653 +#if defined(__SVR4) && defined(__sun) |
707 +#if defined(__SVR4) && defined(__sun) |
654 + if (pthread_spin_init(&qp->sq.lock, PTHREAD_PROCESS_PRIVATE) || |
708 + if (pthread_spin_init(&qp->sq.lock, PTHREAD_PROCESS_PRIVATE) || |
667 + memset(&cmd, 0, sizeof(cmd)); |
721 + memset(&cmd, 0, sizeof(cmd)); |
668 +#else |
722 +#else |
669 if (mlx4_alloc_qp_buf(pd, &attr->cap, attr->qp_type, qp)) |
723 if (mlx4_alloc_qp_buf(pd, &attr->cap, attr->qp_type, qp)) |
670 goto err; |
724 goto err; |
671 |
725 |
672 @@ -505,17 +900,84 @@ |
726 @@ -505,10 +872,12 @@ |
673 ; /* nothing */ |
727 ; /* nothing */ |
674 cmd.sq_no_prefetch = 0; /* OK for ABI 2: just a reserved field */ |
728 cmd.sq_no_prefetch = 0; /* OK for ABI 2: just a reserved field */ |
675 memset(cmd.reserved, 0, sizeof cmd.reserved); |
729 memset(cmd.reserved, 0, sizeof cmd.reserved); |
676 +#endif |
730 +#endif |
677 |
731 |
678 pthread_mutex_lock(&to_mctx(pd->context)->qp_table_mutex); |
732 pthread_mutex_lock(&to_mctx(pd->context)->qp_table_mutex); |
679 |
733 |
680 ret = ibv_cmd_create_qp(pd, &qp->ibv_qp, attr, &cmd.ibv_cmd, sizeof cmd, |
734 ret = ibv_cmd_create_qp(pd, &qp->ibv_qp, attr, &cmd.ibv_cmd, sizeof cmd, |
|
735 +#if !(defined(__SVR4) && defined(__sun)) |
681 &resp, sizeof resp); |
736 &resp, sizeof resp); |
682 +#if defined(__SVR4) && defined(__sun) |
|
683 if (ret) |
737 if (ret) |
|
738 goto err_rq_db; |
|
739 @@ -516,6 +885,70 @@ |
|
740 ret = mlx4_store_qp(to_mctx(pd->context), qp->ibv_qp.qp_num, qp); |
|
741 if (ret) |
|
742 goto err_destroy; |
|
743 +#else |
|
744 + &resp.ibv_resp, sizeof resp); |
|
745 + if (ret) |
684 + goto err_free; |
746 + goto err_free; |
685 + |
747 + |
686 + /* |
748 + /* |
687 + * The kernel driver passes back mmap information for mapping the |
749 + * The kernel driver passes back mmap information for mapping the |
688 + * QP work queue memory it allocated back into user space. |
750 + * QP work queue memory it allocated back into user space. |
689 + */ |
751 + */ |
690 + mdd = (mlnx_umap_qp_data_out_t *) &resp.drv_out; |
752 + if (resp.mdd.mqp_rev < 2) { |
691 + if (mdd->mqp_rev < 2) { |
|
692 + fprintf(stderr, PFX "libmlx4_create_qp: libmlx4/hermon umap " |
753 + fprintf(stderr, PFX "libmlx4_create_qp: libmlx4/hermon umap " |
693 + "rev mismatch (kernel rev=%d)\n", mdd->mqp_rev); |
754 + "rev mismatch (kernel rev=%d)\n", resp.mdd.mqp_rev); |
694 + goto err_destroy; |
755 + goto err_destroy; |
695 + } |
756 + } |
696 + qpbuf = mmap64((void *)0, mdd->mqp_maplen, (PROT_READ | PROT_WRITE), |
757 + qpbuf = mmap64((void *)0, resp.mdd.mqp_maplen, (PROT_READ | PROT_WRITE), |
697 + MAP_SHARED, pd->context->mmap_fd, mdd->mqp_mapoffset); |
758 + MAP_SHARED, pd->context->mmap_fd, resp.mdd.mqp_mapoffset); |
698 + |
759 + |
699 + if (qpbuf == MAP_FAILED) |
760 + if (qpbuf == MAP_FAILED) |
700 + goto err_destroy; |
761 + goto err_destroy; |
701 + |
762 + |
702 + /* |
763 + /* |
703 + * Need to set qp->buf here in case alloc_db fails then |
764 + * Need to set qp->buf here in case alloc_db fails then |
704 + * we'll call mlx4_free_buf() to umap. |
765 + * we'll call mlx4_free_buf() to umap. |
705 + */ |
766 + */ |
706 + qp->buf.buf = qpbuf; |
767 + qp->buf.buf = qpbuf; |
707 + qp->buf.length = mdd->mqp_maplen; |
768 + qp->buf.length = resp.mdd.mqp_maplen; |
708 + |
769 + |
709 + if (!attr->srq && attr->qp_type != IBV_QPT_XRC) { |
770 + if (!attr->srq && attr->qp_type != IBV_QPT_XRC) { |
710 + qp->db = mlx4_alloc_db(to_mctx(pd->context), |
771 + qp->db = mlx4_alloc_db(to_mctx(pd->context), |
711 + mdd->mqp_rdbr_mapoffset, |
772 + resp.mdd.mqp_rdbr_mapoffset, resp.mdd.mqp_rdbr_maplen, |
712 + mdd->mqp_rdbr_maplen, |
773 + resp.mdd.mqp_rdbr_offset); |
713 + mdd->mqp_rdbr_offset); |
|
714 + if (qp->db == NULL) |
774 + if (qp->db == NULL) |
715 + goto err_buf; |
775 + goto err_buf; |
716 + |
776 + |
717 + *qp->db = 0; |
777 + *qp->db = 0; |
718 + } |
778 + } |
723 + * send queue. |
783 + * send queue. |
724 + * Note: mqp_sq_numwqe includes the head room wqes. The private |
784 + * Note: mqp_sq_numwqe includes the head room wqes. The private |
725 + * wqe.cnt also includes headroom wqes, the verbs count |
785 + * wqe.cnt also includes headroom wqes, the verbs count |
726 + * should reflect the wqe count that is usable. |
786 + * should reflect the wqe count that is usable. |
727 + */ |
787 + */ |
728 + qp->sq_spare_wqes = mdd->mqp_sq_headroomwqes; |
788 + qp->sq_spare_wqes = resp.mdd.mqp_sq_headroomwqes; |
729 + qp->sq.wqe_cnt = mdd->mqp_sq_numwqe; |
789 + qp->sq.wqe_cnt = resp.mdd.mqp_sq_numwqe; |
730 + |
790 + |
731 + if (attr->srq) |
791 + if (attr->srq) |
732 + qp->rq.wqe_cnt = 0; |
792 + qp->rq.wqe_cnt = 0; |
733 + else |
793 + else |
734 + qp->rq.wqe_cnt = mdd->mqp_rq_numwqe; |
794 + qp->rq.wqe_cnt = resp.mdd.mqp_rq_numwqe; |
735 + |
795 + |
736 + if (mlx4_set_qp_buf(pd, qp, qpbuf, mdd->mqp_maplen, |
796 + if (mlx4_set_qp_buf(pd, qp, qpbuf, resp.mdd.mqp_maplen, |
737 + mdd->mqp_rq_wqesz, mdd->mqp_rq_off, |
797 + resp.mdd.mqp_rq_wqesz, resp.mdd.mqp_rq_off, |
738 + mdd->mqp_sq_wqesz, mdd->mqp_sq_off)) |
798 + resp.mdd.mqp_sq_wqesz, resp.mdd.mqp_sq_off)) |
739 goto err_rq_db; |
799 + goto err_rq_db; |
740 |
800 + |
741 + mlx4_init_qp_indices(qp); |
801 + mlx4_init_qp_indices(qp); |
742 + |
802 + |
743 ret = mlx4_store_qp(to_mctx(pd->context), qp->ibv_qp.qp_num, qp); |
803 + ret = mlx4_store_qp(to_mctx(pd->context), qp->ibv_qp.qp_num, qp); |
744 if (ret) |
|
745 + goto err_rq_db; |
|
746 +#else |
|
747 + if (ret) |
804 + if (ret) |
748 + goto err_rq_db; |
805 + goto err_rq_db; |
749 + |
|
750 + ret = mlx4_store_qp(to_mctx(pd->context), qp->ibv_qp.qp_num, qp); |
|
751 + if (ret) |
|
752 goto err_destroy; |
|
753 +#endif |
806 +#endif |
754 pthread_mutex_unlock(&to_mctx(pd->context)->qp_table_mutex); |
807 pthread_mutex_unlock(&to_mctx(pd->context)->qp_table_mutex); |
755 |
808 |
756 qp->rq.wqe_cnt = attr->cap.max_recv_wr; |
809 qp->rq.wqe_cnt = attr->cap.max_recv_wr; |
757 @@ -536,9 +998,38 @@ |
810 @@ -536,9 +969,38 @@ |
758 |
811 |
759 return &qp->ibv_qp; |
812 return &qp->ibv_qp; |
760 |
813 |
761 +#if defined(__SVR4) && defined(__sun) |
814 +#if defined(__SVR4) && defined(__sun) |
762 +err_rq_db: |
815 +err_rq_db: |
834 + if (ctx->ibv_ctx.device->blueflame_enabled && nreq == 1 && inl && |
887 + if (ctx->ibv_ctx.device->blueflame_enabled && nreq == 1 && inl && |
835 + size > 1 && size < ctx->bf_buf_size / 16) { |
888 + size > 1 && size < ctx->bf_buf_size / 16) { |
836 ctrl->owner_opcode |= htonl((qp->sq.head & 0xffff) << 8); |
889 ctrl->owner_opcode |= htonl((qp->sq.head & 0xffff) << 8); |
837 *(uint32_t *) (&ctrl->vlan_tag) |= qp->doorbell_qpn; |
890 *(uint32_t *) (&ctrl->vlan_tag) |= qp->doorbell_qpn; |
838 /* |
891 /* |
839 @@ -589,6 +590,58 @@ |
892 @@ -589,6 +590,59 @@ |
840 ; /* nothing */ |
893 ; /* nothing */ |
841 } |
894 } |
842 |
895 |
843 +#if defined(__SVR4) && defined(__sun) |
896 +#if defined(__SVR4) && defined(__sun) |
844 +int mlx4_set_qp_buf(struct ibv_pd *pd, struct mlx4_qp *qp, void *qpbuf, |
897 +int mlx4_set_qp_buf(struct ibv_pd *pd, struct mlx4_qp *qp, void *qpbuf, |
845 + uint64_t buflen, uint32_t rq_wqesz, uint32_t rq_off, |
898 + uint64_t buflen, uint32_t rq_wqesz, uint32_t rq_off, |
846 + uint32_t sq_wqesz, uint32_t sq_off) |
899 + uint32_t sq_wqesz, uint32_t sq_off) |
847 +{ |
900 +{ |
848 + qp->buf.buf = qpbuf; |
901 + qp->buf.buf = qpbuf; |
849 + qp->buf.length = buflen; |
902 + qp->buf.length = buflen; |
850 + |
903 + |
851 + qp->sq.wrid = malloc(qp->sq.wqe_cnt * sizeof (uint64_t)); |
904 + qp->sq.wrid = malloc(qp->sq.wqe_cnt * sizeof (uint64_t)); |
879 + qp->rq.offset = qp->sq.wqe_cnt << qp->sq.wqe_shift; |
932 + qp->rq.offset = qp->sq.wqe_cnt << qp->sq.wqe_shift; |
880 + qp->sq.offset = 0; |
933 + qp->sq.offset = 0; |
881 + } |
934 + } |
882 + |
935 + |
883 + if ((long int)qp->buf.length < (long int)qp->buf_size) { |
936 + if ((long int)qp->buf.length < (long int)qp->buf_size) { |
884 + fprintf(stderr, PFX "QP kernel buffer size %d < user buf size %d\n", |
937 + fprintf(stderr, PFX "QP kernel buffer size %lu < user buf " |
885 + qp->buf.length, qp->buf_size); |
938 + "size %d\n", (unsigned long)qp->buf.length, qp->buf_size); |
886 + } |
939 + } |
887 + if ((!rq_off && qp->rq.offset) || (!sq_off && qp->sq.offset)) { |
940 + if ((!rq_off && qp->rq.offset) || (!sq_off && qp->sq.offset)) { |
888 + fprintf(stderr, PFX "QP kernel and user out of sync on buffer order\n"); |
941 + fprintf(stderr, PFX "QP kernel and user out of sync on " |
|
942 + "buffer order\n"); |
889 + } |
943 + } |
890 + |
944 + |
891 + memset(qp->buf.buf, 0, qp->buf_size); |
945 + memset(qp->buf.buf, 0, qp->buf_size); |
892 + return 0; |
946 + return 0; |
893 +} |
947 +} |
1233 + uint32_t temp_qp_num; |
1287 + uint32_t temp_qp_num; |
1234 +#endif |
1288 +#endif |
1235 |
1289 |
1236 context = calloc(1, sizeof *context); |
1290 context = calloc(1, sizeof *context); |
1237 if (!context) |
1291 if (!context) |
1238 @@ -150,11 +160,30 @@ |
1292 @@ -150,11 +160,29 @@ |
1239 return NULL; |
1293 return NULL; |
1240 |
1294 |
1241 context->ibv_ctx.cmd_fd = cmd_fd; |
1295 context->ibv_ctx.cmd_fd = cmd_fd; |
|
1296 - |
1242 +#if defined(__SVR4) && defined(__sun) |
1297 +#if defined(__SVR4) && defined(__sun) |
1243 + context->ibv_ctx.device = ibdev; |
1298 + context->ibv_ctx.device = ibdev; |
1244 +#endif |
1299 +#endif |
1245 |
|
1246 if (ibv_cmd_get_context(&context->ibv_ctx, &cmd, sizeof cmd, |
1300 if (ibv_cmd_get_context(&context->ibv_ctx, &cmd, sizeof cmd, |
1247 &resp.ibv_resp, sizeof resp)) |
1301 &resp.ibv_resp, sizeof resp)) |
1248 goto err_free; |
1302 goto err_free; |
1249 |
1303 |
1250 +#if defined(__SVR4) && defined(__sun) |
1304 +#if defined(__SVR4) && defined(__sun) |
1264 + resp.bf_reg_size = 512; |
1318 + resp.bf_reg_size = 512; |
1265 +#endif |
1319 +#endif |
1266 context->num_qps = resp.qp_tab_size; |
1320 context->num_qps = resp.qp_tab_size; |
1267 context->qp_table_shift = ffs(context->num_qps) - 1 - MLX4_QP_TABLE_BITS; |
1321 context->qp_table_shift = ffs(context->num_qps) - 1 - MLX4_QP_TABLE_BITS; |
1268 context->qp_table_mask = (1 << context->qp_table_shift) - 1; |
1322 context->qp_table_mask = (1 << context->qp_table_shift) - 1; |
1269 @@ -172,20 +201,44 @@ |
1323 @@ -172,20 +200,45 @@ |
1270 for (i = 0; i < MLX4_XRC_SRQ_TABLE_SIZE; ++i) |
1324 for (i = 0; i < MLX4_XRC_SRQ_TABLE_SIZE; ++i) |
1271 context->xrc_srq_table[i].refcnt = 0; |
1325 context->xrc_srq_table[i].refcnt = 0; |
1272 |
1326 |
1273 +#if defined(__SVR4) && defined(__sun) |
1327 +#if defined(__SVR4) && defined(__sun) |
1274 + context->db_page_list = NULL; |
1328 + context->db_page_list = NULL; |
1296 +#if defined(__SVR4) && defined(__sun) |
1350 +#if defined(__SVR4) && defined(__sun) |
1297 + /* |
1351 + /* |
1298 + * If kernel driver is supporting Blue Flame feature, map |
1352 + * If kernel driver is supporting Blue Flame feature, map |
1299 + * the Blue Flame user access region as well. |
1353 + * the Blue Flame user access region as well. |
1300 + */ |
1354 + */ |
1301 + uarpg_offset = (((off64_t) cur_pid << MLNX_UMAP_RSRC_TYPE_SHIFT) | |
1355 + uarpg_offset = (((off64_t) cur_pid << MLNX_UMAP_RSRC_TYPE_SHIFT) |
1302 + MLNX_UMAP_BLUEFLAMEPG_RSRC) * to_mdev(ibdev)->page_size; |
1356 + | MLNX_UMAP_BLUEFLAMEPG_RSRC) * to_mdev(ibdev)->page_size; |
|
1357 + |
1303 + context->bf_page = mmap64((void *)0, to_mdev(ibdev)->page_size, |
1358 + context->bf_page = mmap64((void *)0, to_mdev(ibdev)->page_size, |
1304 + PROT_WRITE, MAP_SHARED, context->ibv_ctx.mmap_fd, |
1359 + PROT_WRITE, MAP_SHARED, context->ibv_ctx.mmap_fd, |
1305 + uarpg_offset); |
1360 + uarpg_offset); |
1306 +#else |
1361 +#else |
1307 context->bf_page = mmap(NULL, to_mdev(ibdev)->page_size, |
1362 context->bf_page = mmap(NULL, to_mdev(ibdev)->page_size, |
1308 PROT_WRITE, MAP_SHARED, cmd_fd, |
1363 PROT_WRITE, MAP_SHARED, cmd_fd, |
1309 to_mdev(ibdev)->page_size); |
1364 to_mdev(ibdev)->page_size); |
1310 +#endif |
1365 +#endif |