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1 #ifndef __SPARC_ARCH_H__ |
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2 # define __SPARC_ARCH_H__ |
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3 |
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4 # define SPARCV9_TICK_PRIVILEGED (1<<0) |
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5 # define SPARCV9_PREFER_FPU (1<<1) |
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6 # define SPARCV9_VIS1 (1<<2) |
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7 # define SPARCV9_VIS2 (1<<3)/* reserved */ |
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8 # define SPARCV9_FMADD (1<<4)/* reserved for SPARC64 V */ |
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9 # define SPARCV9_BLK (1<<5)/* VIS1 block copy */ |
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10 # define SPARCV9_VIS3 (1<<6) |
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11 # define SPARCV9_RANDOM (1<<7) |
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12 # define SPARCV9_64BIT_STACK (1<<8) |
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13 |
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14 /* |
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15 * OPENSSL_sparcv9cap_P[1] is copy of Compatibility Feature Register, |
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16 * %asr26, SPARC-T4 and later. There is no SPARCV9_CFR bit in |
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17 * OPENSSL_sparcv9cap_P[0], as %cfr copy is sufficient... |
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18 */ |
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19 # define CFR_AES 0x00000001/* Supports AES opcodes */ |
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20 # define CFR_DES 0x00000002/* Supports DES opcodes */ |
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21 # define CFR_KASUMI 0x00000004/* Supports KASUMI opcodes */ |
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22 # define CFR_CAMELLIA 0x00000008/* Supports CAMELLIA opcodes */ |
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23 # define CFR_MD5 0x00000010/* Supports MD5 opcodes */ |
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24 # define CFR_SHA1 0x00000020/* Supports SHA1 opcodes */ |
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25 # define CFR_SHA256 0x00000040/* Supports SHA256 opcodes */ |
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26 # define CFR_SHA512 0x00000080/* Supports SHA512 opcodes */ |
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27 # define CFR_MPMUL 0x00000100/* Supports MPMUL opcodes */ |
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28 # define CFR_MONTMUL 0x00000200/* Supports MONTMUL opcodes */ |
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29 # define CFR_MONTSQR 0x00000400/* Supports MONTSQR opcodes */ |
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30 # define CFR_CRC32C 0x00000800/* Supports CRC32C opcodes */ |
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31 |
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32 # if defined(OPENSSL_PIC) && !defined(__PIC__) |
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33 # define __PIC__ |
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34 # endif |
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35 |
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36 # if defined(__SUNPRO_C) && defined(__sparcv9) && !defined(__arch64__) |
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37 # define __arch64__ |
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38 # endif |
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39 |
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40 # define SPARC_PIC_THUNK(reg) \ |
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41 .align 32; \ |
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42 .Lpic_thunk: \ |
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43 jmp %o7 + 8; \ |
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44 add %o7, reg, reg; |
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45 |
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46 # define SPARC_PIC_THUNK_CALL(reg) \ |
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47 sethi %hi(_GLOBAL_OFFSET_TABLE_-4), reg; \ |
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48 call .Lpic_thunk; \ |
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49 or reg, %lo(_GLOBAL_OFFSET_TABLE_+4), reg; |
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50 |
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51 # if 1 |
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52 # define SPARC_SETUP_GOT_REG(reg) SPARC_PIC_THUNK_CALL(reg) |
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53 # else |
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54 # define SPARC_SETUP_GOT_REG(reg) \ |
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55 sethi %hi(_GLOBAL_OFFSET_TABLE_-4), reg; \ |
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56 call .+8; \ |
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57 or reg,%lo(_GLOBAL_OFFSET_TABLE_+4), reg; \ |
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58 add %o7, reg, reg |
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59 # endif |
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60 |
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61 # if defined(__arch64__) |
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62 |
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63 # define SPARC_LOAD_ADDRESS(SYM, reg) \ |
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64 setx SYM, %o7, reg; |
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65 # define LDPTR ldx |
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66 # define SIZE_T_CC %xcc |
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67 # define STACK_FRAME 192 |
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68 # define STACK_BIAS 2047 |
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69 # define STACK_7thARG (STACK_BIAS+176) |
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70 |
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71 # else |
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72 |
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73 # define SPARC_LOAD_ADDRESS(SYM, reg) \ |
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74 set SYM, reg; |
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75 # define LDPTR ld |
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76 # define SIZE_T_CC %icc |
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77 # define STACK_FRAME 112 |
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78 # define STACK_BIAS 0 |
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79 # define STACK_7thARG 92 |
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80 # define SPARC_LOAD_ADDRESS_LEAF(SYM,reg,tmp) SPARC_LOAD_ADDRESS(SYM,reg) |
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81 |
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82 # endif |
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83 |
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84 # ifdef __PIC__ |
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85 # undef SPARC_LOAD_ADDRESS |
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86 # undef SPARC_LOAD_ADDRESS_LEAF |
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87 # define SPARC_LOAD_ADDRESS(SYM, reg) \ |
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88 SPARC_SETUP_GOT_REG(reg); \ |
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89 sethi %hi(SYM), %o7; \ |
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90 or %o7, %lo(SYM), %o7; \ |
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91 LDPTR [reg + %o7], reg; |
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92 # endif |
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93 |
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94 # ifndef SPARC_LOAD_ADDRESS_LEAF |
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95 # define SPARC_LOAD_ADDRESS_LEAF(SYM, reg, tmp) \ |
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96 mov %o7, tmp; \ |
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97 SPARC_LOAD_ADDRESS(SYM, reg) \ |
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98 mov tmp, %o7; |
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99 # endif |
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100 |
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101 #endif /* __SPARC_ARCH_H__ */ |