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1 /* |
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2 * Copyright (c) 2015, 2016, Oracle and/or its affiliates. All rights reserved. |
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3 */ |
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4 |
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5 /* |
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6 * Redistribution and use in source and binary forms, with or without modification, |
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7 * are permitted provided that the following conditions are met: |
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8 * |
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9 * 1. Redistributions of source code must retain the above copyright notice, |
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10 * this list of conditions and the following disclaimer. |
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11 * |
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12 * 2. Redistributions in binary form must reproduce the above copyright notice, |
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13 * this list of conditions and the following disclaimer in the documentation |
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14 * and/or other materials provided with the distribution. |
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15 * |
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16 * 3. Neither the name of the copyright holder nor the names of its contributors |
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17 * may be used to endorse or promote products derived from this software without |
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18 * specific prior written permission. |
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19 * |
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20 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
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21 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED |
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22 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
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23 * IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, |
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24 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, |
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25 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
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26 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF |
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27 * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE |
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28 * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED |
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29 * OF THE POSSIBILITY OF SUCH DAMAGE. |
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30 */ |
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31 |
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32 #ifndef _PSIF_HW_SETGET_H |
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33 #define _PSIF_HW_SETGET_H |
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34 |
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35 #ifdef __cplusplus |
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36 extern "C" { |
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37 #endif |
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38 |
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39 #include "psif_api.h" |
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40 |
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41 #if defined(__arm__) |
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42 #include "epsfw_misc.h" |
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43 # define htobe64(x) eps_htobe64(x) |
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44 # define be64toh(x) eps_be64toh(x) |
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45 #endif /* __arm__ */ |
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46 #include "psif_endian.h" |
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47 #if !defined(__KERNEL__) |
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48 #include "os_header.h" |
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49 #endif |
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50 |
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51 |
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52 /* |
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53 * PSIF_WR_INVALIDATE_LKEY: key to invalidate/flush from the DMA VT cache. |
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54 * PSIF_WR_INVALIDATE_RKEY: key to invalidate/flush from the DMA VT cache. |
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55 * PSIF_WR_INVALIDATE_BOTH_KEYS: key to invalidate/flush from the DMA VT |
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56 * cache. PSIF_WR_INVALIDATE_TLB: this is the address vector to invalidate in |
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57 * the TLB. |
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58 */ |
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59 static inline void set_psif_wr_su__key(volatile struct psif_wr_su *ptr, u32 data) |
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60 { |
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61 /* group=2 shift=32 bits=32 */ |
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62 volatile __be64 *const pte = (__be64 *)ptr; |
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63 pte[2] = htobe64((be64toh(pte[2]) & 0x00000000ffffffffull) | |
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64 ((((u64)(data)) & 0x00000000ffffffffull) << 32)); |
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65 } |
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66 static inline u32 get_psif_wr_su__key(volatile struct psif_wr_su *ptr) |
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67 { |
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68 /* group=2 shift=32 bits=32 */ |
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69 volatile __be64 *const pte = (__be64 *)ptr; |
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70 return((u32)((be64toh(pte[2]) >> 32) & 0x00000000ffffffffull)); |
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71 } |
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72 |
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73 /* |
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74 * Send queue sequence number. Used to map request to a particular work |
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75 * request in the send queue. |
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76 */ |
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77 static inline void set_psif_wr__sq_seq(volatile struct psif_wr *ptr, u16 data) |
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78 { |
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79 /* group=0 shift=0 bits=16 */ |
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80 volatile __be64 *const pte = (__be64 *)ptr; |
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81 pte[0] = htobe64((be64toh(pte[0]) & 0xffffffffffff0000ull) | |
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82 ((((u64)(data)) & 0x000000000000ffffull) << 0)); |
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83 } |
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84 static inline u16 get_psif_wr__sq_seq(volatile struct psif_wr *ptr) |
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85 { |
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86 /* group=0 shift=0 bits=16 */ |
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87 volatile __be64 *const pte = (__be64 *)ptr; |
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88 return((u16)((be64toh(pte[0]) >> 0) & 0x000000000000ffffull)); |
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89 } |
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90 |
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91 /* |
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92 * QP sending this request. XXX: Should name be own_qp_num as defined in QP |
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93 * state? |
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94 */ |
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95 static inline void set_psif_wr__local_qp(volatile struct psif_wr *ptr, u32 data) |
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96 { |
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97 /* group=0 shift=32 bits=24 */ |
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98 volatile __be64 *const pte = (__be64 *)ptr; |
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99 pte[0] = htobe64((be64toh(pte[0]) & 0xff000000ffffffffull) | |
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100 ((((u64)(data)) & 0x0000000000ffffffull) << 32)); |
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101 } |
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102 static inline u32 get_psif_wr__local_qp(volatile struct psif_wr *ptr) |
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103 { |
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104 /* group=0 shift=32 bits=24 */ |
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105 volatile __be64 *const pte = (__be64 *)ptr; |
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106 return((u32)((be64toh(pte[0]) >> 32) & 0x0000000000ffffffull)); |
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107 } |
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108 |
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109 /* Completion notification identifier. */ |
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110 static inline void set_psif_wr__completion(volatile struct psif_wr *ptr, u8 data) |
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111 { |
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112 /* group=1 shift=31 bits=1 */ |
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113 volatile __be64 *const pte = (__be64 *)ptr; |
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114 pte[1] = htobe64((be64toh(pte[1]) & 0xffffffff7fffffffull) | |
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115 ((((u64)(data)) & 0x0000000000000001ull) << 31)); |
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116 } |
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117 static inline u8 get_psif_wr__completion(volatile struct psif_wr *ptr) |
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118 { |
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119 /* group=1 shift=31 bits=1 */ |
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120 volatile __be64 *const pte = (__be64 *)ptr; |
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121 return((u8)((be64toh(pte[1]) >> 31) & 0x0000000000000001ull)); |
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122 } |
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123 |
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124 /* |
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125 * Checksum used for data protection and consistency between work request and |
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126 * QP state. |
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127 */ |
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128 static inline void set_psif_wr__checksum(volatile struct psif_wr *ptr, u32 data) |
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129 { |
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130 /* group=2 shift=32 bits=32 */ |
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131 volatile __be64 *const pte = (__be64 *)ptr; |
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132 pte[2] = htobe64((be64toh(pte[2]) & 0x00000000ffffffffull) | |
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133 ((((u64)(data)) & 0x00000000ffffffffull) << 32)); |
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134 } |
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135 static inline u32 get_psif_wr__checksum(volatile struct psif_wr *ptr) |
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136 { |
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137 /* group=2 shift=32 bits=32 */ |
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138 volatile __be64 *const pte = (__be64 *)ptr; |
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139 return((u32)((be64toh(pte[2]) >> 32) & 0x00000000ffffffffull)); |
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140 } |
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141 |
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142 /* |
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143 * Index to where elements are added to the send queue by SW. SW is |
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144 * responsibel for keeping track of how many entries there are in the send |
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145 * queue. I.e. SW needs to keep track of the head_index so it doesn't |
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146 * overwrite entries in the send queue which is not yet completed. |
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147 */ |
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148 static inline void set_psif_sq_sw__tail_indx(volatile struct psif_sq_sw *ptr, u16 data) |
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149 { |
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150 /* group=0 shift=32 bits=16 */ |
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151 volatile __be64 *const pte = (__be64 *)ptr; |
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152 pte[0] = htobe64((be64toh(pte[0]) & 0xffff0000ffffffffull) | |
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153 ((((u64)(data)) & 0x000000000000ffffull) << 32)); |
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154 } |
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155 static inline u16 get_psif_sq_sw__tail_indx(volatile struct psif_sq_sw *ptr) |
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156 { |
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157 /* group=0 shift=32 bits=16 */ |
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158 volatile __be64 *const pte = (__be64 *)ptr; |
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159 return((u16)((be64toh(pte[0]) >> 32) & 0x000000000000ffffull)); |
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160 } |
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161 |
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162 /* |
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163 * Send queue sequence number used by the SQS to maintain ordering and keep |
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164 * track of where which send queue elements to fetch. This field is not in |
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165 * sync with the field in qp_t. This number is typically a little bit before |
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166 * the number in the qp_t as SQS has to fetch the elements from host memory. |
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167 * This is also used as tail_index when checking if there are more elements |
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168 * in the send queue. |
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169 */ |
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170 static inline void set_psif_sq_hw__last_seq(volatile struct psif_sq_hw *ptr, u16 data) |
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171 { |
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172 /* group=0 shift=16 bits=16 */ |
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173 volatile __be64 *const pte = (__be64 *)ptr; |
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174 pte[0] = htobe64((be64toh(pte[0]) & 0xffffffff0000ffffull) | |
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175 ((((u64)(data)) & 0x000000000000ffffull) << 16)); |
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176 } |
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177 static inline u16 get_psif_sq_hw__last_seq(volatile struct psif_sq_hw *ptr) |
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178 { |
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179 /* group=0 shift=16 bits=16 */ |
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180 volatile __be64 *const pte = (__be64 *)ptr; |
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181 return((u16)((be64toh(pte[0]) >> 16) & 0x000000000000ffffull)); |
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182 } |
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183 |
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184 /* QP and UF to be processed next. */ |
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185 static inline void set_psif_sq_hw__sq_next(volatile struct psif_sq_hw *ptr, u32 data) |
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186 { |
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187 /* group=0 shift=32 bits=32 */ |
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188 volatile __be64 *const pte = (__be64 *)ptr; |
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189 pte[0] = htobe64((be64toh(pte[0]) & 0x00000000ffffffffull) | |
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190 ((((u64)(data)) & 0x00000000ffffffffull) << 32)); |
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191 } |
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192 static inline u32 get_psif_sq_hw__sq_next(volatile struct psif_sq_hw *ptr) |
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193 { |
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194 /* group=0 shift=32 bits=32 */ |
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195 volatile __be64 *const pte = (__be64 *)ptr; |
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196 return((u32)((be64toh(pte[0]) >> 32) & 0x00000000ffffffffull)); |
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197 } |
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198 |
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199 /* |
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200 * This bit is set through the doorbell. SW should check this bit plus |
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201 * psif_next = null to ensure SW can own the SQ descriptor. |
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202 */ |
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203 static inline void set_psif_sq_hw__destroyed(volatile struct psif_sq_hw *ptr, u8 data) |
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204 { |
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205 /* group=1 shift=27 bits=1 */ |
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206 volatile __be64 *const pte = (__be64 *)ptr; |
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207 pte[1] = htobe64((be64toh(pte[1]) & 0xfffffffff7ffffffull) | |
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208 ((((u64)(data)) & 0x0000000000000001ull) << 27)); |
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209 } |
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210 static inline u8 get_psif_sq_hw__destroyed(volatile struct psif_sq_hw *ptr) |
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211 { |
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212 /* group=1 shift=27 bits=1 */ |
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213 volatile __be64 *const pte = (__be64 *)ptr; |
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214 return((u8)((be64toh(pte[1]) >> 27) & 0x0000000000000001ull)); |
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215 } |
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216 |
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217 /* Software modified index pointing to the tail reecive entry in host memory. */ |
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218 static inline void set_psif_rq_sw__tail_indx(volatile struct psif_rq_sw *ptr, u16 data) |
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219 { |
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220 /* group=0 shift=32 bits=14 */ |
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221 volatile __be64 *const pte = (__be64 *)ptr; |
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222 pte[0] = htobe64((be64toh(pte[0]) & 0xffffc000ffffffffull) | |
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223 ((((u64)(data)) & 0x0000000000003fffull) << 32)); |
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224 } |
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225 static inline u16 get_psif_rq_sw__tail_indx(volatile struct psif_rq_sw *ptr) |
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226 { |
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227 /* group=0 shift=32 bits=14 */ |
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228 volatile __be64 *const pte = (__be64 *)ptr; |
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229 return((u16)((be64toh(pte[0]) >> 32) & 0x0000000000003fffull)); |
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230 } |
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231 |
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232 /* |
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233 * Hardware modified index pointing to the head of the receive queue. TSU is |
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234 * using this to find the address of the receive queue entry. |
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235 */ |
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236 static inline void set_psif_rq_hw__head_indx(volatile struct psif_rq_hw *ptr, u16 data) |
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237 { |
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238 /* group=0 shift=14 bits=14 */ |
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239 volatile __be64 *const pte = (__be64 *)ptr; |
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240 pte[0] = htobe64((be64toh(pte[0]) & 0xfffffffff0003fffull) | |
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241 ((((u64)(data)) & 0x0000000000003fffull) << 14)); |
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242 } |
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243 static inline u16 get_psif_rq_hw__head_indx(volatile struct psif_rq_hw *ptr) |
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244 { |
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245 /* group=0 shift=14 bits=14 */ |
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246 volatile __be64 *const pte = (__be64 *)ptr; |
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247 return((u16)((be64toh(pte[0]) >> 14) & 0x0000000000003fffull)); |
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248 } |
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249 |
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250 /* The desciptor is valid. */ |
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251 static inline void set_psif_rq_hw__valid(volatile struct psif_rq_hw *ptr, u8 data) |
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252 { |
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253 /* group=3 shift=55 bits=1 */ |
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254 volatile __be64 *const pte = (__be64 *)ptr; |
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255 pte[3] = htobe64((be64toh(pte[3]) & 0xff7fffffffffffffull) | |
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256 ((((u64)(data)) & 0x0000000000000001ull) << 55)); |
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257 } |
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258 static inline u8 get_psif_rq_hw__valid(volatile struct psif_rq_hw *ptr) |
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259 { |
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260 /* group=3 shift=55 bits=1 */ |
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261 volatile __be64 *const pte = (__be64 *)ptr; |
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262 return((u8)((be64toh(pte[3]) >> 55) & 0x0000000000000001ull)); |
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263 } |
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264 |
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265 /* |
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266 * Receive queue entry ID. This is added to the receive completion using this |
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267 * receive queue entry. |
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268 */ |
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269 static inline void set_psif_rq_entry__rqe_id(volatile struct psif_rq_entry *ptr, u64 data) |
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270 { |
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271 /* group=0 shift=0 bits=64 */ |
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272 volatile __be64 *const pte = (__be64 *)ptr; |
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273 pte[0] = htobe64((__be64)data); |
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274 } |
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275 static inline u64 get_psif_rq_entry__rqe_id(volatile struct psif_rq_entry *ptr) |
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276 { |
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277 /* group=0 shift=0 bits=64 */ |
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278 volatile __be64 *const pte = (__be64 *)ptr; |
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279 return((u64)be64toh(pte[0])); |
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280 } |
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281 |
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282 /* |
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283 * This retry tag is the one used by tsu_rqs and added to the packets sent to |
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284 * tsu_dma. It is the responsibility of tsu_rqs to update this retry tag |
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285 * whenever the sq_sequence_number in QP state is equal to the one in the |
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286 * request. |
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287 */ |
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288 static inline void set_psif_qp_core__retry_tag_committed(volatile struct psif_qp_core *ptr, u8 data) |
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289 { |
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290 /* group=0 shift=0 bits=3 */ |
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291 volatile __be64 *const pte = (__be64 *)ptr; |
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292 pte[0] = htobe64((be64toh(pte[0]) & 0xfffffffffffffff8ull) | |
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293 ((((u64)(data)) & 0x0000000000000007ull) << 0)); |
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294 } |
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295 static inline u8 get_psif_qp_core__retry_tag_committed(volatile struct psif_qp_core *ptr) |
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296 { |
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297 /* group=0 shift=0 bits=3 */ |
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298 volatile __be64 *const pte = (__be64 *)ptr; |
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299 return((u8)((be64toh(pte[0]) >> 0) & 0x0000000000000007ull)); |
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300 } |
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301 |
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302 /* |
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303 * This retry tag is updated by the error block when an error occur. If |
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304 * tsu_rqs reads this retry tag and it is different than the |
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305 * retry_tag_comitted, tsu_rqs must update retry_tag_comitted to the value of |
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306 * retry_tag_err when the sq_sequence_number indicates this is the valid |
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307 * request. The sq_sequence_number has been updated by tsu_err at the same |
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308 * time the retry_tag_err is updated. |
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309 */ |
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310 static inline void set_psif_qp_core__retry_tag_err(volatile struct psif_qp_core *ptr, u8 data) |
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311 { |
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312 /* group=0 shift=3 bits=3 */ |
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313 volatile __be64 *const pte = (__be64 *)ptr; |
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314 pte[0] = htobe64((be64toh(pte[0]) & 0xffffffffffffffc7ull) | |
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315 ((((u64)(data)) & 0x0000000000000007ull) << 3)); |
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316 } |
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317 static inline u8 get_psif_qp_core__retry_tag_err(volatile struct psif_qp_core *ptr) |
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318 { |
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319 /* group=0 shift=3 bits=3 */ |
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320 volatile __be64 *const pte = (__be64 *)ptr; |
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321 return((u8)((be64toh(pte[0]) >> 3) & 0x0000000000000007ull)); |
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322 } |
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323 |
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324 /* |
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325 * Error retry counter initial value. Read by tsu_dma and used by tsu_cmpl to |
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326 * calculate exp_backoff etc.. |
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327 */ |
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328 static inline void set_psif_qp_core__error_retry_init(volatile struct psif_qp_core *ptr, u8 data) |
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329 { |
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330 /* group=0 shift=32 bits=3 */ |
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331 volatile __be64 *const pte = (__be64 *)ptr; |
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332 pte[0] = htobe64((be64toh(pte[0]) & 0xfffffff8ffffffffull) | |
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333 ((((u64)(data)) & 0x0000000000000007ull) << 32)); |
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334 } |
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335 static inline u8 get_psif_qp_core__error_retry_init(volatile struct psif_qp_core *ptr) |
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336 { |
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337 /* group=0 shift=32 bits=3 */ |
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338 volatile __be64 *const pte = (__be64 *)ptr; |
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339 return((u8)((be64toh(pte[0]) >> 32) & 0x0000000000000007ull)); |
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340 } |
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341 |
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342 /* |
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343 * Retry counter associated with retries to received NAK or implied NAK. If |
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344 * it expires, a path migration will be attempted if it is armed, or the QP |
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345 * will go to error state. Read by tsu_dma and used by tsu_cmpl. |
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346 */ |
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347 static inline void set_psif_qp_core__error_retry_count(volatile struct psif_qp_core *ptr, u8 data) |
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348 { |
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349 /* group=0 shift=35 bits=3 */ |
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350 volatile __be64 *const pte = (__be64 *)ptr; |
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351 pte[0] = htobe64((be64toh(pte[0]) & 0xffffffc7ffffffffull) | |
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352 ((((u64)(data)) & 0x0000000000000007ull) << 35)); |
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353 } |
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354 static inline u8 get_psif_qp_core__error_retry_count(volatile struct psif_qp_core *ptr) |
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355 { |
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356 /* group=0 shift=35 bits=3 */ |
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357 volatile __be64 *const pte = (__be64 *)ptr; |
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358 return((u8)((be64toh(pte[0]) >> 35) & 0x0000000000000007ull)); |
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359 } |
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360 |
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361 /* A hit in the set locally spun out of tsu_cmpl is found. */ |
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362 static inline void set_psif_qp_core__spin_hit(volatile struct psif_qp_core *ptr, u8 data) |
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363 { |
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364 /* group=0 shift=39 bits=1 */ |
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365 volatile __be64 *const pte = (__be64 *)ptr; |
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366 pte[0] = htobe64((be64toh(pte[0]) & 0xffffff7fffffffffull) | |
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367 ((((u64)(data)) & 0x0000000000000001ull) << 39)); |
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368 } |
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369 static inline u8 get_psif_qp_core__spin_hit(volatile struct psif_qp_core *ptr) |
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370 { |
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371 /* group=0 shift=39 bits=1 */ |
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372 volatile __be64 *const pte = (__be64 *)ptr; |
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373 return((u8)((be64toh(pte[0]) >> 39) & 0x0000000000000001ull)); |
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374 } |
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375 |
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376 /* |
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377 * Minium RNR NAK timeout. This is added to RNR NAK packets and the requester |
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378 * receiving the RNR NAK must wait until the timer has expired before the |
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379 * retry is sent. |
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380 */ |
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381 static inline void set_psif_qp_core__min_rnr_nak_time(volatile struct psif_qp_core *ptr, u8 data) |
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382 { |
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383 /* group=1 shift=0 bits=5 */ |
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384 volatile __be64 *const pte = (__be64 *)ptr; |
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385 pte[1] = htobe64((be64toh(pte[1]) & 0xffffffffffffffe0ull) | |
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386 ((((u64)(data)) & 0x000000000000001full) << 0)); |
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387 } |
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388 static inline u8 get_psif_qp_core__min_rnr_nak_time(volatile struct psif_qp_core *ptr) |
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389 { |
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390 /* group=1 shift=0 bits=5 */ |
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391 volatile __be64 *const pte = (__be64 *)ptr; |
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392 return((u8)((be64toh(pte[1]) >> 0) & 0x000000000000001full)); |
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393 } |
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394 |
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395 /* QP State for this QP. */ |
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396 static inline void set_psif_qp_core__state(volatile struct psif_qp_core *ptr, enum psif_qp_state data) |
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397 { |
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398 /* group=1 shift=5 bits=3 */ |
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399 volatile __be64 *const pte = (__be64 *)ptr; |
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400 pte[1] = htobe64((be64toh(pte[1]) & 0xffffffffffffff1full) | |
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401 ((((u64)(data)) & 0x0000000000000007ull) << 5)); |
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402 } |
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403 static inline enum psif_qp_state get_psif_qp_core__state(volatile struct psif_qp_core *ptr) |
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404 { |
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405 /* group=1 shift=5 bits=3 */ |
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406 volatile __be64 *const pte = (__be64 *)ptr; |
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407 return((enum psif_qp_state)((be64toh(pte[1]) >> 5) & 0x0000000000000007ull)); |
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408 } |
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409 |
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410 /* QP number for the remote node. */ |
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411 static inline void set_psif_qp_core__remote_qp(volatile struct psif_qp_core *ptr, u32 data) |
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412 { |
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413 /* group=1 shift=8 bits=24 */ |
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414 volatile __be64 *const pte = (__be64 *)ptr; |
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415 pte[1] = htobe64((be64toh(pte[1]) & 0xffffffff000000ffull) | |
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416 ((((u64)(data)) & 0x0000000000ffffffull) << 8)); |
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417 } |
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418 static inline u32 get_psif_qp_core__remote_qp(volatile struct psif_qp_core *ptr) |
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419 { |
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420 /* group=1 shift=8 bits=24 */ |
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421 volatile __be64 *const pte = (__be64 *)ptr; |
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422 return((u32)((be64toh(pte[1]) >> 8) & 0x0000000000ffffffull)); |
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423 } |
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424 |
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425 static inline void set_psif_qp_core__retry_sq_seq(volatile struct psif_qp_core *ptr, u16 data) |
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426 { |
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427 /* group=2 shift=32 bits=16 */ |
|
428 volatile __be64 *const pte = (__be64 *)ptr; |
|
429 pte[2] = htobe64((be64toh(pte[2]) & 0xffff0000ffffffffull) | |
|
430 ((((u64)(data)) & 0x000000000000ffffull) << 32)); |
|
431 } |
|
432 static inline u16 get_psif_qp_core__retry_sq_seq(volatile struct psif_qp_core *ptr) |
|
433 { |
|
434 /* group=2 shift=32 bits=16 */ |
|
435 volatile __be64 *const pte = (__be64 *)ptr; |
|
436 return((u16)((be64toh(pte[2]) >> 32) & 0x000000000000ffffull)); |
|
437 } |
|
438 |
|
439 static inline void set_psif_qp_core__sq_seq(volatile struct psif_qp_core *ptr, u16 data) |
|
440 { |
|
441 /* group=2 shift=48 bits=16 */ |
|
442 volatile __be64 *const pte = (__be64 *)ptr; |
|
443 pte[2] = htobe64((be64toh(pte[2]) & 0x0000ffffffffffffull) | |
|
444 ((((u64)(data)) & 0x000000000000ffffull) << 48)); |
|
445 } |
|
446 static inline u16 get_psif_qp_core__sq_seq(volatile struct psif_qp_core *ptr) |
|
447 { |
|
448 /* group=2 shift=48 bits=16 */ |
|
449 volatile __be64 *const pte = (__be64 *)ptr; |
|
450 return((u16)((be64toh(pte[2]) >> 48) & 0x000000000000ffffull)); |
|
451 } |
|
452 |
|
453 /* |
|
454 * Magic number used to verify use of QP state. This is done by calculating a |
|
455 * checksum of the work request incorporating the magic number. This checksum |
|
456 * is checked against the checksum in the work request. |
|
457 */ |
|
458 static inline void set_psif_qp_core__magic(volatile struct psif_qp_core *ptr, u32 data) |
|
459 { |
|
460 /* group=3 shift=0 bits=32 */ |
|
461 volatile __be64 *const pte = (__be64 *)ptr; |
|
462 pte[3] = htobe64((be64toh(pte[3]) & 0xffffffff00000000ull) | |
|
463 ((((u64)(data)) & 0x00000000ffffffffull) << 0)); |
|
464 } |
|
465 static inline u32 get_psif_qp_core__magic(volatile struct psif_qp_core *ptr) |
|
466 { |
|
467 /* group=3 shift=0 bits=32 */ |
|
468 volatile __be64 *const pte = (__be64 *)ptr; |
|
469 return((u32)((be64toh(pte[3]) >> 0) & 0x00000000ffffffffull)); |
|
470 } |
|
471 |
|
472 /* |
|
473 * Q-Key received in incoming IB packet is checked towards this Q-Key. Q-Key |
|
474 * used on transmit if top bit of Q-Key in WR is set. |
|
475 */ |
|
476 static inline void set_psif_qp_core__qkey(volatile struct psif_qp_core *ptr, u32 data) |
|
477 { |
|
478 /* group=4 shift=0 bits=32 */ |
|
479 volatile __be64 *const pte = (__be64 *)ptr; |
|
480 pte[4] = htobe64((be64toh(pte[4]) & 0xffffffff00000000ull) | |
|
481 ((((u64)(data)) & 0x00000000ffffffffull) << 0)); |
|
482 } |
|
483 static inline u32 get_psif_qp_core__qkey(volatile struct psif_qp_core *ptr) |
|
484 { |
|
485 /* group=4 shift=0 bits=32 */ |
|
486 volatile __be64 *const pte = (__be64 *)ptr; |
|
487 return((u32)((be64toh(pte[4]) >> 0) & 0x00000000ffffffffull)); |
|
488 } |
|
489 |
|
490 /* |
|
491 * Sequence number of the last ACK received. Read and written by tsu_cmpl. |
|
492 * Used to verify that the received response packet is a valid response. |
|
493 */ |
|
494 static inline void set_psif_qp_core__last_acked_psn(volatile struct psif_qp_core *ptr, u32 data) |
|
495 { |
|
496 /* group=4 shift=40 bits=24 */ |
|
497 volatile __be64 *const pte = (__be64 *)ptr; |
|
498 pte[4] = htobe64((be64toh(pte[4]) & 0x000000ffffffffffull) | |
|
499 ((((u64)(data)) & 0x0000000000ffffffull) << 40)); |
|
500 } |
|
501 static inline u32 get_psif_qp_core__last_acked_psn(volatile struct psif_qp_core *ptr) |
|
502 { |
|
503 /* group=4 shift=40 bits=24 */ |
|
504 volatile __be64 *const pte = (__be64 *)ptr; |
|
505 return((u32)((be64toh(pte[4]) >> 40) & 0x0000000000ffffffull)); |
|
506 } |
|
507 |
|
508 /* Index to scatter element of in progress SEND. */ |
|
509 static inline void set_psif_qp_core__scatter_indx(volatile struct psif_qp_core *ptr, u8 data) |
|
510 { |
|
511 /* group=5 shift=32 bits=5 */ |
|
512 volatile __be64 *const pte = (__be64 *)ptr; |
|
513 pte[5] = htobe64((be64toh(pte[5]) & 0xffffffe0ffffffffull) | |
|
514 ((((u64)(data)) & 0x000000000000001full) << 32)); |
|
515 } |
|
516 static inline u8 get_psif_qp_core__scatter_indx(volatile struct psif_qp_core *ptr) |
|
517 { |
|
518 /* group=5 shift=32 bits=5 */ |
|
519 volatile __be64 *const pte = (__be64 *)ptr; |
|
520 return((u8)((be64toh(pte[5]) >> 32) & 0x000000000000001full)); |
|
521 } |
|
522 |
|
523 /* |
|
524 * Expected packet sequence number: Sequence number on next expected packet. |
|
525 */ |
|
526 static inline void set_psif_qp_core__expected_psn(volatile struct psif_qp_core *ptr, u32 data) |
|
527 { |
|
528 /* group=5 shift=40 bits=24 */ |
|
529 volatile __be64 *const pte = (__be64 *)ptr; |
|
530 pte[5] = htobe64((be64toh(pte[5]) & 0x000000ffffffffffull) | |
|
531 ((((u64)(data)) & 0x0000000000ffffffull) << 40)); |
|
532 } |
|
533 static inline u32 get_psif_qp_core__expected_psn(volatile struct psif_qp_core *ptr) |
|
534 { |
|
535 /* group=5 shift=40 bits=24 */ |
|
536 volatile __be64 *const pte = (__be64 *)ptr; |
|
537 return((u32)((be64toh(pte[5]) >> 40) & 0x0000000000ffffffull)); |
|
538 } |
|
539 |
|
540 /* |
|
541 * TSU quality of service level. Can take values indicating low latency and |
|
542 * high throughput. This is equivalent to high/low BAR when writing doorbells |
|
543 * to PSIF. The qosl bit in the doorbell request must match this bit in the |
|
544 * QP state, otherwise the QP must be put in error. This check only applies |
|
545 * to tsu_rqs. |
|
546 */ |
|
547 static inline void set_psif_qp_core__qosl(volatile struct psif_qp_core *ptr, enum psif_tsu_qos data) |
|
548 { |
|
549 /* group=6 shift=49 bits=1 */ |
|
550 volatile __be64 *const pte = (__be64 *)ptr; |
|
551 pte[6] = htobe64((be64toh(pte[6]) & 0xfffdffffffffffffull) | |
|
552 ((((u64)(data)) & 0x0000000000000001ull) << 49)); |
|
553 } |
|
554 static inline enum psif_tsu_qos get_psif_qp_core__qosl(volatile struct psif_qp_core *ptr) |
|
555 { |
|
556 /* group=6 shift=49 bits=1 */ |
|
557 volatile __be64 *const pte = (__be64 *)ptr; |
|
558 return((enum psif_tsu_qos)((be64toh(pte[6]) >> 49) & 0x0000000000000001ull)); |
|
559 } |
|
560 |
|
561 /* |
|
562 * Migration state (migrated, re-arm and armed). Since path migration is |
|
563 * handled by tsu_qps, this is controlled by tsu_qps. XXX: Should error |
|
564 * handler also be able to change the path? |
|
565 */ |
|
566 static inline void set_psif_qp_core__mstate(volatile struct psif_qp_core *ptr, enum psif_migration data) |
|
567 { |
|
568 /* group=6 shift=50 bits=2 */ |
|
569 volatile __be64 *const pte = (__be64 *)ptr; |
|
570 pte[6] = htobe64((be64toh(pte[6]) & 0xfff3ffffffffffffull) | |
|
571 ((((u64)(data)) & 0x0000000000000003ull) << 50)); |
|
572 } |
|
573 static inline enum psif_migration get_psif_qp_core__mstate(volatile struct psif_qp_core *ptr) |
|
574 { |
|
575 /* group=6 shift=50 bits=2 */ |
|
576 volatile __be64 *const pte = (__be64 *)ptr; |
|
577 return((enum psif_migration)((be64toh(pte[6]) >> 50) & 0x0000000000000003ull)); |
|
578 } |
|
579 |
|
580 /* This is an IB over IB QP. */ |
|
581 static inline void set_psif_qp_core__ipoib_enable(volatile struct psif_qp_core *ptr, u8 data) |
|
582 { |
|
583 /* group=6 shift=53 bits=1 */ |
|
584 volatile __be64 *const pte = (__be64 *)ptr; |
|
585 pte[6] = htobe64((be64toh(pte[6]) & 0xffdfffffffffffffull) | |
|
586 ((((u64)(data)) & 0x0000000000000001ull) << 53)); |
|
587 } |
|
588 static inline u8 get_psif_qp_core__ipoib_enable(volatile struct psif_qp_core *ptr) |
|
589 { |
|
590 /* group=6 shift=53 bits=1 */ |
|
591 volatile __be64 *const pte = (__be64 *)ptr; |
|
592 return((u8)((be64toh(pte[6]) >> 53) & 0x0000000000000001ull)); |
|
593 } |
|
594 |
|
595 /* IB defined capability enable for receiving Atomic operations. */ |
|
596 static inline void set_psif_qp_core__atomic_enable(volatile struct psif_qp_core *ptr, u8 data) |
|
597 { |
|
598 /* group=6 shift=61 bits=1 */ |
|
599 volatile __be64 *const pte = (__be64 *)ptr; |
|
600 pte[6] = htobe64((be64toh(pte[6]) & 0xdfffffffffffffffull) | |
|
601 ((((u64)(data)) & 0x0000000000000001ull) << 61)); |
|
602 } |
|
603 static inline u8 get_psif_qp_core__atomic_enable(volatile struct psif_qp_core *ptr) |
|
604 { |
|
605 /* group=6 shift=61 bits=1 */ |
|
606 volatile __be64 *const pte = (__be64 *)ptr; |
|
607 return((u8)((be64toh(pte[6]) >> 61) & 0x0000000000000001ull)); |
|
608 } |
|
609 |
|
610 /* IB defined capability enable for receiving RDMA WR. */ |
|
611 static inline void set_psif_qp_core__rdma_wr_enable(volatile struct psif_qp_core *ptr, u8 data) |
|
612 { |
|
613 /* group=6 shift=62 bits=1 */ |
|
614 volatile __be64 *const pte = (__be64 *)ptr; |
|
615 pte[6] = htobe64((be64toh(pte[6]) & 0xbfffffffffffffffull) | |
|
616 ((((u64)(data)) & 0x0000000000000001ull) << 62)); |
|
617 } |
|
618 static inline u8 get_psif_qp_core__rdma_wr_enable(volatile struct psif_qp_core *ptr) |
|
619 { |
|
620 /* group=6 shift=62 bits=1 */ |
|
621 volatile __be64 *const pte = (__be64 *)ptr; |
|
622 return((u8)((be64toh(pte[6]) >> 62) & 0x0000000000000001ull)); |
|
623 } |
|
624 |
|
625 /* IB defined capability enable for receiving RDMA RD. */ |
|
626 static inline void set_psif_qp_core__rdma_rd_enable(volatile struct psif_qp_core *ptr, u8 data) |
|
627 { |
|
628 /* group=6 shift=63 bits=1 */ |
|
629 volatile __be64 *const pte = (__be64 *)ptr; |
|
630 pte[6] = htobe64((be64toh(pte[6]) & 0x7fffffffffffffffull) | |
|
631 ((((u64)(data)) & 0x0000000000000001ull) << 63)); |
|
632 } |
|
633 static inline u8 get_psif_qp_core__rdma_rd_enable(volatile struct psif_qp_core *ptr) |
|
634 { |
|
635 /* group=6 shift=63 bits=1 */ |
|
636 volatile __be64 *const pte = (__be64 *)ptr; |
|
637 return((u8)((be64toh(pte[6]) >> 63) & 0x0000000000000001ull)); |
|
638 } |
|
639 |
|
640 /* |
|
641 * Transmit packet sequence number. Read and updated by tsu_dma before |
|
642 * sending packets to tsu_ibpb and tsu_cmpl. |
|
643 */ |
|
644 static inline void set_psif_qp_core__xmit_psn(volatile struct psif_qp_core *ptr, u32 data) |
|
645 { |
|
646 /* group=7 shift=0 bits=24 */ |
|
647 volatile __be64 *const pte = (__be64 *)ptr; |
|
648 pte[7] = htobe64((be64toh(pte[7]) & 0xffffffffff000000ull) | |
|
649 ((((u64)(data)) & 0x0000000000ffffffull) << 0)); |
|
650 } |
|
651 static inline u32 get_psif_qp_core__xmit_psn(volatile struct psif_qp_core *ptr) |
|
652 { |
|
653 /* group=7 shift=0 bits=24 */ |
|
654 volatile __be64 *const pte = (__be64 *)ptr; |
|
655 return((u32)((be64toh(pte[7]) >> 0) & 0x0000000000ffffffull)); |
|
656 } |
|
657 |
|
658 /* |
|
659 * TSU Service Level used to decide the TSU VL for requests associated with |
|
660 * this QP. |
|
661 */ |
|
662 static inline void set_psif_qp_core__tsl(volatile struct psif_qp_core *ptr, u8 data) |
|
663 { |
|
664 /* group=7 shift=55 bits=4 */ |
|
665 volatile __be64 *const pte = (__be64 *)ptr; |
|
666 pte[7] = htobe64((be64toh(pte[7]) & 0xf87fffffffffffffull) | |
|
667 ((((u64)(data)) & 0x000000000000000full) << 55)); |
|
668 } |
|
669 static inline u8 get_psif_qp_core__tsl(volatile struct psif_qp_core *ptr) |
|
670 { |
|
671 /* group=7 shift=55 bits=4 */ |
|
672 volatile __be64 *const pte = (__be64 *)ptr; |
|
673 return((u8)((be64toh(pte[7]) >> 55) & 0x000000000000000full)); |
|
674 } |
|
675 |
|
676 /* |
|
677 * Maximum number of outstanding read or atomic requests allowed by the |
|
678 * remote HCA. Initialized by software. |
|
679 */ |
|
680 static inline void set_psif_qp_core__max_outstanding(volatile struct psif_qp_core *ptr, u8 data) |
|
681 { |
|
682 /* group=7 shift=59 bits=5 */ |
|
683 volatile __be64 *const pte = (__be64 *)ptr; |
|
684 pte[7] = htobe64((be64toh(pte[7]) & 0x07ffffffffffffffull) | |
|
685 ((((u64)(data)) & 0x000000000000001full) << 59)); |
|
686 } |
|
687 static inline u8 get_psif_qp_core__max_outstanding(volatile struct psif_qp_core *ptr) |
|
688 { |
|
689 /* group=7 shift=59 bits=5 */ |
|
690 volatile __be64 *const pte = (__be64 *)ptr; |
|
691 return((u8)((be64toh(pte[7]) >> 59) & 0x000000000000001full)); |
|
692 } |
|
693 |
|
694 /* Send Queue RNR retry count initialization value. */ |
|
695 static inline void set_psif_qp_core__rnr_retry_init(volatile struct psif_qp_core *ptr, u8 data) |
|
696 { |
|
697 /* group=8 shift=32 bits=3 */ |
|
698 volatile __be64 *const pte = (__be64 *)ptr; |
|
699 pte[8] = htobe64((be64toh(pte[8]) & 0xfffffff8ffffffffull) | |
|
700 ((((u64)(data)) & 0x0000000000000007ull) << 32)); |
|
701 } |
|
702 static inline u8 get_psif_qp_core__rnr_retry_init(volatile struct psif_qp_core *ptr) |
|
703 { |
|
704 /* group=8 shift=32 bits=3 */ |
|
705 volatile __be64 *const pte = (__be64 *)ptr; |
|
706 return((u8)((be64toh(pte[8]) >> 32) & 0x0000000000000007ull)); |
|
707 } |
|
708 |
|
709 /* |
|
710 * Retry counter associated with RNR NAK retries. If it expires, a path |
|
711 * migration will be attempted if it is armed, or the QP will go to error |
|
712 * state. |
|
713 */ |
|
714 static inline void set_psif_qp_core__rnr_retry_count(volatile struct psif_qp_core *ptr, u8 data) |
|
715 { |
|
716 /* group=8 shift=35 bits=3 */ |
|
717 volatile __be64 *const pte = (__be64 *)ptr; |
|
718 pte[8] = htobe64((be64toh(pte[8]) & 0xffffffc7ffffffffull) | |
|
719 ((((u64)(data)) & 0x0000000000000007ull) << 35)); |
|
720 } |
|
721 static inline u8 get_psif_qp_core__rnr_retry_count(volatile struct psif_qp_core *ptr) |
|
722 { |
|
723 /* group=8 shift=35 bits=3 */ |
|
724 volatile __be64 *const pte = (__be64 *)ptr; |
|
725 return((u8)((be64toh(pte[8]) >> 35) & 0x0000000000000007ull)); |
|
726 } |
|
727 |
|
728 /* |
|
729 * When set, RQS should only check that the orig_checksum is equal to magic |
|
730 * number. When not set, RQS should perform the checksum check towards the |
|
731 * checksum in the psif_wr. |
|
732 */ |
|
733 static inline void set_psif_qp_core__no_checksum(volatile struct psif_qp_core *ptr, u8 data) |
|
734 { |
|
735 /* group=8 shift=39 bits=1 */ |
|
736 volatile __be64 *const pte = (__be64 *)ptr; |
|
737 pte[8] = htobe64((be64toh(pte[8]) & 0xffffff7fffffffffull) | |
|
738 ((((u64)(data)) & 0x0000000000000001ull) << 39)); |
|
739 } |
|
740 static inline u8 get_psif_qp_core__no_checksum(volatile struct psif_qp_core *ptr) |
|
741 { |
|
742 /* group=8 shift=39 bits=1 */ |
|
743 volatile __be64 *const pte = (__be64 *)ptr; |
|
744 return((u8)((be64toh(pte[8]) >> 39) & 0x0000000000000001ull)); |
|
745 } |
|
746 |
|
747 /* |
|
748 * Transport type of the QP (RC, UC, UD, XRC, MANSP1). MANSP1 is set for |
|
749 * privileged QPs. |
|
750 */ |
|
751 static inline void set_psif_qp_core__transport_type(volatile struct psif_qp_core *ptr, enum psif_qp_trans data) |
|
752 { |
|
753 /* group=9 shift=0 bits=3 */ |
|
754 volatile __be64 *const pte = (__be64 *)ptr; |
|
755 pte[9] = htobe64((be64toh(pte[9]) & 0xfffffffffffffff8ull) | |
|
756 ((((u64)(data)) & 0x0000000000000007ull) << 0)); |
|
757 } |
|
758 static inline enum psif_qp_trans get_psif_qp_core__transport_type(volatile struct psif_qp_core *ptr) |
|
759 { |
|
760 /* group=9 shift=0 bits=3 */ |
|
761 volatile __be64 *const pte = (__be64 *)ptr; |
|
762 return((enum psif_qp_trans)((be64toh(pte[9]) >> 0) & 0x0000000000000007ull)); |
|
763 } |
|
764 |
|
765 /* |
|
766 * Number of bytes received of in progress RDMA Write or SEND. The data |
|
767 * received for SENDs and RDMA WR w/Imm are needed for completions. This |
|
768 * should be added to the msg_length. |
|
769 */ |
|
770 static inline void set_psif_qp_core__bytes_received(volatile struct psif_qp_core *ptr, u32 data) |
|
771 { |
|
772 /* group=9 shift=32 bits=32 */ |
|
773 volatile __be64 *const pte = (__be64 *)ptr; |
|
774 pte[9] = htobe64((be64toh(pte[9]) & 0x00000000ffffffffull) | |
|
775 ((((u64)(data)) & 0x00000000ffffffffull) << 32)); |
|
776 } |
|
777 static inline u32 get_psif_qp_core__bytes_received(volatile struct psif_qp_core *ptr) |
|
778 { |
|
779 /* group=9 shift=32 bits=32 */ |
|
780 volatile __be64 *const pte = (__be64 *)ptr; |
|
781 return((u32)((be64toh(pte[9]) >> 32) & 0x00000000ffffffffull)); |
|
782 } |
|
783 |
|
784 /* This QP is running IP over IB. */ |
|
785 static inline void set_psif_qp_core__ipoib(volatile struct psif_qp_core *ptr, u8 data) |
|
786 { |
|
787 /* group=10 shift=5 bits=1 */ |
|
788 volatile __be64 *const pte = (__be64 *)ptr; |
|
789 pte[10] = htobe64((be64toh(pte[10]) & 0xffffffffffffffdfull) | |
|
790 ((((u64)(data)) & 0x0000000000000001ull) << 5)); |
|
791 } |
|
792 static inline u8 get_psif_qp_core__ipoib(volatile struct psif_qp_core *ptr) |
|
793 { |
|
794 /* group=10 shift=5 bits=1 */ |
|
795 volatile __be64 *const pte = (__be64 *)ptr; |
|
796 return((u8)((be64toh(pte[10]) >> 5) & 0x0000000000000001ull)); |
|
797 } |
|
798 |
|
799 /* |
|
800 * Combined 'Last Received MSN' and 'Last Outstanding MSN', used to maintain |
|
801 * 'spin set floor' and indicate 'all retries completed', respectively. |
|
802 */ |
|
803 static inline void set_psif_qp_core__last_received_outstanding_msn(volatile struct psif_qp_core *ptr, u16 data) |
|
804 { |
|
805 /* group=11 shift=0 bits=16 */ |
|
806 volatile __be64 *const pte = (__be64 *)ptr; |
|
807 pte[11] = htobe64((be64toh(pte[11]) & 0xffffffffffff0000ull) | |
|
808 ((((u64)(data)) & 0x000000000000ffffull) << 0)); |
|
809 } |
|
810 static inline u16 get_psif_qp_core__last_received_outstanding_msn(volatile struct psif_qp_core *ptr) |
|
811 { |
|
812 /* group=11 shift=0 bits=16 */ |
|
813 volatile __be64 *const pte = (__be64 *)ptr; |
|
814 return((u16)((be64toh(pte[11]) >> 0) & 0x000000000000ffffull)); |
|
815 } |
|
816 |
|
817 static inline void set_psif_qp_core__path_mtu(volatile struct psif_qp_core *ptr, enum psif_path_mtu data) |
|
818 { |
|
819 /* group=13 shift=4 bits=3 */ |
|
820 volatile __be64 *const pte = (__be64 *)ptr; |
|
821 pte[13] = htobe64((be64toh(pte[13]) & 0xffffffffffffff8full) | |
|
822 ((((u64)(data)) & 0x0000000000000007ull) << 4)); |
|
823 } |
|
824 static inline enum psif_path_mtu get_psif_qp_core__path_mtu(volatile struct psif_qp_core *ptr) |
|
825 { |
|
826 /* group=13 shift=4 bits=3 */ |
|
827 volatile __be64 *const pte = (__be64 *)ptr; |
|
828 return((enum psif_path_mtu)((be64toh(pte[13]) >> 4) & 0x0000000000000007ull)); |
|
829 } |
|
830 |
|
831 /* This PSN is committed - ACKs sent will contain this PSN. */ |
|
832 static inline void set_psif_qp_core__committed_received_psn(volatile struct psif_qp_core *ptr, u32 data) |
|
833 { |
|
834 /* group=13 shift=8 bits=24 */ |
|
835 volatile __be64 *const pte = (__be64 *)ptr; |
|
836 pte[13] = htobe64((be64toh(pte[13]) & 0xffffffff000000ffull) | |
|
837 ((((u64)(data)) & 0x0000000000ffffffull) << 8)); |
|
838 } |
|
839 static inline u32 get_psif_qp_core__committed_received_psn(volatile struct psif_qp_core *ptr) |
|
840 { |
|
841 /* group=13 shift=8 bits=24 */ |
|
842 volatile __be64 *const pte = (__be64 *)ptr; |
|
843 return((u32)((be64toh(pte[13]) >> 8) & 0x0000000000ffffffull)); |
|
844 } |
|
845 |
|
846 /* |
|
847 * Message sequence number used in AETH when sending ACKs. The number is |
|
848 * incremented every time a new inbound message is processed. |
|
849 */ |
|
850 static inline void set_psif_qp_core__msn(volatile struct psif_qp_core *ptr, u32 data) |
|
851 { |
|
852 /* group=14 shift=0 bits=24 */ |
|
853 volatile __be64 *const pte = (__be64 *)ptr; |
|
854 pte[14] = htobe64((be64toh(pte[14]) & 0xffffffffff000000ull) | |
|
855 ((((u64)(data)) & 0x0000000000ffffffull) << 0)); |
|
856 } |
|
857 static inline u32 get_psif_qp_core__msn(volatile struct psif_qp_core *ptr) |
|
858 { |
|
859 /* group=14 shift=0 bits=24 */ |
|
860 volatile __be64 *const pte = (__be64 *)ptr; |
|
861 return((u32)((be64toh(pte[14]) >> 0) & 0x0000000000ffffffull)); |
|
862 } |
|
863 |
|
864 /* |
|
865 * This is an index to send completion queue descriptor. The descriptor |
|
866 * points to a send completion queue, which may or may not be the same as the |
|
867 * send completion queue. |
|
868 */ |
|
869 static inline void set_psif_qp_core__send_cq_indx(volatile struct psif_qp_core *ptr, u32 data) |
|
870 { |
|
871 /* group=14 shift=24 bits=24 */ |
|
872 volatile __be64 *const pte = (__be64 *)ptr; |
|
873 pte[14] = htobe64((be64toh(pte[14]) & 0xffff000000ffffffull) | |
|
874 ((((u64)(data)) & 0x0000000000ffffffull) << 24)); |
|
875 } |
|
876 static inline u32 get_psif_qp_core__send_cq_indx(volatile struct psif_qp_core *ptr) |
|
877 { |
|
878 /* group=14 shift=24 bits=24 */ |
|
879 volatile __be64 *const pte = (__be64 *)ptr; |
|
880 return((u32)((be64toh(pte[14]) >> 24) & 0x0000000000ffffffull)); |
|
881 } |
|
882 |
|
883 /* |
|
884 * Committed MSN - the MSN of the newest committed request for this QP. Only |
|
885 * the bottom 16 bits of the MSN is used. |
|
886 */ |
|
887 static inline void set_psif_qp_core__last_committed_msn(volatile struct psif_qp_core *ptr, u16 data) |
|
888 { |
|
889 /* group=14 shift=48 bits=16 */ |
|
890 volatile __be64 *const pte = (__be64 *)ptr; |
|
891 pte[14] = htobe64((be64toh(pte[14]) & 0x0000ffffffffffffull) | |
|
892 ((((u64)(data)) & 0x000000000000ffffull) << 48)); |
|
893 } |
|
894 static inline u16 get_psif_qp_core__last_committed_msn(volatile struct psif_qp_core *ptr) |
|
895 { |
|
896 /* group=14 shift=48 bits=16 */ |
|
897 volatile __be64 *const pte = (__be64 *)ptr; |
|
898 return((u16)((be64toh(pte[14]) >> 48) & 0x000000000000ffffull)); |
|
899 } |
|
900 |
|
901 static inline void set_psif_qp_core__srq_pd(volatile struct psif_qp_core *ptr, u32 data) |
|
902 { |
|
903 /* group=15 shift=0 bits=24 */ |
|
904 volatile __be64 *const pte = (__be64 *)ptr; |
|
905 pte[15] = htobe64((be64toh(pte[15]) & 0xffffffffff000000ull) | |
|
906 ((((u64)(data)) & 0x0000000000ffffffull) << 0)); |
|
907 } |
|
908 static inline u32 get_psif_qp_core__srq_pd(volatile struct psif_qp_core *ptr) |
|
909 { |
|
910 /* group=15 shift=0 bits=24 */ |
|
911 volatile __be64 *const pte = (__be64 *)ptr; |
|
912 return((u32)((be64toh(pte[15]) >> 0) & 0x0000000000ffffffull)); |
|
913 } |
|
914 |
|
915 static inline void set_psif_qp_path__remote_gid_0(volatile struct psif_qp_path *ptr, u64 data) |
|
916 { |
|
917 /* group=0 shift=0 bits=64 */ |
|
918 volatile __be64 *const pte = (__be64 *)ptr; |
|
919 pte[0] = htobe64((__be64)data); |
|
920 } |
|
921 static inline u64 get_psif_qp_path__remote_gid_0(volatile struct psif_qp_path *ptr) |
|
922 { |
|
923 /* group=0 shift=0 bits=64 */ |
|
924 volatile __be64 *const pte = (__be64 *)ptr; |
|
925 return((u64)be64toh(pte[0])); |
|
926 } |
|
927 |
|
928 static inline void set_psif_qp_path__remote_gid_1(volatile struct psif_qp_path *ptr, u64 data) |
|
929 { |
|
930 /* group=1 shift=0 bits=64 */ |
|
931 volatile __be64 *const pte = (__be64 *)ptr; |
|
932 pte[1] = htobe64((__be64)data); |
|
933 } |
|
934 static inline u64 get_psif_qp_path__remote_gid_1(volatile struct psif_qp_path *ptr) |
|
935 { |
|
936 /* group=1 shift=0 bits=64 */ |
|
937 volatile __be64 *const pte = (__be64 *)ptr; |
|
938 return((u64)be64toh(pte[1])); |
|
939 } |
|
940 |
|
941 static inline void set_psif_qp_path__remote_lid(volatile struct psif_qp_path *ptr, u16 data) |
|
942 { |
|
943 /* group=2 shift=0 bits=16 */ |
|
944 volatile __be64 *const pte = (__be64 *)ptr; |
|
945 pte[2] = htobe64((be64toh(pte[2]) & 0xffffffffffff0000ull) | |
|
946 ((((u64)(data)) & 0x000000000000ffffull) << 0)); |
|
947 } |
|
948 static inline u16 get_psif_qp_path__remote_lid(volatile struct psif_qp_path *ptr) |
|
949 { |
|
950 /* group=2 shift=0 bits=16 */ |
|
951 volatile __be64 *const pte = (__be64 *)ptr; |
|
952 return((u16)((be64toh(pte[2]) >> 0) & 0x000000000000ffffull)); |
|
953 } |
|
954 |
|
955 static inline void set_psif_qp_path__port(volatile struct psif_qp_path *ptr, enum psif_port data) |
|
956 { |
|
957 /* group=2 shift=17 bits=1 */ |
|
958 volatile __be64 *const pte = (__be64 *)ptr; |
|
959 pte[2] = htobe64((be64toh(pte[2]) & 0xfffffffffffdffffull) | |
|
960 ((((u64)(data)) & 0x0000000000000001ull) << 17)); |
|
961 } |
|
962 static inline enum psif_port get_psif_qp_path__port(volatile struct psif_qp_path *ptr) |
|
963 { |
|
964 /* group=2 shift=17 bits=1 */ |
|
965 volatile __be64 *const pte = (__be64 *)ptr; |
|
966 return((enum psif_port)((be64toh(pte[2]) >> 17) & 0x0000000000000001ull)); |
|
967 } |
|
968 |
|
969 static inline void set_psif_qp_path__loopback(volatile struct psif_qp_path *ptr, enum psif_loopback data) |
|
970 { |
|
971 /* group=2 shift=18 bits=1 */ |
|
972 volatile __be64 *const pte = (__be64 *)ptr; |
|
973 pte[2] = htobe64((be64toh(pte[2]) & 0xfffffffffffbffffull) | |
|
974 ((((u64)(data)) & 0x0000000000000001ull) << 18)); |
|
975 } |
|
976 static inline enum psif_loopback get_psif_qp_path__loopback(volatile struct psif_qp_path *ptr) |
|
977 { |
|
978 /* group=2 shift=18 bits=1 */ |
|
979 volatile __be64 *const pte = (__be64 *)ptr; |
|
980 return((enum psif_loopback)((be64toh(pte[2]) >> 18) & 0x0000000000000001ull)); |
|
981 } |
|
982 |
|
983 static inline void set_psif_qp_path__use_grh(volatile struct psif_qp_path *ptr, enum psif_use_grh data) |
|
984 { |
|
985 /* group=2 shift=19 bits=1 */ |
|
986 volatile __be64 *const pte = (__be64 *)ptr; |
|
987 pte[2] = htobe64((be64toh(pte[2]) & 0xfffffffffff7ffffull) | |
|
988 ((((u64)(data)) & 0x0000000000000001ull) << 19)); |
|
989 } |
|
990 static inline enum psif_use_grh get_psif_qp_path__use_grh(volatile struct psif_qp_path *ptr) |
|
991 { |
|
992 /* group=2 shift=19 bits=1 */ |
|
993 volatile __be64 *const pte = (__be64 *)ptr; |
|
994 return((enum psif_use_grh)((be64toh(pte[2]) >> 19) & 0x0000000000000001ull)); |
|
995 } |
|
996 |
|
997 static inline void set_psif_qp_path__sl(volatile struct psif_qp_path *ptr, u8 data) |
|
998 { |
|
999 /* group=2 shift=20 bits=4 */ |
|
1000 volatile __be64 *const pte = (__be64 *)ptr; |
|
1001 pte[2] = htobe64((be64toh(pte[2]) & 0xffffffffff0fffffull) | |
|
1002 ((((u64)(data)) & 0x000000000000000full) << 20)); |
|
1003 } |
|
1004 static inline u8 get_psif_qp_path__sl(volatile struct psif_qp_path *ptr) |
|
1005 { |
|
1006 /* group=2 shift=20 bits=4 */ |
|
1007 volatile __be64 *const pte = (__be64 *)ptr; |
|
1008 return((u8)((be64toh(pte[2]) >> 20) & 0x000000000000000full)); |
|
1009 } |
|
1010 |
|
1011 static inline void set_psif_qp_path__hoplmt(volatile struct psif_qp_path *ptr, u8 data) |
|
1012 { |
|
1013 /* group=2 shift=28 bits=8 */ |
|
1014 volatile __be64 *const pte = (__be64 *)ptr; |
|
1015 pte[2] = htobe64((be64toh(pte[2]) & 0xfffffff00fffffffull) | |
|
1016 ((((u64)(data)) & 0x00000000000000ffull) << 28)); |
|
1017 } |
|
1018 static inline u8 get_psif_qp_path__hoplmt(volatile struct psif_qp_path *ptr) |
|
1019 { |
|
1020 /* group=2 shift=28 bits=8 */ |
|
1021 volatile __be64 *const pte = (__be64 *)ptr; |
|
1022 return((u8)((be64toh(pte[2]) >> 28) & 0x00000000000000ffull)); |
|
1023 } |
|
1024 |
|
1025 static inline void set_psif_qp_path__flowlabel(volatile struct psif_qp_path *ptr, u32 data) |
|
1026 { |
|
1027 /* group=2 shift=44 bits=20 */ |
|
1028 volatile __be64 *const pte = (__be64 *)ptr; |
|
1029 pte[2] = htobe64((be64toh(pte[2]) & 0x00000fffffffffffull) | |
|
1030 ((((u64)(data)) & 0x00000000000fffffull) << 44)); |
|
1031 } |
|
1032 static inline u32 get_psif_qp_path__flowlabel(volatile struct psif_qp_path *ptr) |
|
1033 { |
|
1034 /* group=2 shift=44 bits=20 */ |
|
1035 volatile __be64 *const pte = (__be64 *)ptr; |
|
1036 return((u32)((be64toh(pte[2]) >> 44) & 0x00000000000fffffull)); |
|
1037 } |
|
1038 |
|
1039 static inline void set_psif_qp_path__local_ack_timeout(volatile struct psif_qp_path *ptr, u8 data) |
|
1040 { |
|
1041 /* group=3 shift=27 bits=5 */ |
|
1042 volatile __be64 *const pte = (__be64 *)ptr; |
|
1043 pte[3] = htobe64((be64toh(pte[3]) & 0xffffffff07ffffffull) | |
|
1044 ((((u64)(data)) & 0x000000000000001full) << 27)); |
|
1045 } |
|
1046 static inline u8 get_psif_qp_path__local_ack_timeout(volatile struct psif_qp_path *ptr) |
|
1047 { |
|
1048 /* group=3 shift=27 bits=5 */ |
|
1049 volatile __be64 *const pte = (__be64 *)ptr; |
|
1050 return((u8)((be64toh(pte[3]) >> 27) & 0x000000000000001full)); |
|
1051 } |
|
1052 |
|
1053 static inline void set_psif_qp_path__ipd(volatile struct psif_qp_path *ptr, u8 data) |
|
1054 { |
|
1055 /* group=3 shift=32 bits=8 */ |
|
1056 volatile __be64 *const pte = (__be64 *)ptr; |
|
1057 pte[3] = htobe64((be64toh(pte[3]) & 0xffffff00ffffffffull) | |
|
1058 ((((u64)(data)) & 0x00000000000000ffull) << 32)); |
|
1059 } |
|
1060 static inline u8 get_psif_qp_path__ipd(volatile struct psif_qp_path *ptr) |
|
1061 { |
|
1062 /* group=3 shift=32 bits=8 */ |
|
1063 volatile __be64 *const pte = (__be64 *)ptr; |
|
1064 return((u8)((be64toh(pte[3]) >> 32) & 0x00000000000000ffull)); |
|
1065 } |
|
1066 |
|
1067 /* |
|
1068 * This is the LID path bits. This is used by tsu_ibpb when generating the |
|
1069 * SLID in the packet, and it is used by tsu_rcv when checking the DLID. |
|
1070 */ |
|
1071 static inline void set_psif_qp_path__local_lid_path(volatile struct psif_qp_path *ptr, u8 data) |
|
1072 { |
|
1073 /* group=3 shift=48 bits=7 */ |
|
1074 volatile __be64 *const pte = (__be64 *)ptr; |
|
1075 pte[3] = htobe64((be64toh(pte[3]) & 0xff80ffffffffffffull) | |
|
1076 ((((u64)(data)) & 0x000000000000007full) << 48)); |
|
1077 } |
|
1078 static inline u8 get_psif_qp_path__local_lid_path(volatile struct psif_qp_path *ptr) |
|
1079 { |
|
1080 /* group=3 shift=48 bits=7 */ |
|
1081 volatile __be64 *const pte = (__be64 *)ptr; |
|
1082 return((u8)((be64toh(pte[3]) >> 48) & 0x000000000000007full)); |
|
1083 } |
|
1084 |
|
1085 static inline void set_psif_qp_path__pkey_indx(volatile struct psif_qp_path *ptr, u16 data) |
|
1086 { |
|
1087 /* group=3 shift=55 bits=9 */ |
|
1088 volatile __be64 *const pte = (__be64 *)ptr; |
|
1089 pte[3] = htobe64((be64toh(pte[3]) & 0x007fffffffffffffull) | |
|
1090 ((((u64)(data)) & 0x00000000000001ffull) << 55)); |
|
1091 } |
|
1092 static inline u16 get_psif_qp_path__pkey_indx(volatile struct psif_qp_path *ptr) |
|
1093 { |
|
1094 /* group=3 shift=55 bits=9 */ |
|
1095 volatile __be64 *const pte = (__be64 *)ptr; |
|
1096 return((u16)((be64toh(pte[3]) >> 55) & 0x00000000000001ffull)); |
|
1097 } |
|
1098 |
|
1099 /* L-key state for this DMA validation entry */ |
|
1100 static inline void set_psif_key__lkey_state(volatile struct psif_key *ptr, enum psif_dma_vt_key_states data) |
|
1101 { |
|
1102 /* group=0 shift=60 bits=2 */ |
|
1103 volatile __be64 *const pte = (__be64 *)ptr; |
|
1104 pte[0] = htobe64((be64toh(pte[0]) & 0xcfffffffffffffffull) | |
|
1105 ((((u64)(data)) & 0x0000000000000003ull) << 60)); |
|
1106 } |
|
1107 static inline enum psif_dma_vt_key_states get_psif_key__lkey_state(volatile struct psif_key *ptr) |
|
1108 { |
|
1109 /* group=0 shift=60 bits=2 */ |
|
1110 volatile __be64 *const pte = (__be64 *)ptr; |
|
1111 return((enum psif_dma_vt_key_states)((be64toh(pte[0]) >> 60) & 0x0000000000000003ull)); |
|
1112 } |
|
1113 |
|
1114 /* R-key state for this DMA validation entry */ |
|
1115 static inline void set_psif_key__rkey_state(volatile struct psif_key *ptr, enum psif_dma_vt_key_states data) |
|
1116 { |
|
1117 /* group=0 shift=62 bits=2 */ |
|
1118 volatile __be64 *const pte = (__be64 *)ptr; |
|
1119 pte[0] = htobe64((be64toh(pte[0]) & 0x3fffffffffffffffull) | |
|
1120 ((((u64)(data)) & 0x0000000000000003ull) << 62)); |
|
1121 } |
|
1122 static inline enum psif_dma_vt_key_states get_psif_key__rkey_state(volatile struct psif_key *ptr) |
|
1123 { |
|
1124 /* group=0 shift=62 bits=2 */ |
|
1125 volatile __be64 *const pte = (__be64 *)ptr; |
|
1126 return((enum psif_dma_vt_key_states)((be64toh(pte[0]) >> 62) & 0x0000000000000003ull)); |
|
1127 } |
|
1128 |
|
1129 /* Length of memory region this validation entry is associated with. */ |
|
1130 static inline void set_psif_key__length(volatile struct psif_key *ptr, u64 data) |
|
1131 { |
|
1132 /* group=1 shift=0 bits=64 */ |
|
1133 volatile __be64 *const pte = (__be64 *)ptr; |
|
1134 pte[1] = htobe64((__be64)data); |
|
1135 } |
|
1136 static inline u64 get_psif_key__length(volatile struct psif_key *ptr) |
|
1137 { |
|
1138 /* group=1 shift=0 bits=64 */ |
|
1139 volatile __be64 *const pte = (__be64 *)ptr; |
|
1140 return((u64)be64toh(pte[1])); |
|
1141 } |
|
1142 |
|
1143 static inline void set_psif_key__mmu_context(volatile struct psif_key *ptr, u64 data) |
|
1144 { |
|
1145 /* group=2 shift=0 bits=64 */ |
|
1146 volatile __be64 *const pte = (__be64 *)ptr; |
|
1147 pte[2] = htobe64((__be64)data); |
|
1148 } |
|
1149 static inline u64 get_psif_key__mmu_context(volatile struct psif_key *ptr) |
|
1150 { |
|
1151 /* group=2 shift=0 bits=64 */ |
|
1152 volatile __be64 *const pte = (__be64 *)ptr; |
|
1153 return((u64)be64toh(pte[2])); |
|
1154 } |
|
1155 |
|
1156 static inline void set_psif_key__base_addr(volatile struct psif_key *ptr, u64 data) |
|
1157 { |
|
1158 /* group=3 shift=0 bits=64 */ |
|
1159 volatile __be64 *const pte = (__be64 *)ptr; |
|
1160 pte[3] = htobe64((__be64)data); |
|
1161 } |
|
1162 static inline u64 get_psif_key__base_addr(volatile struct psif_key *ptr) |
|
1163 { |
|
1164 /* group=3 shift=0 bits=64 */ |
|
1165 volatile __be64 *const pte = (__be64 *)ptr; |
|
1166 return((u64)be64toh(pte[3])); |
|
1167 } |
|
1168 |
|
1169 /* sequence number for sanity checking */ |
|
1170 static inline void set_psif_eq_entry__seq_num(volatile struct psif_eq_entry *ptr, u32 data) |
|
1171 { |
|
1172 /* group=7 shift=0 bits=32 */ |
|
1173 volatile __be64 *const pte = (__be64 *)ptr; |
|
1174 pte[7] = htobe64((be64toh(pte[7]) & 0xffffffff00000000ull) | |
|
1175 ((((u64)(data)) & 0x00000000ffffffffull) << 0)); |
|
1176 } |
|
1177 static inline u32 get_psif_eq_entry__seq_num(volatile struct psif_eq_entry *ptr) |
|
1178 { |
|
1179 /* group=7 shift=0 bits=32 */ |
|
1180 volatile __be64 *const pte = (__be64 *)ptr; |
|
1181 return((u32)((be64toh(pte[7]) >> 0) & 0x00000000ffffffffull)); |
|
1182 } |
|
1183 |
|
1184 /* enum psif_epsc_csr_opcode from request */ |
|
1185 static inline void set_psif_epsc_csr_rsp__opcode(volatile struct psif_epsc_csr_rsp *ptr, enum psif_epsc_csr_opcode data) |
|
1186 { |
|
1187 /* group=0 shift=48 bits=8 */ |
|
1188 volatile __be64 *const pte = (__be64 *)ptr; |
|
1189 pte[0] = htobe64((be64toh(pte[0]) & 0xff00ffffffffffffull) | |
|
1190 ((((u64)(data)) & 0x00000000000000ffull) << 48)); |
|
1191 } |
|
1192 static inline enum psif_epsc_csr_opcode get_psif_epsc_csr_rsp__opcode(volatile struct psif_epsc_csr_rsp *ptr) |
|
1193 { |
|
1194 /* group=0 shift=48 bits=8 */ |
|
1195 volatile __be64 *const pte = (__be64 *)ptr; |
|
1196 return((enum psif_epsc_csr_opcode)((be64toh(pte[0]) >> 48) & 0x00000000000000ffull)); |
|
1197 } |
|
1198 |
|
1199 /* Sequence number from request */ |
|
1200 static inline void set_psif_epsc_csr_rsp__seq_num(volatile struct psif_epsc_csr_rsp *ptr, u64 data) |
|
1201 { |
|
1202 /* group=3 shift=0 bits=64 */ |
|
1203 volatile __be64 *const pte = (__be64 *)ptr; |
|
1204 pte[3] = htobe64((__be64)data); |
|
1205 } |
|
1206 static inline u64 get_psif_epsc_csr_rsp__seq_num(volatile struct psif_epsc_csr_rsp *ptr) |
|
1207 { |
|
1208 /* group=3 shift=0 bits=64 */ |
|
1209 volatile __be64 *const pte = (__be64 *)ptr; |
|
1210 return((u64)be64toh(pte[3])); |
|
1211 } |
|
1212 |
|
1213 /* Sequence number - included in response */ |
|
1214 static inline void set_psif_epsc_csr_req__seq_num(volatile struct psif_epsc_csr_req *ptr, u16 data) |
|
1215 { |
|
1216 /* group=0 shift=32 bits=16 */ |
|
1217 volatile __be64 *const pte = (__be64 *)ptr; |
|
1218 pte[0] = htobe64((be64toh(pte[0]) & 0xffff0000ffffffffull) | |
|
1219 ((((u64)(data)) & 0x000000000000ffffull) << 32)); |
|
1220 } |
|
1221 static inline u16 get_psif_epsc_csr_req__seq_num(volatile struct psif_epsc_csr_req *ptr) |
|
1222 { |
|
1223 /* group=0 shift=32 bits=16 */ |
|
1224 volatile __be64 *const pte = (__be64 *)ptr; |
|
1225 return((u16)((be64toh(pte[0]) >> 32) & 0x000000000000ffffull)); |
|
1226 } |
|
1227 |
|
1228 static inline void set_psif_epsc_csr_req__opcode(volatile struct psif_epsc_csr_req *ptr, enum psif_epsc_csr_opcode data) |
|
1229 { |
|
1230 /* group=0 shift=56 bits=8 */ |
|
1231 volatile __be64 *const pte = (__be64 *)ptr; |
|
1232 pte[0] = htobe64((be64toh(pte[0]) & 0x00ffffffffffffffull) | |
|
1233 ((((u64)(data)) & 0x00000000000000ffull) << 56)); |
|
1234 } |
|
1235 static inline enum psif_epsc_csr_opcode get_psif_epsc_csr_req__opcode(volatile struct psif_epsc_csr_req *ptr) |
|
1236 { |
|
1237 /* group=0 shift=56 bits=8 */ |
|
1238 volatile __be64 *const pte = (__be64 *)ptr; |
|
1239 return((enum psif_epsc_csr_opcode)((be64toh(pte[0]) >> 56) & 0x00000000000000ffull)); |
|
1240 } |
|
1241 |
|
1242 /* Index to completion elements added by SW. */ |
|
1243 static inline void set_psif_cq_sw__head_indx(volatile struct psif_cq_sw *ptr, u32 data) |
|
1244 { |
|
1245 /* group=0 shift=32 bits=32 */ |
|
1246 volatile __be64 *const pte = (__be64 *)ptr; |
|
1247 pte[0] = htobe64((be64toh(pte[0]) & 0x00000000ffffffffull) | |
|
1248 ((((u64)(data)) & 0x00000000ffffffffull) << 32)); |
|
1249 } |
|
1250 static inline u32 get_psif_cq_sw__head_indx(volatile struct psif_cq_sw *ptr) |
|
1251 { |
|
1252 /* group=0 shift=32 bits=32 */ |
|
1253 volatile __be64 *const pte = (__be64 *)ptr; |
|
1254 return((u32)((be64toh(pte[0]) >> 32) & 0x00000000ffffffffull)); |
|
1255 } |
|
1256 |
|
1257 /* |
|
1258 * EPS-A core number completions are forwarded to if the proxy_enabled bit is |
|
1259 * set. |
|
1260 */ |
|
1261 static inline void set_psif_cq_hw__eps_core(volatile struct psif_cq_hw *ptr, enum psif_eps_a_core data) |
|
1262 { |
|
1263 /* group=0 shift=52 bits=2 */ |
|
1264 volatile __be64 *const pte = (__be64 *)ptr; |
|
1265 pte[0] = htobe64((be64toh(pte[0]) & 0xffcfffffffffffffull) | |
|
1266 ((((u64)(data)) & 0x0000000000000003ull) << 52)); |
|
1267 } |
|
1268 static inline enum psif_eps_a_core get_psif_cq_hw__eps_core(volatile struct psif_cq_hw *ptr) |
|
1269 { |
|
1270 /* group=0 shift=52 bits=2 */ |
|
1271 volatile __be64 *const pte = (__be64 *)ptr; |
|
1272 return((enum psif_eps_a_core)((be64toh(pte[0]) >> 52) & 0x0000000000000003ull)); |
|
1273 } |
|
1274 |
|
1275 /* |
|
1276 * If set, this completion queue is proxy enabled and should send completions |
|
1277 * to EPS core indicated by the eps_core field. |
|
1278 */ |
|
1279 static inline void set_psif_cq_hw__proxy_en(volatile struct psif_cq_hw *ptr, u8 data) |
|
1280 { |
|
1281 /* group=0 shift=54 bits=1 */ |
|
1282 volatile __be64 *const pte = (__be64 *)ptr; |
|
1283 pte[0] = htobe64((be64toh(pte[0]) & 0xffbfffffffffffffull) | |
|
1284 ((((u64)(data)) & 0x0000000000000001ull) << 54)); |
|
1285 } |
|
1286 static inline u8 get_psif_cq_hw__proxy_en(volatile struct psif_cq_hw *ptr) |
|
1287 { |
|
1288 /* group=0 shift=54 bits=1 */ |
|
1289 volatile __be64 *const pte = (__be64 *)ptr; |
|
1290 return((u8)((be64toh(pte[0]) >> 54) & 0x0000000000000001ull)); |
|
1291 } |
|
1292 |
|
1293 /* The descriptor is valid. */ |
|
1294 static inline void set_psif_cq_hw__valid(volatile struct psif_cq_hw *ptr, u8 data) |
|
1295 { |
|
1296 /* group=0 shift=60 bits=1 */ |
|
1297 volatile __be64 *const pte = (__be64 *)ptr; |
|
1298 pte[0] = htobe64((be64toh(pte[0]) & 0xefffffffffffffffull) | |
|
1299 ((((u64)(data)) & 0x0000000000000001ull) << 60)); |
|
1300 } |
|
1301 static inline u8 get_psif_cq_hw__valid(volatile struct psif_cq_hw *ptr) |
|
1302 { |
|
1303 /* group=0 shift=60 bits=1 */ |
|
1304 volatile __be64 *const pte = (__be64 *)ptr; |
|
1305 return((u8)((be64toh(pte[0]) >> 60) & 0x0000000000000001ull)); |
|
1306 } |
|
1307 |
|
1308 /* |
|
1309 * VA or PA of the base of the completion queue. If PA the MMU context above |
|
1310 * will be a bypass context. Updated by software. The head and tail pointers |
|
1311 * can be calculated by the following calculations: Address = base_ptr + |
|
1312 * (head * ($bits(completion_entry_t)/8 ) Head Pointer and Tail Pointer will |
|
1313 * use the same MMU context as the base, and all need to be VA from one |
|
1314 * address space, or all need to be PA. In typical use, to allow direct user |
|
1315 * access to the head and tail pointer VAs are used. |
|
1316 */ |
|
1317 static inline void set_psif_cq_hw__base_addr(volatile struct psif_cq_hw *ptr, u64 data) |
|
1318 { |
|
1319 /* group=2 shift=0 bits=64 */ |
|
1320 volatile __be64 *const pte = (__be64 *)ptr; |
|
1321 pte[2] = htobe64((__be64)data); |
|
1322 } |
|
1323 static inline u64 get_psif_cq_hw__base_addr(volatile struct psif_cq_hw *ptr) |
|
1324 { |
|
1325 /* group=2 shift=0 bits=64 */ |
|
1326 volatile __be64 *const pte = (__be64 *)ptr; |
|
1327 return((u64)be64toh(pte[2])); |
|
1328 } |
|
1329 |
|
1330 /* Index to completion elements to be consumed by HW. */ |
|
1331 static inline void set_psif_cq_hw__tail_indx(volatile struct psif_cq_hw *ptr, u32 data) |
|
1332 { |
|
1333 /* group=3 shift=32 bits=32 */ |
|
1334 volatile __be64 *const pte = (__be64 *)ptr; |
|
1335 pte[3] = htobe64((be64toh(pte[3]) & 0x00000000ffffffffull) | |
|
1336 ((((u64)(data)) & 0x00000000ffffffffull) << 32)); |
|
1337 } |
|
1338 static inline u32 get_psif_cq_hw__tail_indx(volatile struct psif_cq_hw *ptr) |
|
1339 { |
|
1340 /* group=3 shift=32 bits=32 */ |
|
1341 volatile __be64 *const pte = (__be64 *)ptr; |
|
1342 return((u32)((be64toh(pte[3]) >> 32) & 0x00000000ffffffffull)); |
|
1343 } |
|
1344 |
|
1345 /* |
|
1346 * Work queue completion ID. For receive completions this is the entry number |
|
1347 * in the receive queue and the receive queue descriptor index. For send |
|
1348 * completions this is the sq_sequence number. |
|
1349 */ |
|
1350 static inline void set_psif_cq_entry__wc_id(volatile struct psif_cq_entry *ptr, u64 data) |
|
1351 { |
|
1352 /* group=0 shift=0 bits=64 */ |
|
1353 volatile __be64 *const pte = (__be64 *)ptr; |
|
1354 pte[0] = htobe64((__be64)data); |
|
1355 } |
|
1356 static inline u64 get_psif_cq_entry__wc_id(volatile struct psif_cq_entry *ptr) |
|
1357 { |
|
1358 /* group=0 shift=0 bits=64 */ |
|
1359 volatile __be64 *const pte = (__be64 *)ptr; |
|
1360 return((u64)be64toh(pte[0])); |
|
1361 } |
|
1362 |
|
1363 static inline void set_psif_cq_entry__qp(volatile struct psif_cq_entry *ptr, u32 data) |
|
1364 { |
|
1365 /* group=1 shift=0 bits=24 */ |
|
1366 volatile __be64 *const pte = (__be64 *)ptr; |
|
1367 pte[1] = htobe64((be64toh(pte[1]) & 0xffffffffff000000ull) | |
|
1368 ((((u64)(data)) & 0x0000000000ffffffull) << 0)); |
|
1369 } |
|
1370 static inline u32 get_psif_cq_entry__qp(volatile struct psif_cq_entry *ptr) |
|
1371 { |
|
1372 /* group=1 shift=0 bits=24 */ |
|
1373 volatile __be64 *const pte = (__be64 *)ptr; |
|
1374 return((u32)((be64toh(pte[1]) >> 0) & 0x0000000000ffffffull)); |
|
1375 } |
|
1376 |
|
1377 static inline void set_psif_cq_entry__opcode(volatile struct psif_cq_entry *ptr, enum psif_wc_opcode data) |
|
1378 { |
|
1379 /* group=1 shift=24 bits=8 */ |
|
1380 volatile __be64 *const pte = (__be64 *)ptr; |
|
1381 pte[1] = htobe64((be64toh(pte[1]) & 0xffffffff00ffffffull) | |
|
1382 ((((u64)(data)) & 0x00000000000000ffull) << 24)); |
|
1383 } |
|
1384 static inline enum psif_wc_opcode get_psif_cq_entry__opcode(volatile struct psif_cq_entry *ptr) |
|
1385 { |
|
1386 /* group=1 shift=24 bits=8 */ |
|
1387 volatile __be64 *const pte = (__be64 *)ptr; |
|
1388 return((enum psif_wc_opcode)((be64toh(pte[1]) >> 24) & 0x00000000000000ffull)); |
|
1389 } |
|
1390 |
|
1391 static inline void set_psif_cq_entry__status(volatile struct psif_cq_entry *ptr, enum psif_wc_status data) |
|
1392 { |
|
1393 /* group=2 shift=24 bits=8 */ |
|
1394 volatile __be64 *const pte = (__be64 *)ptr; |
|
1395 pte[2] = htobe64((be64toh(pte[2]) & 0xffffffff00ffffffull) | |
|
1396 ((((u64)(data)) & 0x00000000000000ffull) << 24)); |
|
1397 } |
|
1398 static inline enum psif_wc_status get_psif_cq_entry__status(volatile struct psif_cq_entry *ptr) |
|
1399 { |
|
1400 /* group=2 shift=24 bits=8 */ |
|
1401 volatile __be64 *const pte = (__be64 *)ptr; |
|
1402 return((enum psif_wc_status)((be64toh(pte[2]) >> 24) & 0x00000000000000ffull)); |
|
1403 } |
|
1404 |
|
1405 /* sequence number for sanity checking */ |
|
1406 static inline void set_psif_cq_entry__seq_num(volatile struct psif_cq_entry *ptr, u32 data) |
|
1407 { |
|
1408 /* group=7 shift=0 bits=32 */ |
|
1409 volatile __be64 *const pte = (__be64 *)ptr; |
|
1410 pte[7] = htobe64((be64toh(pte[7]) & 0xffffffff00000000ull) | |
|
1411 ((((u64)(data)) & 0x00000000ffffffffull) << 0)); |
|
1412 } |
|
1413 static inline u32 get_psif_cq_entry__seq_num(volatile struct psif_cq_entry *ptr) |
|
1414 { |
|
1415 /* group=7 shift=0 bits=32 */ |
|
1416 volatile __be64 *const pte = (__be64 *)ptr; |
|
1417 return((u32)((be64toh(pte[7]) >> 0) & 0x00000000ffffffffull)); |
|
1418 } |
|
1419 |
|
1420 static inline void set_psif_ah__remote_lid(volatile struct psif_ah *ptr, u16 data) |
|
1421 { |
|
1422 /* group=2 shift=0 bits=16 */ |
|
1423 volatile __be64 *const pte = (__be64 *)ptr; |
|
1424 pte[2] = htobe64((be64toh(pte[2]) & 0xffffffffffff0000ull) | |
|
1425 ((((u64)(data)) & 0x000000000000ffffull) << 0)); |
|
1426 } |
|
1427 static inline u16 get_psif_ah__remote_lid(volatile struct psif_ah *ptr) |
|
1428 { |
|
1429 /* group=2 shift=0 bits=16 */ |
|
1430 volatile __be64 *const pte = (__be64 *)ptr; |
|
1431 return((u16)((be64toh(pte[2]) >> 0) & 0x000000000000ffffull)); |
|
1432 } |
|
1433 |
|
1434 static inline void set_psif_ah__sl(volatile struct psif_ah *ptr, u8 data) |
|
1435 { |
|
1436 /* group=2 shift=20 bits=4 */ |
|
1437 volatile __be64 *const pte = (__be64 *)ptr; |
|
1438 pte[2] = htobe64((be64toh(pte[2]) & 0xffffffffff0fffffull) | |
|
1439 ((((u64)(data)) & 0x000000000000000full) << 20)); |
|
1440 } |
|
1441 static inline u8 get_psif_ah__sl(volatile struct psif_ah *ptr) |
|
1442 { |
|
1443 /* group=2 shift=20 bits=4 */ |
|
1444 volatile __be64 *const pte = (__be64 *)ptr; |
|
1445 return((u8)((be64toh(pte[2]) >> 20) & 0x000000000000000full)); |
|
1446 } |
|
1447 static inline void set_psif_csr_mmu_config__ta_upper_twelve(volatile void *ptr, u16 data) |
|
1448 { |
|
1449 /* group=0 shift=32 bits=12 */ |
|
1450 volatile __be64 *pte = (__be64 *)ptr; |
|
1451 pte[0] = htobe64((be64toh(pte[0]) & 0xfffff000ffffffffull) | |
|
1452 ((((u64)(data)) & 0x0000000000000fffull) << 32)); |
|
1453 } |
|
1454 static inline void set_psif_csr_mmu_config__pa_upper_twelve(volatile void *ptr, u16 data) |
|
1455 { |
|
1456 /* group=0 shift=48 bits=12 */ |
|
1457 volatile __be64 *pte = (__be64 *)ptr; |
|
1458 pte[0] = htobe64((be64toh(pte[0]) & 0xf000ffffffffffffull) | |
|
1459 ((((u64)(data)) & 0x0000000000000fffull) << 48)); |
|
1460 } |
|
1461 |
|
1462 #if defined (HOST_LITTLE_ENDIAN) |
|
1463 #elif defined (HOST_BIG_ENDIAN) |
|
1464 #else |
|
1465 #error "Could not determine byte order in psif_hw_setget.h !?" |
|
1466 #endif |
|
1467 |
|
1468 |
|
1469 #ifdef __cplusplus |
|
1470 } |
|
1471 #endif |
|
1472 |
|
1473 |
|
1474 #endif /* _PSIF_HW_SETGET_H */ |