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1 # XML representation of 32-bit SPARC floating-point registers. |
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2 --- /dev/null 2013-10-05 19:42:45.000000000 -0700 |
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3 +++ gdb-7.6/gdb/features/sparc-fpu.xml 2013-08-27 23:56:47.000000000 -0700 |
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4 @@ -0,0 +1,60 @@ |
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5 +<?xml version="1.0"?> |
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6 +<!-- Copyright (C) 2007-2013 Free Software Foundation, Inc. |
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7 + |
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8 + Copying and distribution of this file, with or without modification, |
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9 + are permitted in any medium without royalty provided the copyright |
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10 + notice and this notice are preserved. --> |
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11 + |
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12 +<!DOCTYPE feature SYSTEM "gdb-target.dtd"> |
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13 +<feature name="org.gnu.gdb.sparc.fpu"> |
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14 + <reg name="f0" bitsize="32" type="ieee_single" regnum="32"/> |
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15 + <reg name="f1" bitsize="32" type="ieee_single" regnum="33"/> |
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16 + <reg name="f2" bitsize="32" type="ieee_single" regnum="34"/> |
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17 + <reg name="f3" bitsize="32" type="ieee_single" regnum="35"/> |
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18 + <reg name="f4" bitsize="32" type="ieee_single" regnum="36"/> |
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19 + <reg name="f5" bitsize="32" type="ieee_single" regnum="37"/> |
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20 + <reg name="f6" bitsize="32" type="ieee_single" regnum="38"/> |
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21 + <reg name="f7" bitsize="32" type="ieee_single" regnum="39"/> |
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22 + <reg name="f8" bitsize="32" type="ieee_single" regnum="40"/> |
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23 + <reg name="f9" bitsize="32" type="ieee_single" regnum="41"/> |
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24 + <reg name="f10" bitsize="32" type="ieee_single" regnum="42"/> |
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25 + <reg name="f11" bitsize="32" type="ieee_single" regnum="43"/> |
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26 + <reg name="f12" bitsize="32" type="ieee_single" regnum="44"/> |
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27 + <reg name="f13" bitsize="32" type="ieee_single" regnum="45"/> |
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28 + <reg name="f14" bitsize="32" type="ieee_single" regnum="46"/> |
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29 + <reg name="f15" bitsize="32" type="ieee_single" regnum="47"/> |
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30 + <reg name="f16" bitsize="32" type="ieee_single" regnum="48"/> |
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31 + <reg name="f17" bitsize="32" type="ieee_single" regnum="49"/> |
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32 + <reg name="f18" bitsize="32" type="ieee_single" regnum="50"/> |
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33 + <reg name="f19" bitsize="32" type="ieee_single" regnum="51"/> |
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34 + <reg name="f20" bitsize="32" type="ieee_single" regnum="52"/> |
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35 + <reg name="f21" bitsize="32" type="ieee_single" regnum="53"/> |
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36 + <reg name="f22" bitsize="32" type="ieee_single" regnum="54"/> |
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37 + <reg name="f23" bitsize="32" type="ieee_single" regnum="55"/> |
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38 + <reg name="f24" bitsize="32" type="ieee_single" regnum="56"/> |
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39 + <reg name="f25" bitsize="32" type="ieee_single" regnum="57"/> |
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40 + <reg name="f26" bitsize="32" type="ieee_single" regnum="58"/> |
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41 + <reg name="f27" bitsize="32" type="ieee_single" regnum="59"/> |
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42 + <reg name="f28" bitsize="32" type="ieee_single" regnum="60"/> |
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43 + <reg name="f29" bitsize="32" type="ieee_single" regnum="61"/> |
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44 + <reg name="f30" bitsize="32" type="ieee_single" regnum="62"/> |
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45 + <reg name="f31" bitsize="32" type="ieee_single" regnum="63"/> |
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46 + |
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47 + <reg name="d0" bitsize="64" type="ieee_double" regnum="32"/> |
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48 + <reg name="d2" bitsize="64" type="ieee_double" regnum="34"/> |
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49 + <reg name="d4" bitsize="64" type="ieee_double" regnum="36"/> |
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50 + <reg name="d6" bitsize="64" type="ieee_double" regnum="38"/> |
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51 + <reg name="d8" bitsize="64" type="ieee_double" regnum="40"/> |
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52 + <reg name="d10" bitsize="64" type="ieee_double" regnum="42"/> |
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53 + <reg name="d12" bitsize="64" type="ieee_double" regnum="44"/> |
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54 + <reg name="d14" bitsize="64" type="ieee_double" regnum="46"/> |
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55 + <reg name="d16" bitsize="64" type="ieee_double" regnum="48"/> |
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56 + <reg name="d18" bitsize="64" type="ieee_double" regnum="50"/> |
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57 + <reg name="d20" bitsize="64" type="ieee_double" regnum="52"/> |
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58 + <reg name="d22" bitsize="64" type="ieee_double" regnum="54"/> |
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59 + <reg name="d24" bitsize="64" type="ieee_double" regnum="56"/> |
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60 + <reg name="d26" bitsize="64" type="ieee_double" regnum="58"/> |
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61 + <reg name="d28" bitsize="64" type="ieee_double" regnum="60"/> |
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62 + <reg name="d30" bitsize="64" type="ieee_double" regnum="62"/> |
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63 +</feature> |
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64 + |