components/open-fabrics/libsif/include/sif/sif_user.h
changeset 5564 e533d5840fdd
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     1 /*
       
     2  * Copyright (c) 2015, 2016, Oracle and/or its affiliates. All rights reserved.
       
     3  */
       
     4 
       
     5 /*
       
     6  * Redistribution and use in source and binary forms, with or without
       
     7  *  modification, are permitted provided that the following conditions are met:
       
     8  *
       
     9  * 1. Redistributions of source code must retain the above copyright notice,
       
    10  *    this list of conditions and the following disclaimer.
       
    11  *
       
    12  * 2. Redistributions in binary form must reproduce the above copyright notice,
       
    13  *    this list of conditions and the following disclaimer in the documentation
       
    14  *    and/or other materials provided with the distribution.
       
    15  *
       
    16  * 3. Neither the name of the copyright holder nor the names of its contributors
       
    17  *    may be used to endorse or promote products derived from this software
       
    18  *    without specific prior written permission.
       
    19  *
       
    20  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
       
    21  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
       
    22  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
       
    23  * ARE DISCLAIMED.
       
    24  * IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY
       
    25  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
       
    26  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
       
    27  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
       
    28  * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
       
    29  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
       
    30  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
       
    31  */
       
    32 
       
    33 /*
       
    34  * Userspace library for Oracle SIF Infiniband PCI Express
       
    35  * host channel adapter (HCA)
       
    36  *
       
    37  * sif_user.h: This file defines sif specific verbs extension request/response.
       
    38  *   This file is included both from user space and kernel space so
       
    39  *   it must not contain any kernel/user specific header file includes.
       
    40  */
       
    41 
       
    42 #ifndef _SIF_USER_H
       
    43 #define	_SIF_USER_H
       
    44 
       
    45 #ifdef __cplusplus
       
    46 extern "C" {
       
    47 #endif
       
    48 
       
    49 /*
       
    50  * Binary interface control:
       
    51  *   Major version difference indicate backward incompatible changes
       
    52  *   Minor version difference indicate that only a common subset of
       
    53  *   features are available.
       
    54  *
       
    55  */
       
    56 #define	SIF_UVERBS_ABI_MAJOR_VERSION	3
       
    57 #define	SIF_UVERBS_ABI_MINOR_VERSION	4
       
    58 
       
    59 /* Bw comp */
       
    60 #define	SIF_UVERBS_VERSION(x, y) ((x) << 8 | (y))
       
    61 #define	SIF_UVERBS_ABI_VERSION \
       
    62 	SIF_UVERBS_VERSION(SIF_UVERBS_ABI_MAJOR_VERSION, \
       
    63 	SIF_UVERBS_ABI_MINOR_VERSION)
       
    64 
       
    65 /*
       
    66  * Bit 5 is not used by the PSIF_WC_OPCODE_FOO_BAR enums. Hence, using
       
    67  * it to indicate if QP has been destroyed before the CQE has been
       
    68  * polled
       
    69  */
       
    70 #define	SIF_WC_QP_DESTROYED (1<<5)
       
    71 
       
    72 /*
       
    73  * This struct will be amended to an un-polled cqe, in case the QP has
       
    74  * been destroyed before the CQEs are polled. The information is
       
    75  * needed in order to handle flushing of SRQs and generation of Last
       
    76  * WQE Reached event.
       
    77  *
       
    78  * The information amended to the CQE is _only_ valid if the CQE has
       
    79  * been marked with SIF_WC_QP_DESTROYED.
       
    80  */
       
    81 struct sif_post_mortem_qp_info_in_cqe {
       
    82 	int was_srq;
       
    83 	int srq_idx;
       
    84 	int qpn; /* Could be useful for de-bugging/logging */
       
    85 };
       
    86 
       
    87 #ifndef __u32
       
    88 #define	__u32	uint32_t
       
    89 #endif
       
    90 
       
    91 /*
       
    92  * These definitions must be kept in sync with
       
    93  * the ones in libsif's sif.h
       
    94  */
       
    95 typedef enum sif_vendor_flags {
       
    96 	/*
       
    97 	 * Use special mmu setup in associated mappings
       
    98 	 * NB! Modifies input to ibv_reg_mr!
       
    99 	 */
       
   100 	MMU_special	= 0x1,
       
   101 	/* Trigger send queue mode instead of using VCBs */
       
   102 	SQ_mode		= 0x2,
       
   103 	/* Enable EPS-A proxying - requires the eps_a field to be set */
       
   104 	proxy_mode	= 0x4,
       
   105 	/* Enable kernel mode - default is direct user mode */
       
   106 	SVF_kernel_mode	= 0x8,
       
   107 	/* Value to use for the qosl bit in the qp state */
       
   108 	tsu_qosl	= 0x10
       
   109 } sif_vendor_flags_t;
       
   110 
       
   111 typedef enum sif_mem_type {
       
   112 	SIFMT_BYPASS,	/* Use MMU bypass in associated mmu contexts */
       
   113 	SIFMT_UMEM,	/* Normal default umem based user level mapping */
       
   114 	/* Mapping of user memory based on the process' own page table */
       
   115 	SIFMT_UMEM_SPT,
       
   116 	/*
       
   117 	 * A large (sparsely populated) SIF only vaddr mapping
       
   118 	 * (used for a.o.SQ CMPL)
       
   119 	 */
       
   120 	SIFMT_CS,
       
   121 	/* Special mapping of a vaddr range to a single page (see #1931) */
       
   122 	SIFMT_ZERO,
       
   123 	/* MMU bypass mapped read only for device (requires IOMMU enabled) */
       
   124 	SIFMT_BYPASS_RO,
       
   125 	/* GVA2GPA mapped read only for device (requires IOMMU enabled) */
       
   126 	SIFMT_UMEM_RO,
       
   127 	/* Use GVA2GPA but input is based on a phys_buf array instead of umem */
       
   128 	SIFMT_PHYS,
       
   129 	/*
       
   130 	 * Use GVA2GPA but input is based on a page address array instead
       
   131 	 * of umem
       
   132 	 */
       
   133 	SIFMT_FMR,
       
   134 	/* Similar to FMR but input pages are 2M instead of 4K */
       
   135 	SIFMT_2M,
       
   136 	/* Bypass mode - special kernel mappings with no memory allocated */
       
   137 	SIFMT_NOMEM,
       
   138 	/* sif_kmem based 4K page allocation - mostly for test purposes */
       
   139 	SIFMT_4K,
       
   140 	SIFMT_RDMA,
       
   141 	SIFMT_PTONLY,
       
   142 	SIFMT_CTRL_PT,
       
   143 	SIFMT_MAX
       
   144 } sif_mem_type_t;
       
   145 
       
   146 typedef enum sif_proxy_type {
       
   147 	SIFPX_OFF, /* Default value - no proxying */
       
   148 	SIFPX_EPSA_1,
       
   149 	SIFPX_EPSA_2,
       
   150 	SIFPX_EPSA_3,
       
   151 	SIFPX_EPSA_4
       
   152 } sif_proxy_type_t;
       
   153 
       
   154 
       
   155 typedef enum sif_flush_type {
       
   156 	NO_FLUSH,
       
   157 	FLUSH_SQ,
       
   158 	FLUSH_RQ
       
   159 } sif_flush_type_t;
       
   160 
       
   161 /* These should be multiple of 64 bytes and densely packed: */
       
   162 
       
   163 typedef struct sif_get_context_ext {
       
   164 	uint32_t abi_version;
       
   165 	uint32_t reserved;
       
   166 } sif_get_context_ext_t;
       
   167 
       
   168 typedef struct sif_get_context_resp_ext {
       
   169 	/* Distance in bytes between descriptor elements */
       
   170 	uint32_t sq_sw_ext_sz;
       
   171 	uint32_t rq_ext_sz;
       
   172 	uint32_t cq_ext_sz;
       
   173 	/* Number of entries per block of descriptors */
       
   174 	uint32_t sq_entry_per_block;
       
   175 	uint32_t rq_entry_per_block;
       
   176 	uint32_t cq_entry_per_block;
       
   177 	/* Dist between sq hw descriptor elms, from >= v.3.3 */
       
   178 	uint32_t sq_hw_ext_sz;
       
   179 	uint32_t reserved;
       
   180 } sif_get_context_resp_ext_t;
       
   181 
       
   182 typedef struct sif_alloc_pd_resp_ext {
       
   183 	/* The virtual collect buffer to use by this protection domain */
       
   184 	int cb_idx;
       
   185 	uint32_t reserved;
       
   186 } sif_alloc_pd_resp_ext_t;
       
   187 
       
   188 typedef struct sif_create_cq_ext {
       
   189 	enum sif_vendor_flags flags;
       
   190 	enum sif_proxy_type proxy;
       
   191 } sif_create_cq_ext_t;
       
   192 
       
   193 typedef struct sif_create_cq_resp_ext {
       
   194 	uint32_t cq_idx;
       
   195 	uint32_t reserved;
       
   196 	uint32_t cq_entries;
       
   197 } sif_create_cq_resp_ext_t;
       
   198 
       
   199 
       
   200 typedef struct sif_create_qp_ext {
       
   201 	enum sif_vendor_flags flags;
       
   202 	enum sif_proxy_type proxy;
       
   203 } sif_create_qp_ext_t;
       
   204 
       
   205 typedef struct sif_create_qp_resp_ext {
       
   206 	uint32_t qp_idx;
       
   207 	uint32_t rq_idx;
       
   208 	uint32_t magic;
       
   209 	uint32_t sq_extent;
       
   210 	uint32_t rq_extent;
       
   211 	uint32_t sq_sgl_offset;
       
   212 	uint32_t sq_mr_idx;
       
   213 	uint32_t reserved;
       
   214 	uint64_t sq_dma_handle;
       
   215 } sif_create_qp_resp_ext_t;
       
   216 
       
   217 typedef struct sif_modify_qp_ext
       
   218 {
       
   219 	enum sif_flush_type flush;
       
   220 	uint32_t  reserved;
       
   221 } sif_modify_qp_ext_t;
       
   222 
       
   223 
       
   224 typedef struct sif_reg_mr_ext {
       
   225 	enum sif_vendor_flags flags;
       
   226 	enum sif_mem_type mem_type;
       
   227 	/* Used by gva_type SIFGT_ZERO - indicates psif vmap length */
       
   228 	uint64_t map_length;
       
   229 	/* Used by gva_type SIFGT_ZERO - indicates valid memory length */
       
   230 	uint64_t phys_length;
       
   231 } sif_reg_mr_ext_t;
       
   232 
       
   233 typedef struct sif_reg_mr_resp_ext {
       
   234 	uint64_t uv2dma;  /* Used to support bypass mode */
       
   235 } sif_reg_mr_resp_ext_t;
       
   236 
       
   237 typedef struct sif_create_srq_ext {
       
   238 	enum sif_vendor_flags flags;
       
   239 	uint32_t res1;
       
   240 } sif_create_srq_ext_t;
       
   241 
       
   242 typedef struct sif_create_srq_resp_ext {
       
   243 	uint32_t index;
       
   244 	uint32_t extent;
       
   245 } sif_create_srq_resp_ext_t;
       
   246 
       
   247 typedef struct sif_create_ah_resp_ext {
       
   248 	uint32_t index;
       
   249 	uint32_t reserved;
       
   250 } sif_create_ah_resp_ext_t;
       
   251 
       
   252 /* mmap offset encoding */
       
   253 
       
   254 enum sif_mmap_cmd {
       
   255 	SIF_MAP_NONE,	/* No mapping */
       
   256 	/* Map a collect buffer - cb index as argument */
       
   257 	SIF_MAP_CB,
       
   258 	/* Map an SQ, RQ or CQ (entries) - queue index as argument */
       
   259 	SIF_MAP_SQ,
       
   260 	SIF_MAP_RQ,
       
   261 	SIF_MAP_CQ,
       
   262 	/*
       
   263 	 * Map a block of SQ, RQ or CQ software descriptors -
       
   264 	 * block index as argument
       
   265 	 */
       
   266 	SIF_MAP_SQ_SW,
       
   267 	SIF_MAP_RQ_SW,
       
   268 	SIF_MAP_CQ_SW,
       
   269 	/* These are safe to map read-only (so far only sq_hw in use) */
       
   270 	/* Map a block of qp descriptors - block index as argument */
       
   271 	SIF_MAP_QP,
       
   272 	/*
       
   273 	 * Map a block of SQ, RQ or CQ hardware descriptors -
       
   274 	 * block index as argument
       
   275 	 */
       
   276 	SIF_MAP_SQ_HW,
       
   277 	SIF_MAP_RQ_HW,
       
   278 	SIF_MAP_CQ_HW,
       
   279 	SIF_MAP_MAX
       
   280 };
       
   281 
       
   282 static inline uint64_t mmap_set_cmd(enum sif_mmap_cmd cmd, uint32_t index)
       
   283 {
       
   284 	return ((uint64_t)cmd << 44) | ((uint64_t)index << 13);
       
   285 }
       
   286 
       
   287 static inline void mmap_get_cmd(uint64_t offset, enum sif_mmap_cmd *cmdp,
       
   288     uint32_t *idxp)
       
   289 {
       
   290 	*cmdp = (offset >> 44) & 0xff;
       
   291 	*idxp = (offset >> 13) & 0x7fffffff;
       
   292 }
       
   293 
       
   294 #ifdef __cplusplus
       
   295 }
       
   296 #endif
       
   297 
       
   298 #endif /* _SIF_USER_H */