|
1 # This patch does the x86 architecture libsif changes specific to solaris. |
|
2 # It is developed By solaris PSIF team. We plan to have a common upstream repo |
|
3 # and submit these changes to it, but do not yet have a target date of doing it. |
|
4 diff -r 0d4ed3308871 src/encoding.h |
|
5 --- a/src/encoding.h Tue Oct 18 17:59:31 2016 +0530 |
|
6 +++ b/src/encoding.h Tue Oct 18 18:59:13 2016 +0530 |
|
7 @@ -37,6 +37,7 @@ |
|
8 #define _SIF_ENCODING_H |
|
9 |
|
10 #include <sys/types.h> |
|
11 +#include <infiniband/arch.h> |
|
12 #if !(defined(__SVR4) && defined(__sun)) |
|
13 #include "kernel_types.h" |
|
14 #endif |
|
15 diff -r 0d4ed3308871 src/sif.c |
|
16 --- a/src/sif.c Tue Oct 18 17:59:31 2016 +0530 |
|
17 +++ b/src/sif.c Tue Oct 18 18:59:13 2016 +0530 |
|
18 @@ -188,9 +188,11 @@ |
|
19 const char *fast_copy_mnem; |
|
20 const int feature_mnemonics_size = 500; |
|
21 char feature_mnemonics[feature_mnemonics_size]; |
|
22 +#if !(defined(__SVR4) && defined(__sun)) |
|
23 #if defined(__SSE__) || defined(__AVX__) |
|
24 int disa_x_wc; |
|
25 #endif |
|
26 +#endif |
|
27 int ret = 0; |
|
28 |
|
29 #ifdef HAVE_VERBS_REGISTER_DRIVER |
|
30 @@ -264,9 +266,11 @@ |
|
31 |
|
32 odm = getenv("SIF_OPT_DISABLE_MASK"); |
|
33 context->opt_disable_mask = odm ? strtoll(odm, NULL, 0) : 0; |
|
34 +#if !(defined(__SVR4) && defined(__sun)) |
|
35 #if defined(__SSE__) || defined(__AVX__) |
|
36 disa_x_wc = context->opt_disable_mask & SOD_EXPLICIT_WC; |
|
37 #endif |
|
38 +#endif |
|
39 |
|
40 #if defined(__SVR4) && defined(__sun) |
|
41 user_cb_disable = getenv("SIF_DISABLE_USER_CB"); |
|
42 @@ -276,7 +280,14 @@ |
|
43 * set env variable SIF_CB_MODE = 1 to change to cb_mode |
|
44 */ |
|
45 cb_mode = getenv("SIF_CB_MODE"); |
|
46 - mode = cb_mode ? strtol(cb_mode, NULL, 0) : 0; |
|
47 + if (cb_mode) |
|
48 + mode = strtol(cb_mode, NULL, 0); |
|
49 + else |
|
50 +#if defined(__x86_64) |
|
51 + mode = 1; |
|
52 +#else |
|
53 + mode = 0; |
|
54 +#endif |
|
55 context->default_flags |= mode? 0: SQ_mode; |
|
56 sif_log(context, SIF_INFO, "Mode: %s", mode? "CB/SQ": "SQ"); |
|
57 #endif |
|
58 @@ -293,12 +304,14 @@ |
|
59 |
|
60 fast_copy_mnem = "fast_copy_plain"; |
|
61 context->fast_copy = fast_copy_plain; |
|
62 +#if !(defined(__SVR4) && defined(__sun)) |
|
63 #if defined(__SSE__) |
|
64 if (can_use_sse()) { |
|
65 fast_copy_mnem = disa_x_wc ? "fast_copy_sse" : "fast_copy_wc_sse"; |
|
66 context->fast_copy = disa_x_wc ? fast_copy_sse : fast_copy_wc_sse; |
|
67 } |
|
68 #endif |
|
69 +#endif |
|
70 #if defined(__AVX__) |
|
71 if (can_use_avx()) { |
|
72 fast_copy_mnem = disa_x_wc ? "fast_copy_avx" : "fast_copy_wc_avx"; |
|
73 diff -r 0d4ed3308871 src/sndrcv.c |
|
74 --- a/src/sndrcv.c Tue Oct 18 17:59:31 2016 +0530 |
|
75 +++ b/src/sndrcv.c Tue Oct 18 18:59:13 2016 +0530 |
|
76 @@ -573,6 +573,7 @@ |
|
77 |
|
78 |
|
79 #if defined(__SSE__) |
|
80 +#if !(defined(__SVR4) && defined(__sun)) |
|
81 __attribute__((__target__("sse"))) void fast_copy_wc_sse(void *_dst, const void *_src, int len) |
|
82 { |
|
83 __m128 *dst = (__m128 *)_dst; |
|
84 @@ -611,6 +612,7 @@ |
|
85 } |
|
86 #endif |
|
87 #endif |
|
88 +#endif |
|
89 |
|
90 void fast_copy_plain(void *_dst, const void *_src, int len) |
|
91 { |