--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/components/gdb/patches/gdb.features.sparc-cpu.xml.patch	Wed Oct 16 06:53:51 2013 -0700
@@ -0,0 +1,46 @@
+# XML representation of 32-bit SPARC integer registers.
+--- /dev/null	2013-10-05 19:42:45.000000000 -0700
++++ gdb-7.6/gdb/features/sparc-cpu.xml	2013-08-27 20:10:12.000000000 -0700
+@@ -0,0 +1,42 @@
++<?xml version="1.0"?>
++<!-- Copyright (c) 2013, Oraclel and/or its affiliates. All rights reserved.
++
++     Copying and distribution of this file, with or without modification,
++     are permitted in any medium without royalty provided the copyright
++     notice and this notice are preserved.  -->
++
++<!DOCTYPE feature SYSTEM "gdb-target.dtd">
++<feature name="org.gnu.gdb.sparc.cpu">
++  <reg name="g0" bitsize="32" type="uint32" regnum="0"/>
++  <reg name="g1" bitsize="32" type="uint32" regnum="1"/>
++  <reg name="g2" bitsize="32" type="uint32" regnum="2"/>
++  <reg name="g3" bitsize="32" type="uint32" regnum="3"/>
++  <reg name="g4" bitsize="32" type="uint32" regnum="4"/>
++  <reg name="g5" bitsize="32" type="uint32" regnum="5"/>
++  <reg name="g6" bitsize="32" type="uint32" regnum="6"/>
++  <reg name="g7" bitsize="32" type="uint32" regnum="7"/>
++  <reg name="o0" bitsize="32" type="uint32" regnum="8"/>
++  <reg name="o1" bitsize="32" type="uint32" regnum="9"/>
++  <reg name="o2" bitsize="32" type="uint32" regnum="10"/>
++  <reg name="o3" bitsize="32" type="uint32" regnum="11"/>
++  <reg name="o4" bitsize="32" type="uint32" regnum="12"/>
++  <reg name="o5" bitsize="32" type="uint32" regnum="13"/>
++  <reg name="sp" bitsize="32" type="uint32" regnum="14"/>
++  <reg name="o7" bitsize="32" type="uint32" regnum="15"/>
++  <reg name="l0" bitsize="32" type="uint32" regnum="16"/>
++  <reg name="l1" bitsize="32" type="uint32" regnum="17"/>
++  <reg name="l2" bitsize="32" type="uint32" regnum="18"/>
++  <reg name="l3" bitsize="32" type="uint32" regnum="19"/>
++  <reg name="l4" bitsize="32" type="uint32" regnum="20"/>
++  <reg name="l5" bitsize="32" type="uint32" regnum="21"/>
++  <reg name="l6" bitsize="32" type="uint32" regnum="22"/>
++  <reg name="l7" bitsize="32" type="uint32" regnum="23"/>
++  <reg name="i0" bitsize="32" type="uint32" regnum="24"/>
++  <reg name="i1" bitsize="32" type="uint32" regnum="25"/>
++  <reg name="i2" bitsize="32" type="uint32" regnum="26"/>
++  <reg name="i3" bitsize="32" type="uint32" regnum="27"/>
++  <reg name="i4" bitsize="32" type="uint32" regnum="28"/>
++  <reg name="i5" bitsize="32" type="uint32" regnum="29"/>
++  <reg name="fp" bitsize="32" type="uint32" regnum="30"/>
++  <reg name="i7" bitsize="32" type="uint32" regnum="31"/>
++</feature>