components/visual-panels/core/src/java/lib/TimingFramework/Makefile
changeset 1434 c782e620dd26
parent 827 0944d8c0158b
--- a/components/visual-panels/core/src/java/lib/TimingFramework/Makefile	Wed Aug 14 11:12:36 2013 -0600
+++ b/components/visual-panels/core/src/java/lib/TimingFramework/Makefile	Wed Aug 14 10:54:58 2013 -0700
@@ -18,7 +18,7 @@
 #
 # CDDL HEADER END
 #
-# Copyright (c) 2012, Oracle and/or its affiliates. All rights reserved.
+# Copyright (c) 2012, 2013, Oracle and/or its affiliates. All rights reserved.
 #
 
 include ../../../../../../../../make-rules/shared-macros.mk
@@ -44,6 +44,8 @@
 COMPONENT_INSTALL_ARGS 		+= -Ddist=${PROTO_DIR} -Dver=$(COMPONENT_VERSION)
 COMPONENT_INSTALL_TARGETS 	+= install
 
+ASLR_MODE = $(ASLR_NOT_APPLICABLE)
+
 # common targets
 build:		$(BUILD_32)