# HG changeset patch
# User Rishi Srivatsavai <Rishi.Srivatsavai@oracle.com>
# Date 1314672534 25200
# Node ID fea5d407097b902714bce4d5c0c5214d50e3632c
# Parent  40d5ca40675376efba2354334ed0b48f83b6df02
7082431 trilld bus error on sparc as CFLAGS default includes -xmemalign=8s in userland

diff -r 40d5ca406753 -r fea5d407097b components/quagga/Makefile
--- a/components/quagga/Makefile	Mon Aug 29 17:51:05 2011 -0700
+++ b/components/quagga/Makefile	Mon Aug 29 19:48:54 2011 -0700
@@ -34,6 +34,10 @@
 COMPONENT_ARCHIVE_URL=	http://www.quagga.net/download/attic/$(COMPONENT_ARCHIVE)
 PATCH_LEVEL = 0
 
+# without this we bus error on sparc. Until the code in all of Quagga
+# does not have any misaligned code we will need the following flag.
+studio_ALIGN.sparc.32=  -xmemalign=8i
+
 # These options are carried over from the SFW consolidation. Using -xO4 was
 # explicitly commented out, but no reason was docuemnted.