17199356 The ibv_devinfo command cannot print the board_id of CX-3 IB-HCA (userland) s11-update
authorChris Juhasz <chris.juhasz@oracle.com>
Wed, 11 Sep 2013 09:47:05 -0700
branchs11-update
changeset 2760 d8617e86d47d
parent 2759 810cc8b2e719
child 2763 3d6d26aa4a1c
17199356 The ibv_devinfo command cannot print the board_id of CX-3 IB-HCA (userland) 16831066 need hardening in libibverbs (e.g., prevent double frees, interprocess sharing) 16821677 qperf can not work between Solaris/Linux
components/open-fabrics/libibverbs/MELLANOX.h
components/open-fabrics/libibverbs/Makefile
components/open-fabrics/libibverbs/patches/base.patch
components/open-fabrics/libibverbs/solaris_compatibility.c
components/open-fabrics/qperf/patches/base.patch
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/components/open-fabrics/libibverbs/MELLANOX.h	Wed Sep 11 09:47:05 2013 -0700
@@ -0,0 +1,306 @@
+/*
+ * CDDL HEADER START
+ *
+ * The contents of this file are subject to the terms of the
+ * Common Development and Distribution License (the "License").
+ * You may not use this file except in compliance with the License.
+ *
+ * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
+ * or http://www.opensolaris.org/os/licensing.
+ * See the License for the specific language governing permissions
+ * and limitations under the License.
+ *
+ * When distributing Covered Code, include this CDDL HEADER in each
+ * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
+ * If applicable, add the following below this CDDL HEADER, with the
+ * fields enclosed by brackets "[]" replaced with your own identifying
+ * information: Portions Copyright [yyyy] [name of copyright owner]
+ *
+ * CDDL HEADER END
+ */
+
+/*
+ * Copyright (c) 2009, 2013, Oracle and/or its affiliates. All rights reserved.
+ */
+
+#ifndef _HDRS_MELLANOX_H
+#define	_HDRS_MELLANOX_H
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+ * MELLANOX.h
+ *
+ * This file contain common information related to Mellanox technologies
+ * HCA cards.
+ */
+#define	SUNW_OUI		0x0003baULL
+#define	MLX_OUI			0x0002c9ULL
+#define	MLX_DEFAULT_NODE_GUID	0x2c9000100d050ULL
+#define	MLX_DEFAULT_P1_GUID	0x2c9000100d051ULL
+#define	MLX_DEFAULT_P2_GUID	0x2c9000100d052ULL
+#define	MLX_DEFAULT_SYSIMG_GUID	0x2c9000100d053ULL
+
+/* How many bits to shift and leave just the OUI */
+#define	OUISHIFT		40
+
+#define	MLX_VPR_VIDLEN		9	/* "MELLANOX" + '\0' */
+#define	MLX_VPR_REVLEN		21	/* "%04x.%04x.%04x: %04x" + '\0' */
+
+#define	FWFLASH_IB_MAGIC_NUMBER		0xF00B0021
+
+/* Numerically largest OUI that's presently assigned */
+#define	TAVOR_MAX_OUI			0xacde48
+
+#define	FWFLASH_IB_STATE_NONE		0x00
+#define	FWFLASH_IB_STATE_IMAGE_PRI	0x01
+#define	FWFLASH_IB_STATE_IMAGE_SEC	0x02
+#define	FWFLASH_IB_STATE_MMAP		0x04
+#define	FWFLASH_IB_STATE_GUIDN		0x10
+#define	FWFLASH_IB_STATE_GUID1		0x20
+#define	FWFLASH_IB_STATE_GUID2		0x40
+#define	FWFLASH_IB_STATE_GUIDS		0x80
+#define	FWFLASH_ETH_STATE_MACS		0x100
+
+#define	FWFLASH_IB_STATE_IMAGE		FWFLASH_IB_STATE_IMAGE_PRI
+
+#define	FWFLASH_IB_STATE_PFI_IMAGE	FWFLASH_IB_STATE_IMAGE_PRI
+#define	FWFLASH_IB_STATE_SFI_IMAGE	FWFLASH_IB_STATE_IMAGE_SEC
+
+/*
+ * Structure to hold the part number, PSID, and string ID
+ * for an HCA card.
+ */
+typedef struct mlx_mdr_s {
+	char *mlx_pn;
+	char *mlx_psid;
+	char *mlx_id;
+} mlx_mdr_t;
+
+/*
+ * Magic decoder ring for matching HCA hardware/firmware.
+ * Part Number / PSID / String ID
+ */
+mlx_mdr_t mlx_mdr[] = {
+	/* Part No		PSID			Card ID */
+	{ "MHEA28-XS",		"MT_0250000001",	"Lion mini" },
+	{ "MHEA28-XSC",		"MT_0390110001",	"Lion mini" },
+	{ "MHEA28-XT",		"MT_0150000001",	"Lion mini" },
+	{ "MHEA28-XTC",		"MT_0370110001",	"Lion mini" },
+	{ "MHGA28-XT",		"MT_0150000002",	"Lion mini" },
+	{ "MHGA28-XTC",		"MT_0370110002",	"Lion mini" },
+	{ "MHGA28-XTC",		"MT_0370130002",	"Lion mini" },
+	{ "MHGA28-XS",		"MT_0250000002",	"Lion mini" },
+	{ "MHGA28-XSC",		"MT_0390110002",	"Lion mini" },
+	{ "MHGA28-XSC",		"MT_0390130002",	"Lion mini" },
+	{ "MHEL-CF128",		"MT_0190000001",	"Lion cub" },
+	{ "MHEL-CF128-T",	"MT_00A0000001",	"Lion cub" },
+	{ "MTLP25208-CF128T",	"MT_00A0000001",	"Lion cub" },
+	{ "MHEL-CF128-TC",	"MT_00A0010001",	"Lion cub" },
+	{ "MHEL-CF128-TC",	"MT_0140010001",	"Lion cub" },
+	{ "MHEL-CF128-SC",	"MT_0190010001",	"Lion cub" },
+	{ "MHEA28-1TC",		"MT_02F0110001",	"Lion cub" },
+	{ "MHEA28-1SC",		"MT_0330110001",	"Lion cub" },
+	{ "MHGA28-1T",		"MT_0200000001",	"Lion cub" },
+	{ "MHGA28-1TC",		"MT_02F0110002",	"Lion cub" },
+	{ "MHGA28-1SC",		"MT_0330110002",	"Lion cub" },
+	{ "MHGA28-1S",		"MT_0430000001",	"Lion cub" },
+	{ "MHEL-CF256-T",	"MT_00B0000001",	"Lion cub" },
+	{ "MTLP25208-CF256T",	"MT_00B0000001",	"Lion cub" },
+	{ "MHEL-CF256-TC",	"MT_00B0010001",	"Lion cub" },
+	{ "MHEA28-2TC",		"MT_0300110001",	"Lion cub" },
+	{ "MHEA28-2SC",		"MT_0340110001",	"Lion cub" },
+	{ "MHGA28-2T",		"MT_0210000001",	"Lion cub" },
+	{ "MHGA28-2TC",		"MT_0300110002",	"Lion cub" },
+	{ "MHGA28-2SC",		"MT_0340110002",	"Lion cub" },
+	{ "MHEL-CF512-T",	"MT_00C0000001",	"Lion cub" },
+	{ "MTLP25208-CF512T",	"MT_00C0000001",	"Lion cub" },
+	{ "MHGA28-5T",		"MT_0220000001",	"Lion cub" },
+	{ "375-3382-01",	"SUN0030000001",	"Sun Lion cub DDR" },
+	{ "MHES14-XSC",		"MT_0410110001",	"Tiger" },
+	{ "MHES14-XT",		"MT_01F0000001",	"Tiger" },
+	{ "MHES14-XTC",		"MT_03F0110001",	"Tiger" },
+	{ "MHES18-XS",		"MT_0260000001",	"Cheetah" },
+	{ "MHES18-XS",		"MT_0260010001",	"Cheetah" },
+	{ "MHES18-XSC",		"MT_03D0110001",	"Cheetah" },
+	{ "MHES18-XSC",		"MT_03D0120001",	"Cheetah" },
+	{ "MHES18-XSC",		"MT_03D0130001",	"Cheetah" },
+	{ "MHES18-XT",		"MT_0230000002",	"Cheetah" },
+	{ "MHES18-XT",		"MT_0230010002",	"Cheetah" },
+	{ "MHES18-XTC",		"MT_03B0110001",	"Cheetah" },
+	{ "MHES18-XTC",		"MT_03B0120001",	"Cheetah" },
+	{ "MHES18-XTC",		"MT_03B0140001",	"Cheetah" },
+	{ "MHGS18-XS",		"MT_0260000002",	"Cheetah" },
+	{ "MHGS18-XSC",		"MT_03D0110002",	"Cheetah" },
+	{ "MHGS18-XSC",		"MT_03D0120002",	"Cheetah" },
+	{ "MHGS18-XSC",		"MT_03D0130002",	"Cheetah" },
+	{ "MHGS18-XT",		"MT_0230000001",	"Cheetah" },
+	{ "MHGS18-XTC",		"MT_03B0110002",	"Cheetah" },
+	{ "MHGS18-XTC",		"MT_03B0120002",	"Cheetah" },
+	{ "MHGS18-XTC",		"MT_03B0140002",	"Cheetah" },
+	{ "MHXL-CF128",		"MT_0180000001",	"Cougar Cub 128" },
+	{ "MHXL-CF128-T",	"MT_0030000001",	"Cougar Cub 128" },
+	{ "MTLP23108-CF128T",	"MT_0030000001",	"Cougar Cub 128" },
+	{ "MHET2X-1SC",		"MT_0280110001",	"Cougar Cub 128" },
+	{ "MHET2X-1SC",		"MT_0280120001",	"Cougar Cub 128" },
+	{ "MHET2X-1TC",		"MT_0270110001",	"Cougar Cub 128" },
+	{ "MHET2X-1TC",		"MT_0270120001",	"Cougar Cub 128" },
+	{ "MHXL-CF256-T",	"MT_0040000001",	"Cougar Cub 256" },
+	{ "MHET2X-2SC",		"MT_02D0110001",	"Cougar Cub 256" },
+	{ "MHET2X-2SC",		"MT_02D0120001",	"Cougar Cub 256" },
+	{ "MHET2X-2TC",		"MT_02B0110001",	"Cougar Cub 256" },
+	{ "MHET2X-2TC",		"MT_02B0120001",	"Cougar Cub 256" },
+	{ "375-3481-01",	"SUN0040000001",	"Sun Cougar Cub SDR" },
+	{ "375-3418-01",	"SUN0040000001",	"Sun Cougar Cub SDR" },
+	{ "375-3259-01",	"SUN0010000001",	"Sun Cougar Cub 256" },
+	{ "375-3259-03",	"SUN0010000001",	"Sun Cougar Cub 256" },
+	{ "375-3260-03",	"SUN0020000001",	"Sun Cougar Cub 256" },
+	{ "MHX-CE128-T",	"MT_0000000001",	"Cougar 128" },
+	{ "MTPB23108-CE128",	"MT_0000000001",	"Cougar 128" },
+	{ "MHX-CE256-T",	"MT_0010000001",	"Cougar 256" },
+	{ "MTPB23108-CE256",	"MT_0010000001",	"Cougar 256" },
+	{ "MHX-CE512-T",	"MT_0050000001",	"Cougar 512" },
+	{ "MTPB23108-CE512",	"MT_0050000001",	"Cougar 512" },
+	{ "MHEH28-XSC",		"MT_04C0110001",	"Eagle SDR" },
+	{ "MHEH28-XSC",		"MT_04C0130005",	"Eagle SDR" },
+	{ "MHEH28-XTC",		"MT_04A0110001",	"Eagle SDR" },
+	{ "MHEH28-XTC",		"MT_04A0130005",	"Eagle SDR" },
+	{ "MHGH28-XSC",		"MT_04C0110002",	"Eagle DDR" },
+	{ "MHGH28-XSC",		"MT_04C0120002",	"Eagle DDR" },
+	{ "MHGH28-XSC",		"MT_04C0140005",	"Eagle DDR" },
+	{ "MHGH28-XTC",		"MT_04A0110002",	"Eagle DDR" },
+	{ "MHGH28-XTC",		"MT_04A0120002",	"Eagle DDR" },
+	{ "MHGH28-XTC",		"MT_04A0140005",	"Eagle DDR" },
+	{ "X1289A-Z",		"SUN0010010001",	"Sun IB NEM DDR" },
+	{ "375-3548-01",	"SUN0060000001", "Sun IB EM DDR X4216A-Z" },
+	{ "375-3549-01",	"SUN0070000001",	"Sun PCIe DDR X4217A" },
+	{ "375-3549-01",	"SUN0070130001",	"Sun Eagle DDR" },
+	{ "375-3481-01",	"SUN0050000001",	"Sun PCIe EM SDR" },
+	{ "375-3439-01",	"SUN0051000001",	"Sun PUMA" },
+	{ "MHGH29-XSC",		"MT_0A60110002", "Eagle DDR PCIe Gen 2.0" },
+	{ "MHGH29-XSC",		"MT_0A60120005", "Eagle DDR PCIe Gen 2.0" },
+	{ "MHGH29-XTC",		"MT_0A50110002", "Eagle DDR PCIe Gen 2.0" },
+	{ "MHGH29-XTC",		"MT_0A50120005", "Eagle DDR PCIe Gen 2.0" },
+	{ "375-3605-01",	"SUN0160000001",	"Sun QMirage " },
+	{ "375-3605-01",	"SUN0160000002",	"Sun QMirage " },
+	{ "375-3697-01",	"SUN0160000002",	"Sun QMirage " },
+	{ "375-3606-01",	"SUN0150000001",	"Sun Falcon QDR" },
+	{ "375-3606-02",	"SUN0150000009",	"Sun Falcon QDR" },
+	{ "375-3606-03",	"SUN0150000009",	"Sun Falcon QDR" },
+	{ "375-3606-02",	"SUN0170000009",	"Sun Falcon QDR" },
+	{ "375-3696-01",	"SUN0170000009",	"Sun Falcon QDR" },
+	{ "MHJH29-XTC",		"MT_04E0110003",	"Eagle QDR" },
+	{ "MHJH29-XSC",		"MT_0500120005", "Eagle QDR PCIe Gen 2.0" },
+	{ "MHQH29-XTC",		"MT_04E0120005", "Eagle QDR PCIe Gen 2.0" },
+	{ "MHQH19-XTC",		"MT_0C40110009", "Falcon QDR PCIe Gen 2.0" },
+	{ "MHQH29-XTC",		"MT_0BB0110003", "Falcon QDR PCIe Gen 2.0" },
+	{ "MHQH29-XTC",		"MT_0BB0120003", "Falcon QDR PCIe Gen 2.0" },
+	{ "375-3551-05",	"SUN0080000001",	"Sun C48-IB-NEM" },
+	{ "MHEH28B-XSR", "MT_0D10110001", "CX-2 2-Port HCA SDR PCIe Gen 1.0" },
+	{ "MHEH28B-XTR", "MT_0D20110001", "CX-2 2-Port HCA SDR PCIe Gen 1.0" },
+	{ "MHGH28B-XSR", "MT_0D10110002", "CX-2 2-Port HCA DDR PCIe Gen 1.0" },
+	{ "MHGH28B-XTR", "MT_0D20110002", "CX-2 2-Port HCA DDR PCIe Gen 1.0" },
+	{ "MHGH18B-XTR", "MT_0D30110002", "CX-2 1-Port HCA DDR PCIe Gen 1.0" },
+	{ "MNEH28B-XSR", "MT_0D40110004", "CX-2 2-Port NIC PCIe Gen 1.0" },
+	{ "MNEH28B-XTR", "MT_0D50110004", "CX-2 2-Port NIC PCIe Gen 1.0" },
+	{ "MNEH29B-XSR", "MT_0D40110010", "CX-2 2-Port NIC PCIe Gen 2.0" },
+	{ "MNEH29B-XTR", "MT_0D50110010", "CX-2 2-Port NIC PCIe Gen 2.0" },
+	{ "MHGH29B-XSR", "MT_0D10110008", "CX-2 2-Port HCA DDR PCIe Gen 2.0" },
+	{ "MHGH29B-XTR", "MT_0D20110008", "CX-2 2-Port HCA DDR PCIe Gen 2.0" },
+	{ "MHJH29B-XSR", "MT_0D10110009", "CX-2 2-Port HCA QDR PCIe Gen 2.0" },
+	{ "MHJH29B-XSR", "MT_0D10120009", "CX-2 2-Port HCA QDR PCIe Gen 2.0" },
+	{ "MHJH29B-XTR", "MT_0D20110009", "CX-2 2-Port HCA QDR PCIe Gen 2.0" },
+	{ "MHJH29B-XTR", "MT_0D20120009", "CX-2 2-Port HCA QDR PCIe Gen 2.0" },
+	{ "MHGH19B-XSR", "MT_0D60110008", "CX-2 1-Port HCA DDR PCIe Gen 2.0" },
+	{ "MHGH19B-XTR", "MT_0D30110008", "CX-2 1-Port HCA DDR PCIe Gen 2.0" },
+	{ "MHJH19B-XTR", "MT_0D30110009", "CX-2 1-Port HCA QDR PCIe Gen 2.0" },
+	{ "MHQH29B-XSR", "MT_0D70110009", "CX-2 2-Port HCA QDR PCIe Gen 2.0" },
+	{ "MHQH29B-XTR", "MT_0D80110009", "CX-2 2-Port HCA QDR PCIe Gen 2.0" },
+	{ "MHQH29B-XTR", "MT_0D80120009", "CX-2 2-Port HCA QDR PCIe Gen 2.0" },
+	{ "MHQH29B-XTR", "MT_0D80130009", "CX-2 2-Port HCA QDR PCIe Gen 2.0" },
+	{ "MHQH29B-XTR", "MT_0E30110009", "CX-2 2-Port HCA QDR PCIe Gen 2.0" },
+	{ "MHQH29C-XTR", "MT_0FC0110009", "CX-2 2-Port HCA QDR PCIe Gen 2.0" },
+	{ "MHRH29B-XSR", "MT_0D70110008", "CX-2 2-Port HCA DDR PCIe Gen 2.0" },
+	{ "MHRH29B-XTR", "MT_0D80110008", "CX-2 2-Port HCA DDR PCIe Gen 2.0" },
+	{ "MHQH19B-XTR", "MT_0D90110009", "CX-2 1-Port HCA QDR PCIe Gen 2.0" },
+	{ "MHRH19B-XSR", "MT_0E40110009", "CX-2 1-Port HCA DDR PCIe Gen 2.0" },
+	{ "MHRH19B-XTR", "MT_0D90110008", "CX-2 1-Port HCA DDR PCIe Gen 2.0" },
+	{ "MNPH28C-XSR", "MT_0DA0110004", "CX-2 2-Port NIC SFP+ PCIe Gen 1.0" },
+	{ "MNPH28C-XTR", "MT_0DB0110004", "CX-2 2-Port NIC SFP+ PCIe Gen 1.0" },
+	{ "MNPH29C-XSR", "MT_0DA0110010", "CX-2 2-Port NIC SFP+ PCIe Gen 2.0" },
+	{ "MNPH29C-XTR", "MT_0DB0110010", "CX-2 2-Port NIC SFP+ PCIe Gen 2.0" },
+	{ "MNPH29C-XTR", "MT_0DB0120010", "CX-2 2-Port NIC SFP+ PCIe Gen 2.0" },
+	{ "MNPH29C-XTR", "MT_0DB0130010", "CX-2 2-Port NIC SFP+ PCIe Gen 2.0" },
+	{ "MNZH29-XSR",	 "MT_0DC0110009", "CX-2 2-Port NIC PCIe Gen 2.0" },
+	{ "MNZH29-XTR",	 "MT_0DD0110009", "CX-2 2-Port NIC PCIe Gen 2.0" },
+	{ "MNZH29-XTR",	 "MT_0DD0120009", "CX-2 2-Port NIC PCIe Gen 2.0" },
+	{ "MHQH19B-XNR", "MT_0DF0110009", "CX-2 1-Port HCA QDR PCIe Gen 2.0" },
+	{ "MHQH19B-XNR", "MT_0DF0120009", "CX-2 1-Port HCA QDR PCIe Gen 2.0" },
+	{ "MNQH19-XTR",	 "MT_0D80110017", "CX-2 1-Port NIC PCIe Gen 2.0" },
+	{ "MNQH19C-XTR", "MT_0E20110017", "CX-2 1-Port NIC PCIe Gen 2.0" },
+	{ "MHZH29B-XSR", "MT_0E80110009", "CX-2 2-Port HCA QDR PCIe Gen 2.0" },
+	{ "MHZH29B-XTR", "MT_0E90110009", "CX-2 2-Port HCA QDR PCIe Gen 2.0" },
+	{ "MHZH29B-XTR", "MT_0E90110009", "CX-2 2-Port HCA QDR PCIe Gen 2.0" },
+	{ "MHQA19-XTR",	"MT_0EA0110009", "IH-III 1-Port HCA QDR PCIe Gen 2.0" },
+	{ "MHRA19-XTR", "MT_0EB0110008", "IH-III 1-Port HCA DDR PCIe Gen 2.0" },
+	{ "MHQH29C-XTR", "MT_0EF0110009", "CX-2 2-Port HCA QDR PCIe Gen 2.0" },
+	{ "MHQH29C-XSR", "MT_0F00110009", "CX-2 2-Port HCA QDR PCIe Gen 2.0" },
+	{ "MHRH29C-XTR", "MT_0F10110008", "CX-2 2-Port HCA DDR PCIe Gen 2.0" },
+	{ "MHRH29C-XSR", "MT_0F20110008", "CX-2 2-Port HCA DDR PCIe Gen 2.0" },
+	{ "MHPH29D-XTR", "MT_0F30110010", "CX-2 2-Port HCA SFP+ PCIe Gen 2.0" },
+	{ "MHPH29D-XSR", "MT_0F40110010", "CX-2 2-Port HCA SFP+ PCIe Gen 2.0" },
+	{ "MNPA19-XTR",	 "MT_0F60110010", "IH-III 1-Port NIC PCIe Gen 2.0" },
+	{ "MNPA19-XSR",	 "MT_0F70110010", "ID-III 1-Port NIC PCIe Gen 2.0" },
+
+	/* CX-3 cards */
+	{ "7046442", "ORC1090120019",
+				"ORACLE DUAL PORT QDR INFINIBAND ADAPTER M3" },
+	{ "MCX353A-FCA", "MT_1060110019", "CX-3 1-Port VPI FDR PCIe Gen 3.0" },
+	{ "MCX353A-FCA", "MT_1060120019", "CX-3 1-Port VPI FDR PCIe Gen 3.0" },
+	{ "MCX353A-FCB", "MT_1100110019", "CX-3 1-Port VPI FDR PCIe Gen 3.0" },
+	{ "MCX353A-FCB", "MT_1100120019", "CX-3 1-Port VPI FDR PCIe Gen 3.0" },
+	{ "MCX353A-QCA", "MT_1120110018", "CX-3 1-Port VPI QDR PCIe Gen 3.0" },
+	{ "MCX353A-QCA", "MT_1120120018", "CX-3 1-Port VPI QDR PCIe Gen 3.0" },
+	{ "MCX353A-QCB", "MT_1060110018", "CX-3 1-Port VPI QDR PCIe Gen 3.0" },
+	{ "MCX353A-TCA", "MT_1060110028", "CX-3 1-Port VPI PCIe Gen 3.0" },
+	{ "MCX353A-TCA", "MT_1060120028", "CX-3 1-Port VPI PCIe Gen 3.0" },
+	{ "MCX353A-TCB", "MT_1100110028", "CX-3 1-Port VPI PCIe Gen 3.0" },
+	{ "MCX354A-FCA", "MT_1020110019", "CX-3 2-Port VPI FDR PCIe Gen 3.0" },
+	{ "MCX354A-FCA", "MT_1020120019", "CX-3 2-Port VPI FDR PCIe Gen 3.0" },
+	{ "MCX354A-FCB", "MT_1090110019", "CX-3 2-Port VPI FDR PCIe Gen 3.0" },
+	{ "MCX354A-FCB", "MT_1090120019", "CX-3 2-Port VPI FDR PCIe Gen 3.0" },
+	{ "MCX354A-QCA", "MT_1020110018", "CX-3 2-Port VPI QDR PCIe Gen 3.0" },
+	{ "MCX354A-QCA", "MT_1020120018", "CX-3 2-Port VPI QDR PCIe Gen 3.0" },
+	{ "MCX354A-QCB", "MT_1090110018", "CX-3 2-Port VPI QDR PCIe Gen 3.0" },
+	{ "MCX354A-TCA", "MT_1020110028", "CX-3 2-Port VPI PCIe Gen 3.0" },
+	{ "MCX354A-TCA", "MT_1020120028", "CX-3 2-Port VPI PCIe Gen 3.0" },
+	{ "MCX354A-TCB", "MT_1090110028", "CX-3 2-Port VPI PCIe Gen 3.0" },
+
+	/* Ethernet cards */
+	{ "MNEH28B-XTR", "MT_0D50110004", "CX-2 2-Port NIC PCIe Gen 2.0" },
+	{ "MNEH29B-XSR", "MT_0D40110010", "CX-2 2-Port NIC PCIe Gen 2.0" },
+	{ "MNEH29B-XTR", "MT_0D50110010", "CX-2 2-Port NIC PCIe Gen 2.0" },
+	{ "MNPH28C-XSR", "MT_0DA0110004", "CX-2 2-Port NIC PCIe Gen 1.0" },
+	{ "MNPH28C-XTR", "MT_0DB0110004", "CX-2 2-Port NIC PCIe Gen 1.0" },
+	{ "MNPH29C-XSR", "MT_0DA0110010", "CX-2 2-Port NIC PCIe Gen 2.0" },
+	{ "MNPH29C-XTR", "MT_0DB0110010", "CX-2 2-Port NIC PCIe Gen 2.0" },
+	{ "X6275 M2 10GbE",	"X6275M2_10G",
+				    "Sun Blade X6275 M2 10GbE server module" }
+};
+
+/* Get mlx_mdr[] array size */
+#define	MLX_SZ_MLX_MDR		sizeof (mlx_mdr)
+#define	MLX_SZ_MLX_MDR_STRUCT	sizeof (mlx_mdr[0])
+
+#define	MLX_MAX_ID		MLX_SZ_MLX_MDR/MLX_SZ_MLX_MDR_STRUCT
+#define	MLX_PSID_SZ		16
+#define	MLX_STR_ID_SZ		64
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _HDRS_MELLANOX_H */
--- a/components/open-fabrics/libibverbs/Makefile	Tue Sep 10 14:24:13 2013 -0700
+++ b/components/open-fabrics/libibverbs/Makefile	Wed Sep 11 09:47:05 2013 -0700
@@ -53,6 +53,7 @@
 
 COMPONENT_PREP_ACTION = \
 	cp ofa_solaris.h $(@D)/include/infiniband ; \
+	cp MELLANOX.h $(@D)/include/infiniband ; \
 	cp solaris_compatibility.c $(@D)/src ; \
 	cd ../libmlx4; gmake prep; \
 	cd ../librdmacm; gmake prep
--- a/components/open-fabrics/libibverbs/patches/base.patch	Tue Sep 10 14:24:13 2013 -0700
+++ b/components/open-fabrics/libibverbs/patches/base.patch	Wed Sep 11 09:47:05 2013 -0700
@@ -1,6 +1,3 @@
-#
-# Copyright (c) 2011, 2013, Oracle and/or its affiliates. All rights reserved.
-#
 diff -r -u /tmp/846623/libibverbs-1.1.4/Makefile.am libibverbs-1.1.4/Makefile.am
 --- /tmp/846623/libibverbs-1.1.4/Makefile.am	Thu Feb  3 01:53:17 2011
 +++ libibverbs-1.1.4/Makefile.am	Fri Feb 11 04:02:12 2011
@@ -897,7 +894,23 @@
  
  	/*
  	 * We'll only be doing writes, but we need O_RDWR in case the
-@@ -163,6 +190,9 @@
+@@ -141,6 +168,15 @@
+ 	if (cmd_fd < 0)
+ 		return NULL;
+ 
++#if defined(__SVR4) && defined(__sun)
++	/* We don't support parent-child sharing of IB resources on Solaris */
++	if (fcntl(cmd_fd, F_SETFD, FD_CLOEXEC) < 0) {
++		fprintf(stderr, "ibv_open_device: FD_CLOEXEC failed: %s\n",
++		    strerror(errno));
++		goto err;
++	}
++#endif
++
+ 	context = device->ops.alloc_context(device, cmd_fd);
+ 	if (!context)
+ 		goto err;
+@@ -163,6 +199,9 @@
  	int async_fd = context->async_fd;
  	int cmd_fd   = context->cmd_fd;
  	int cq_fd    = -1;
@@ -907,7 +920,7 @@
  
  	if (abi_ver <= 2) {
  		struct ibv_abi_compat_v2 *t = context->abi_compat;
-@@ -172,6 +202,11 @@
+@@ -172,6 +211,11 @@
  
  	context->device->ops.free_context(context);
  
@@ -919,7 +932,7 @@
  	close(async_fd);
  	close(cmd_fd);
  	if (abi_ver <= 2)
-@@ -214,6 +249,15 @@
+@@ -214,6 +258,15 @@
  		case IBV_EVENT_SRQ_LIMIT_REACHED:
  			event->element.srq = (void *) (uintptr_t) ev.element;
  			break;
@@ -1046,7 +1059,7 @@
  
  	t = malloc(sizeof *t);
  	if (!t)
-@@ -67,9 +96,20 @@
+@@ -67,12 +96,36 @@
  
  	IBV_INIT_CMD_RESP(cmd, cmd_size, GET_CONTEXT, resp, resp_size);
  	cmd->cq_fd_tab = (uintptr_t) &cq_fd;
@@ -1067,7 +1080,23 @@
  
  	VALGRIND_MAKE_MEM_DEFINED(resp, resp_size);
  
-@@ -87,13 +127,28 @@
++#if defined(__SVR4) && defined(__sun)
++	/* We don't support parent-child sharing of IB resources on Solaris */
++	if (fcntl(resp->async_fd, F_SETFD, FD_CLOEXEC) < 0) {
++		fprintf(stderr, "ibv_get_context: FD_CLOEXEC failed "
++		    "for async_fd: %s\n", strerror(errno));
++		return errno;
++	}
++	if (fcntl(cq_fd, F_SETFD, FD_CLOEXEC) < 0) {
++		fprintf(stderr, "ibv_get_context: FD_CLOEXEC failed "
++		    "for cq_fd: %s\n", strerror(errno));
++		return errno;
++	}
++#endif
+ 	context->async_fd         = resp->async_fd;
+ 	context->num_comp_vectors = 1;
+ 	t->channel.context        = context;
+@@ -87,19 +140,53 @@
  			size_t cmd_size, struct ibv_get_context_resp *resp,
  			size_t resp_size)
  {
@@ -1096,7 +1125,15 @@
  
  	VALGRIND_MAKE_MEM_DEFINED(resp, resp_size);
  
-@@ -100,6 +155,16 @@
++#if defined(__SVR4) && defined(__sun)
++	/* We don't support parent-child sharing of IB resources on Solaris */
++	if (fcntl(resp->async_fd, F_SETFD, FD_CLOEXEC) < 0) {
++		fprintf(stderr, "ibv_get_context: FD_CLOEXEC failed: %s\n",
++		    strerror(errno));
++		return errno;
++	}
++#endif
++
  	context->async_fd         = resp->async_fd;
  	context->num_comp_vectors = resp->num_comp_vectors;
  
@@ -1113,7 +1150,7 @@
  	return 0;
  }
  
-@@ -120,6 +185,7 @@
+@@ -120,6 +207,7 @@
  	memset(device_attr->fw_ver, 0, sizeof device_attr->fw_ver);
  	*raw_fw_ver			       = resp.fw_ver;
  	device_attr->node_guid 		       = resp.node_guid;
@@ -1121,7 +1158,16 @@
  	device_attr->sys_image_guid 	       = resp.sys_image_guid;
  	device_attr->max_mr_size 	       = resp.max_mr_size;
  	device_attr->page_size_cap 	       = resp.page_size_cap;
-@@ -218,6 +284,45 @@
+@@ -207,6 +295,8 @@
+ {
+ 	IBV_INIT_CMD_RESP(cmd, cmd_size, ALLOC_PD, resp, resp_size);
+ 
++	cmd->user_handle     = (uintptr_t) pd;
++
+ 	if (write(context->cmd_fd, cmd, cmd_size) != cmd_size)
+ 		return errno;
+ 
+@@ -218,6 +308,47 @@
  	return 0;
  }
  
@@ -1132,6 +1178,7 @@
 +{
 +	IBV_INIT_CMD_RESP(cmd, cmd_size, ALLOC_SHPD, resp, resp_size);
 +        cmd->pd_handle = pd->handle;
++	cmd->user_handle = (uintptr_t) pd;
 +	cmd->share_key = share_key;
 +
 +	if (write(context->cmd_fd, cmd, cmd_size) != cmd_size)
@@ -1152,6 +1199,7 @@
 +	IBV_INIT_CMD_RESP(cmd, cmd_size, SHARE_PD, resp, resp_size);
 +	cmd->shpd_handle = shpd->handle;
 +	cmd->share_key = share_key;
++	cmd->user_handle     = (uintptr_t) pd;
 +
 +	if (write(context->cmd_fd, cmd, cmd_size) != cmd_size)
 +		return errno;
@@ -1167,7 +1215,23 @@
  int ibv_cmd_dealloc_pd(struct ibv_pd *pd)
  {
  	struct ibv_dealloc_pd cmd;
-@@ -259,6 +364,34 @@
+@@ -224,6 +355,7 @@
+ 
+ 	IBV_INIT_CMD(&cmd, sizeof cmd, DEALLOC_PD);
+ 	cmd.pd_handle = pd->handle;
++	cmd.user_handle = (uintptr_t) pd;
+ 
+ 	if (write(pd->context->cmd_fd, &cmd, sizeof cmd) != sizeof cmd)
+ 		return errno;
+@@ -244,6 +376,7 @@
+ 	cmd->length 	  = length;
+ 	cmd->hca_va 	  = hca_va;
+ 	cmd->pd_handle 	  = pd->handle;
++	cmd->user_handle  = (uintptr_t) mr;
+ 	cmd->access_flags = access;
+ 
+ 	if (write(pd->context->cmd_fd, cmd, cmd_size) != cmd_size)
+@@ -259,6 +392,35 @@
  	return 0;
  }
  
@@ -1184,6 +1248,7 @@
 +	cmd->length 	  = length;
 +	cmd->hca_va 	  = hca_va;
 +	cmd->pd_handle 	  = pd->handle;
++	cmd->user_handle  = (uintptr_t) mr;
 +	cmd->access_flags = access;
 +
 +	if (write(pd->context->cmd_fd, cmd, cmd_size) != cmd_size)
@@ -1202,7 +1267,15 @@
  int ibv_cmd_dereg_mr(struct ibv_mr *mr)
  {
  	struct ibv_dereg_mr cmd;
-@@ -272,6 +405,32 @@
+@@ -265,6 +427,7 @@
+ 
+ 	IBV_INIT_CMD(&cmd, sizeof cmd, DEREG_MR);
+ 	cmd.mr_handle = mr->handle;
++	cmd.user_handle  = (uintptr_t) mr;
+ 
+ 	if (write(mr->context->cmd_fd, &cmd, sizeof cmd) != sizeof cmd)
+ 		return errno;
+@@ -272,6 +435,34 @@
  	return 0;
  }
  
@@ -1212,6 +1285,7 @@
 +
 +	IBV_INIT_CMD(&cmd, sizeof cmd, DEREG_MR_RELAXED);
 +	cmd.mr_handle = mr->handle;
++	cmd.user_handle  = (uintptr_t) mr;
 +
 +	if (write(mr->context->cmd_fd, &cmd, sizeof cmd) != sizeof cmd)
 +		return errno;
@@ -1225,6 +1299,7 @@
 +
 +	IBV_INIT_CMD(&cmd, sizeof cmd, FLUSH_RELAXED_MR);
 +	cmd.pd_handle = pd->handle;
++	cmd.user_handle  = (uintptr_t) pd;
 +
 +	if (write(pd->context->cmd_fd, &cmd, sizeof cmd) != sizeof cmd)
 +		return errno;
@@ -1235,7 +1310,7 @@
  static int ibv_cmd_create_cq_v2(struct ibv_context *context, int cqe,
  				struct ibv_cq *cq,
  				struct ibv_create_cq *new_cmd, size_t new_cmd_size,
-@@ -315,7 +474,19 @@
+@@ -315,7 +506,19 @@
  	cmd->user_handle   = (uintptr_t) cq;
  	cmd->cqe           = cqe;
  	cmd->comp_vector   = comp_vector;
@@ -1255,7 +1330,63 @@
  	cmd->reserved      = 0;
  
  	if (write(context->cmd_fd, cmd, cmd_size) != cmd_size)
-@@ -637,7 +808,20 @@
+@@ -346,6 +549,7 @@
+ 	IBV_INIT_CMD_RESP(&cmd, sizeof cmd, POLL_CQ, resp, rsize);
+ 	cmd.cq_handle = ibcq->handle;
+ 	cmd.ne        = ne;
++	cmd.user_handle  = (uintptr_t) ibcq;
+ 
+ 	if (write(ibcq->context->cmd_fd, &cmd, sizeof cmd) != sizeof cmd) {
+ 		ret = -1;
+@@ -384,6 +588,7 @@
+ 	IBV_INIT_CMD(&cmd, sizeof cmd, REQ_NOTIFY_CQ);
+ 	cmd.cq_handle = ibcq->handle;
+ 	cmd.solicited = !!solicited_only;
++	cmd.user_handle  = (uintptr_t) ibcq;
+ 
+ 	if (write(ibcq->context->cmd_fd, &cmd, sizeof cmd) != sizeof cmd)
+ 		return errno;
+@@ -399,6 +604,7 @@
+ 	IBV_INIT_CMD_RESP(cmd, cmd_size, RESIZE_CQ, resp, resp_size);
+ 	cmd->cq_handle = cq->handle;
+ 	cmd->cqe       = cqe;
++	cmd->user_handle   = (uintptr_t) cq;
+ 
+ 	if (write(cq->context->cmd_fd, cmd, cmd_size) != cmd_size)
+ 		return errno;
+@@ -434,6 +640,7 @@
+ 	IBV_INIT_CMD_RESP(&cmd, sizeof cmd, DESTROY_CQ, &resp, sizeof resp);
+ 	cmd.cq_handle = cq->handle;
+ 	cmd.reserved  = 0;
++	cmd.user_handle  = (uintptr_t) cq;
+ 
+ 	if (write(cq->context->cmd_fd, &cmd, sizeof cmd) != sizeof cmd)
+ 		return errno;
+@@ -555,6 +762,7 @@
+ 	cmd->attr_mask	= srq_attr_mask;
+ 	cmd->max_wr	= srq_attr->max_wr;
+ 	cmd->srq_limit	= srq_attr->srq_limit;
++	cmd->user_handle   = (uintptr_t) srq;
+ 
+ 	if (write(srq->context->cmd_fd, cmd, cmd_size) != cmd_size)
+ 		return errno;
+@@ -569,6 +777,7 @@
+ 
+ 	IBV_INIT_CMD_RESP(cmd, cmd_size, QUERY_SRQ, &resp, sizeof resp);
+ 	cmd->srq_handle = srq->handle;
++	cmd->user_handle   = (uintptr_t) srq;
+ 	cmd->reserved   = 0;
+ 
+ 	if (write(srq->context->cmd_fd, cmd, cmd_size) != cmd_size)
+@@ -606,6 +815,7 @@
+ 
+ 	IBV_INIT_CMD_RESP(&cmd, sizeof cmd, DESTROY_SRQ, &resp, sizeof resp);
+ 	cmd.srq_handle = srq->handle;
++	cmd.user_handle  = (uintptr_t) srq;
+ 	cmd.reserved   = 0;
+ 
+ 	if (write(srq->context->cmd_fd, &cmd, sizeof cmd) != sizeof cmd)
+@@ -637,7 +847,20 @@
  	cmd->max_send_sge    = attr->cap.max_send_sge;
  	cmd->max_recv_sge    = attr->cap.max_recv_sge;
  	cmd->max_inline_data = attr->cap.max_inline_data;
@@ -1276,7 +1407,47 @@
  	cmd->qp_type 	     = attr->qp_type;
  	cmd->is_srq 	     = !!attr->srq;
  	cmd->srq_handle      = attr->qp_type == IBV_QPT_XRC ?
-@@ -1406,4 +1590,3 @@
+@@ -691,6 +914,7 @@
+ 	IBV_INIT_CMD_RESP(cmd, cmd_size, QUERY_QP, &resp, sizeof resp);
+ 	cmd->qp_handle = qp->handle;
+ 	cmd->attr_mask = attr_mask;
++	cmd->user_handle   = (uintptr_t) qp;
+ 
+ 	if (write(qp->context->cmd_fd, cmd, cmd_size) != cmd_size)
+ 		return errno;
+@@ -772,6 +996,7 @@
+ 	IBV_INIT_CMD(cmd, cmd_size, MODIFY_QP);
+ 
+ 	cmd->qp_handle 		 = qp->handle;
++	cmd->user_handle   	 = (uintptr_t) qp;
+ 	cmd->attr_mask 		 = attr_mask;
+ 	cmd->qkey 		 = attr->qkey;
+ 	cmd->rq_psn 		 = attr->rq_psn;
+@@ -1292,6 +1517,7 @@
+ 	IBV_INIT_CMD_RESP(&cmd, sizeof cmd, DESTROY_QP, &resp, sizeof resp);
+ 	cmd.qp_handle = qp->handle;
+ 	cmd.reserved  = 0;
++	cmd.user_handle  = (uintptr_t) qp;
+ 
+ 	if (write(qp->context->cmd_fd, &cmd, sizeof cmd) != sizeof cmd)
+ 		return errno;
+@@ -1313,6 +1539,7 @@
+ 	IBV_INIT_CMD(&cmd, sizeof cmd, ATTACH_MCAST);
+ 	memcpy(cmd.gid, gid->raw, sizeof cmd.gid);
+ 	cmd.qp_handle = qp->handle;
++	cmd.user_handle  = (uintptr_t) qp;
+ 	cmd.mlid      = lid;
+ 	cmd.reserved  = 0;
+ 
+@@ -1329,6 +1556,7 @@
+ 	IBV_INIT_CMD(&cmd, sizeof cmd, DETACH_MCAST);
+ 	memcpy(cmd.gid, gid->raw, sizeof cmd.gid);
+ 	cmd.qp_handle = qp->handle;
++	cmd.user_handle  = (uintptr_t) qp;
+ 	cmd.mlid      = lid;
+ 	cmd.reserved  = 0;
+ 
+@@ -1406,4 +1634,3 @@
  		return errno;
  	return 0;
  }
@@ -1605,7 +1776,7 @@
  	__u64 sys_image_guid;
  	__u64 max_mr_size;
  	__u64 page_size_cap;
-@@ -235,6 +250,34 @@
+@@ -235,23 +250,103 @@
  	__u8  reserved[2];
  };
  
@@ -1640,7 +1811,9 @@
  struct ibv_alloc_pd {
  	__u32 command;
  	__u16 in_words;
-@@ -243,10 +286,57 @@
+ 	__u16 out_words;
+ 	__u64 response;
++	__u64 user_handle;
  	__u64 driver_data[0];
  };
  
@@ -1671,6 +1844,7 @@
 +	__u32 pd_handle;
 +	__u32 reserved;
 +	__u64 share_key;
++	__u64 user_handle;
 +	__u64 driver_data[0];
 +};
 +
@@ -1686,6 +1860,7 @@
 +	__u32 shpd_handle;
 +	__u32 reserved;
 +	__u64 share_key;
++	__u64 user_handle;
 +	__u64 driver_data[0];
 +};
 +
@@ -1698,8 +1873,27 @@
  struct ibv_dealloc_pd {
  	__u32 command;
  	__u16 in_words;
-@@ -280,6 +370,13 @@
+ 	__u16 out_words;
+ 	__u32 pd_handle;
++	__u32 reserved;
++	__u64 user_handle;
+ };
+ 
+ struct ibv_reg_mr {
+@@ -264,6 +359,7 @@
+ 	__u64 hca_va;
+ 	__u32 pd_handle;
+ 	__u32 access_flags;
++	__u64 user_handle;
+ 	__u64 driver_data[0];
+ };
+ 
+@@ -278,8 +374,19 @@
+ 	__u16 in_words;
+ 	__u16 out_words;
  	__u32 mr_handle;
++	__u32 reserved;
++	__u64 user_handle;
  };
  
 +struct ibv_flush_relaxed_mr {
@@ -1707,12 +1901,14 @@
 +	__u16 in_words;
 +	__u16 out_words;
 +	__u32 pd_handle;
++	__u32 reserved;
++	__u64 user_handle;
 +};
 +
  struct ibv_create_comp_channel {
  	__u32 command;
  	__u16 in_words;
-@@ -304,10 +401,25 @@
+@@ -304,10 +411,25 @@
  	__u64 driver_data[0];
  };
  
@@ -1738,7 +1934,31 @@
  
  struct ibv_kern_wc {
  	__u64  wr_id;
-@@ -363,7 +475,11 @@
+@@ -334,6 +456,7 @@
+ 	__u64 response;
+ 	__u32 cq_handle;
+ 	__u32 ne;
++	__u64 user_handle;
+ };
+ 
+ struct ibv_poll_cq_resp {
+@@ -348,6 +471,7 @@
+ 	__u16 out_words;
+ 	__u32 cq_handle;
+ 	__u32 solicited;
++	__u64 user_handle;
+ };
+ 
+ struct ibv_resize_cq {
+@@ -357,6 +481,7 @@
+ 	__u64 response;
+ 	__u32 cq_handle;
+ 	__u32 cqe;
++	__u64 user_handle;
+ 	__u64 driver_data[0];
+ };
+ 
+@@ -363,7 +488,11 @@
  struct ibv_resize_cq_resp {
  	__u32 cqe;
  	__u32 reserved;
@@ -1750,7 +1970,15 @@
  };
  
  struct ibv_destroy_cq {
-@@ -460,6 +576,14 @@
+@@ -373,6 +502,7 @@
+ 	__u64 response;
+ 	__u32 cq_handle;
+ 	__u32 reserved;
++	__u64 user_handle;
+ };
+ 
+ struct ibv_destroy_cq_resp {
+@@ -460,6 +590,14 @@
  	__u64 driver_data[0];
  };
  
@@ -1765,7 +1993,7 @@
  struct ibv_create_qp_resp {
  	__u32 qp_handle;
  	__u32 qpn;
-@@ -469,7 +593,20 @@
+@@ -469,7 +607,20 @@
  	__u32 max_recv_sge;
  	__u32 max_inline_data;
  	__u32 reserved;
@@ -1786,7 +2014,47 @@
  
  struct ibv_qp_dest {
  	__u8  dgid[16];
-@@ -817,12 +954,29 @@
+@@ -493,6 +644,7 @@
+ 	__u64 response;
+ 	__u32 qp_handle;
+ 	__u32 attr_mask;
++	__u64 user_handle;
+ 	__u64 driver_data[0];
+ };
+ 
+@@ -560,6 +712,7 @@
+ 	__u8  alt_port_num;
+ 	__u8  alt_timeout;
+ 	__u8  reserved[2];
++	__u64 user_handle;
+ 	__u64 driver_data[0];
+ };
+ 
+@@ -570,6 +723,7 @@
+ 	__u64 response;
+ 	__u32 qp_handle;
+ 	__u32 reserved;
++	__u64 user_handle;
+ };
+ 
+ struct ibv_destroy_qp_resp {
+@@ -775,6 +929,7 @@
+ 	__u32 qp_handle;
+ 	__u16 mlid;
+ 	__u16 reserved;
++	__u64 user_handle;
+ 	__u64 driver_data[0];
+ };
+ 
+@@ -786,6 +941,7 @@
+ 	__u32 qp_handle;
+ 	__u16 mlid;
+ 	__u16 reserved;
++	__u64 user_handle;
+ 	__u64 driver_data[0];
+ };
+ 
+@@ -817,12 +973,29 @@
  	__u64 driver_data[0];
  };
  
@@ -1816,7 +2084,31 @@
  
  struct ibv_modify_srq {
  	__u32 command;
-@@ -946,6 +1100,14 @@
+@@ -832,6 +1005,7 @@
+ 	__u32 attr_mask;
+ 	__u32 max_wr;
+ 	__u32 srq_limit;
++	__u64 user_handle;
+ 	__u64 driver_data[0];
+ };
+ 
+@@ -842,6 +1016,7 @@
+ 	__u64 response;
+ 	__u32 srq_handle;
+ 	__u32 reserved;
++	__u64 user_handle;
+ 	__u64 driver_data[0];
+ };
+ 
+@@ -859,6 +1034,7 @@
+ 	__u64 response;
+ 	__u32 srq_handle;
+ 	__u32 reserved;
++	__u64 user_handle;
+ };
+ 
+ struct ibv_destroy_srq_resp {
+@@ -946,6 +1122,14 @@
  	IB_USER_VERBS_CMD_QUERY_XRC_RCV_QP_V2 = -1,
  	IB_USER_VERBS_CMD_REG_XRC_RCV_QP_V2 = -1,
  	IB_USER_VERBS_CMD_UNREG_XRC_RCV_QP_V2 = -1,
--- a/components/open-fabrics/libibverbs/solaris_compatibility.c	Tue Sep 10 14:24:13 2013 -0700
+++ b/components/open-fabrics/libibverbs/solaris_compatibility.c	Wed Sep 11 09:47:05 2013 -0700
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2010, 2012, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 2010, 2013, Oracle and/or its affiliates. All rights reserved.
  *
  * This software is available to you under a choice of one of two
  * licenses.  You may choose to be licensed under the terms of the GNU
@@ -55,46 +55,40 @@
 #include <alloca.h>
 #include "../include/infiniband/arch.h"
 #include "../include/infiniband/verbs.h"
+#include "../include/infiniband/MELLANOX.h"
 #include <errno.h>
 #include <pthread.h>
 #include <kstat.h>
 
+#define	min(a, b)	((a) < (b) ? (a) : (b))
+
 
 /*
- * The followings will be removed when changes in sol_uverbs_ioctl.h
+ * The followings will be removed when changes in hermon_ioctl.h
  * are delivered through ON.
  */
+#ifndef	HERMON_GET_HWINFO_IOCTL_SUP
+#define	HERMON_IOCTL_GET_HWINFO	(('t' << 8) | 0x32)
+#pragma	pack(1)
 
-#if	(IB_USER_MAD_SOLARIS_ABI_VERSION == 1)
-#undef	IB_USER_MAD_SOLARIS_ABI_VERSION
-#define	IB_USER_MAD_SOLARIS_ABI_VERSION	2
+/* Structure used for getting HW info */
+typedef struct hermon_hw_info_ioctl_s {
+	uint32_t	af_hw_info_version;
+	uint32_t	af_padding1;	/* Padding for af_hwpn to be on */
+					/* 64 byte boundary */
+	char		af_hwpn[64];
+	uint16_t	af_pn_len;
+	uint64_t	af_padding2:48;	/* Padding for af_psid to be on */
+					/* 64 byte boundary */
+	char		af_psid[16];
+	uint16_t	af_psid_len;
+	uint32_t	af_padding3;	/* Padding for reserved to be on */
+					/* 64 byte boundary */
+	uint8_t		reserved[64];
+} hermon_hw_info_ioctl_t;
+#pragma	pack()
 #endif
 
-#if	(IB_USER_VERBS_SOLARIS_ABI_VERSION == 1)
-#undef	IB_USER_VERBS_SOLARIS_ABI_VERSION
-#define	IB_USER_VERBS_SOLARIS_ABI_VERSION	2
-#define	IB_USER_VERBS_V2_IN_V1
-typedef struct sol_uverbs_hca_info_v2_s {
-	char		uverbs_hca_psid_string[MAXNAMELEN];
-	char		uverbs_hca_ibdev_name[MAXNAMELEN];
-	char		uverbs_hca_driver_name[MAXNAMELEN];
-	uint32_t	uverbs_hca_driver_instance;
-	uint32_t	uverbs_hca_vendorid;
-	uint16_t	uverbs_hca_deviceid;
-	uint16_t	uverbs_hca_devidx;
-	uint8_t		uverbs_hca_pad1[4];
-} sol_uverbs_hca_info_v2_t;
-
-typedef struct sol_uverbs_info_v2_s {
-	int32_t			uverbs_abi_version;
-	int32_t			uverbs_solaris_abi_version;
-	int16_t			uverbs_hca_cnt;
-	int8_t			uverbs_pad1[6];    /* Padding for alignment */
-	sol_uverbs_hca_info_v2_t	uverbs_hca_info[];
-} sol_uverbs_info_v2_t;
-#endif
-
-/* end of sol_uverbs_ioctl.h contents */
 
 /*
  * duplicate ABI definitions for HCAs as the HCA abi headers are not
@@ -170,6 +164,7 @@
 	char		ibd_fw_ver[16];
 	char		ibd_name[8];
 	int		ibd_boardid_index;
+	uint_t		ibd_device_id;
 } ibdev_cache_info_t;
 
 /* hermon - hence 2 */
@@ -195,209 +190,6 @@
 static umad_cache_info_t	umad_dev_cache[MAX_HCAS * MAX_HCA_PORTS];
 static int			umad_abi_version = -1;
 
-/*
- * Structure to hold the part number  & PSID for an HCA card
- * This is a sub-set of the file :
- * /ws/onnv-clone/usr/src/cmd/fwflash/plugins/hdrs/MELLANOX.h
- */
-typedef struct mlx_mdr_s {
-	char *mlx_pn;
-	char *mlx_psid;
-} mlx_mdr_t;
-
-/*
- * Magic decoder ring for matching HCA hardware/firmware.
- * Part Number / PSID / String ID
- */
-mlx_mdr_t mlx_mdr[] = {
-	/* For failure case, use unknown as "board-id" */
-	{ "unknown",		"unknown"	},
-
-	/* Part No		PSID		*/
-	{ "375-3605-01",	"SUN0160000001" },
-	{ "375-3382-01",	"SUN0030000001" },
-	{ "375-3481-01",	"SUN0040000001" },
-	{ "375-3418-01",	"SUN0040000001" },
-	{ "375-3259-01",	"SUN0010000001" },
-	{ "375-3259-03",	"SUN0010000001" },
-	{ "X1289A-Z",		"SUN0010010001" },
-	{ "375-3548-01",	"SUN0060000001" },
-	{ "375-3549-01",	"SUN0070000001" },
-	{ "375-3549-01",	"SUN0070130001" },
-	{ "375-3481-01",	"SUN0050000001" },
-	{ "375-3439-01",	"SUN0051000001" },
-	{ "375-3260-03",	"SUN0020000001" },
-	{ "375-3605-01",	"SUN0160000002" },
-	{ "375-3697-01",	"SUN0160000002" },
-	{ "375-3606-01",	"SUN0150000001" },
-	{ "375-3606-02",	"SUN0150000009" },
-	{ "375-3606-03",	"SUN0150000009" },
-	{ "375-3606-02",	"SUN0170000009" },
-	{ "375-3696-01",	"SUN0170000009" },
-	{ "375-3551-05",	"SUN0080000001" },
-	{ "MHEA28-XS",		"MT_0250000001" },
-	{ "MHEA28-XSC",		"MT_0390110001" },
-	{ "MHEA28-XT",		"MT_0150000001" },
-	{ "MHEA28-XTC",		"MT_0370110001" },
-	{ "MHGA28-XT",		"MT_0150000002" },
-	{ "MHGA28-XTC",		"MT_0370110002" },
-	{ "MHGA28-XTC",		"MT_0370130002" },
-	{ "MHGA28-XS",		"MT_0250000002" },
-	{ "MHGA28-XSC",		"MT_0390110002" },
-	{ "MHGA28-XSC",		"MT_0390130002" },
-	{ "MHEL-CF128",		"MT_0190000001" },
-	{ "MHEL-CF128-T",	"MT_00A0000001" },
-	{ "MTLP25208-CF128T",	"MT_00A0000001" },
-	{ "MHEL-CF128-TC",	"MT_00A0010001" },
-	{ "MHEL-CF128-TC",	"MT_0140010001" },
-	{ "MHEL-CF128-SC",	"MT_0190010001" },
-	{ "MHEA28-1TC",		"MT_02F0110001" },
-	{ "MHEA28-1SC",		"MT_0330110001" },
-	{ "MHGA28-1T",		"MT_0200000001" },
-	{ "MHGA28-1TC",		"MT_02F0110002" },
-	{ "MHGA28-1SC",		"MT_0330110002" },
-	{ "MHGA28-1S",		"MT_0430000001" },
-	{ "MHEL-CF256-T",	"MT_00B0000001" },
-	{ "MTLP25208-CF256T",	"MT_00B0000001" },
-	{ "MHEL-CF256-TC",	"MT_00B0010001" },
-	{ "MHEA28-2TC",		"MT_0300110001" },
-	{ "MHEA28-2SC",		"MT_0340110001" },
-	{ "MHGA28-2T",		"MT_0210000001" },
-	{ "MHGA28-2TC",		"MT_0300110002" },
-	{ "MHGA28-2SC",		"MT_0340110002" },
-	{ "MHEL-CF512-T",	"MT_00C0000001" },
-	{ "MTLP25208-CF512T",	"MT_00C0000001" },
-	{ "MHGA28-5T",		"MT_0220000001" },
-	{ "MHES14-XSC",		"MT_0410110001" },
-	{ "MHES14-XT",		"MT_01F0000001" },
-	{ "MHES14-XTC",		"MT_03F0110001" },
-	{ "MHES18-XS",		"MT_0260000001" },
-	{ "MHES18-XS",		"MT_0260010001" },
-	{ "MHES18-XSC",		"MT_03D0110001" },
-	{ "MHES18-XSC",		"MT_03D0120001" },
-	{ "MHES18-XSC",		"MT_03D0130001" },
-	{ "MHES18-XT",		"MT_0230000002" },
-	{ "MHES18-XT",		"MT_0230010002" },
-	{ "MHES18-XTC",		"MT_03B0110001" },
-	{ "MHES18-XTC",		"MT_03B0120001" },
-	{ "MHES18-XTC",		"MT_03B0140001" },
-	{ "MHGS18-XS",		"MT_0260000002" },
-	{ "MHGS18-XSC",		"MT_03D0110002" },
-	{ "MHGS18-XSC",		"MT_03D0120002" },
-	{ "MHGS18-XSC",		"MT_03D0130002" },
-	{ "MHGS18-XT",		"MT_0230000001" },
-	{ "MHGS18-XTC",		"MT_03B0110002" },
-	{ "MHGS18-XTC",		"MT_03B0120002" },
-	{ "MHGS18-XTC",		"MT_03B0140002" },
-	{ "MHXL-CF128",		"MT_0180000001" },
-	{ "MHXL-CF128-T",	"MT_0030000001" },
-	{ "MTLP23108-CF128T",	"MT_0030000001" },
-	{ "MHET2X-1SC",		"MT_0280110001" },
-	{ "MHET2X-1SC",		"MT_0280120001" },
-	{ "MHET2X-1TC",		"MT_0270110001" },
-	{ "MHET2X-1TC",		"MT_0270120001" },
-	{ "MHXL-CF256-T",	"MT_0040000001" },
-	{ "MHET2X-2SC",		"MT_02D0110001" },
-	{ "MHET2X-2SC",		"MT_02D0120001" },
-	{ "MHET2X-2TC",		"MT_02B0110001" },
-	{ "MHET2X-2TC",		"MT_02B0120001" },
-	{ "MHX-CE128-T",	"MT_0000000001" },
-	{ "MTPB23108-CE128",	"MT_0000000001" },
-	{ "MHX-CE256-T",	"MT_0010000001" },
-	{ "MTPB23108-CE256",	"MT_0010000001" },
-	{ "MHX-CE512-T",	"MT_0050000001" },
-	{ "MTPB23108-CE512",	"MT_0050000001" },
-	{ "MHEH28-XSC",		"MT_04C0110001" },
-	{ "MHEH28-XSC",		"MT_04C0130005" },
-	{ "MHEH28-XTC",		"MT_04A0110001" },
-	{ "MHEH28-XTC",		"MT_04A0130005" },
-	{ "MHGH28-XSC",		"MT_04C0110002" },
-	{ "MHGH28-XSC",		"MT_04C0120002" },
-	{ "MHGH28-XSC",		"MT_04C0140005" },
-	{ "MHGH28-XTC",		"MT_04A0110002" },
-	{ "MHGH28-XTC",		"MT_04A0120002" },
-	{ "MHGH28-XTC",		"MT_04A0140005" },
-	{ "MHGH29-XSC",		"MT_0A60110002" },
-	{ "MHGH29-XSC",		"MT_0A60120005" },
-	{ "MHGH29-XTC",		"MT_0A50110002" },
-	{ "MHGH29-XTC",		"MT_0A50120005" },
-	{ "MHJH29-XTC",		"MT_04E0110003" },
-	{ "MHJH29-XSC",		"MT_0500120005" },
-	{ "MHQH29-XTC",		"MT_04E0120005" },
-	{ "MHQH19-XTC",		"MT_0C40110009" },
-	{ "MHQH29-XTC",		"MT_0BB0110003" },
-	{ "MHQH29-XTC",		"MT_0BB0120003" },
-	{ "MHEH28B-XSR",	"MT_0D10110001" },
-	{ "MHEH28B-XTR",	"MT_0D20110001" },
-	{ "MHGH28B-XSR",	"MT_0D10110002" },
-	{ "MHGH28B-XTR",	"MT_0D20110002" },
-	{ "MHGH18B-XTR",	"MT_0D30110002" },
-	{ "MNEH28B-XSR",	"MT_0D40110004" },
-	{ "MNEH28B-XTR",	"MT_0D50110004" },
-	{ "MNEH29B-XSR",	"MT_0D40110010" },
-	{ "MNEH29B-XTR",	"MT_0D50110010" },
-	{ "MHGH29B-XSR",	"MT_0D10110008" },
-	{ "MHGH29B-XTR",	"MT_0D20110008" },
-	{ "MHJH29B-XSR",	"MT_0D10110009" },
-	{ "MHJH29B-XSR",	"MT_0D10120009" },
-	{ "MHJH29B-XTR",	"MT_0D20110009" },
-	{ "MHJH29B-XTR",	"MT_0D20120009" },
-	{ "MHGH19B-XSR",	"MT_0D60110008" },
-	{ "MHGH19B-XTR",	"MT_0D30110008" },
-	{ "MHJH19B-XTR",	"MT_0D30110009" },
-	{ "MHQH29B-XSR",	"MT_0D70110009" },
-	{ "MHQH29B-XTR",	"MT_0D80110009" },
-	{ "MHQH29B-XTR",	"MT_0D80120009" },
-	{ "MHQH29B-XTR",	"MT_0D80130009" },
-	{ "MHQH29B-XTR",	"MT_0E30110009" },
-	{ "MHRH29B-XSR",	"MT_0D70110008" },
-	{ "MHRH29B-XTR",	"MT_0D80110008" },
-	{ "MHQH19B-XTR",	"MT_0D90110009" },
-	{ "MHRH19B-XSR",	"MT_0E40110009" },
-	{ "MHRH19B-XTR",	"MT_0D90110008" },
-	{ "MNPH28C-XSR",	"MT_0DA0110004" },
-	{ "MNPH28C-XTR",	"MT_0DB0110004" },
-	{ "MNPH29C-XSR",	"MT_0DA0110010" },
-	{ "MNPH29C-XTR",	"MT_0DB0110010" },
-	{ "MNPH29C-XTR",	"MT_0DB0120010" },
-	{ "MNPH29C-XTR",	"MT_0DB0130010" },
-	{ "MNZH29-XSR",		"MT_0DC0110009" },
-	{ "MNZH29-XTR",		"MT_0DD0110009" },
-	{ "MNZH29-XTR",		"MT_0DD0120009" },
-	{ "MHQH19B-XNR",	"MT_0DF0110009" },
-	{ "MHQH19B-XNR",	"MT_0DF0120009" },
-	{ "MNQH19-XTR",		"MT_0D80110017" },
-	{ "MNQH19C-XTR",	"MT_0E20110017" },
-	{ "MHZH29B-XSR",	"MT_0E80110009" },
-	{ "MHZH29B-XTR",	"MT_0E90110009" },
-	{ "MHZH29B-XTR",	"MT_0E90110009" },
-	{ "MHQA19-XTR",		"MT_0EA0110009" },
-	{ "MHRA19-XTR",		"MT_0EB0110008" },
-	{ "MHQH29C-XTR",	"MT_0EF0110009" },
-	{ "MHQH29C-XSR",	"MT_0F00110009" },
-	{ "MHRH29C-XTR",	"MT_0F10110008" },
-	{ "MHRH29C-XSR",	"MT_0F20110008" },
-	{ "MHPH29D-XTR",	"MT_0F30110010" },
-	{ "MHPH29D-XSR",	"MT_0F40110010" },
-	{ "MNPA19-XTR",		"MT_0F60110010" },
-	{ "MNPA19-XSR",		"MT_0F70110010" },
-
-	/* Ethernet cards */
-	{ "MNEH28B-XTR",	"MT_0D50110004" },
-	{ "MNEH29B-XSR",	"MT_0D40110010" },
-	{ "MNEH29B-XTR",	"MT_0D50110010" },
-	{ "MNPH28C-XSR",	"MT_0DA0110004" },
-	{ "MNPH28C-XTR",	"MT_0DB0110004" },
-	{ "MNPH29C-XSR",	"MT_0DA0110010" },
-	{ "MNPH29C-XTR",	"MT_0DB0110010" },
-	{ "X6275 M2 10GbE",	"X6275M2_10G"   }
-};
-
-/* Get mlx_mdr[] array size */
-#define	MLX_SZ_MLX_MDR		sizeof (mlx_mdr)
-#define	MLX_SZ_MLX_MDR_STRUCT	sizeof (mlx_mdr[0])
-#define	MLX_MAX_ID		(MLX_SZ_MLX_MDR / MLX_SZ_MLX_MDR_STRUCT)
-
 pthread_once_t		oneTimeInit = PTHREAD_ONCE_INIT;
 static int 		umad_cache_cnt = 0;
 static int 		ibdev_cache_cnt = 0;
@@ -540,6 +332,7 @@
 
 		(void) strcpy(info.ibd_fw_ver, device_attr.fw_ver);
 		info.ibd_hw_rev = device_attr.hw_ver;
+		info.ibd_device_id = device_attr.vendor_part_id;
 
 		ibdev = ibv_get_device_name(*dev_list);
 		if (strncmp(ibdev, "mlx4_", 5) == 0) {
@@ -1356,6 +1149,33 @@
 	return (len);
 }
 
+/*
+ * This function passes the HW PSID / HWPN string obtained from
+ * driver HERMON_IOCTL_GET_HWINFO IOCTL. The memory for "hca_hwpsid"
+ * & "hca_hwpn" argument has to be passed by the caller and has to
+ * be at least 16 bytes & 64 bytes in size.
+ */
+static int
+get_hca_psid_pn(char *ibd_name, int fd, char *hca_hwpsid,
+    char *hca_hwpn)
+{
+	hermon_hw_info_ioctl_t		hermon_hw_info;
+	int				rc;
+
+	if (strncmp(ibd_name, "mlx4_", 5) == 0) {
+		if ((rc = ioctl(fd, HERMON_IOCTL_GET_HWINFO,
+		    &hermon_hw_info)) != 0)
+			return (rc);
+
+		strncpy(hca_hwpsid, hermon_hw_info.af_psid, 16);
+		strncpy(hca_hwpn, hermon_hw_info.af_hwpn, 64);
+	} else {
+		fprintf(stderr, "libibverbs: sol_uverbs unsupported "
+		    "device: %s\n", ibd_name);
+		return (1);
+	}
+	return (0);
+}
 
 /*
  * This function passes the HW Part number string obtained from driver
@@ -1384,11 +1204,12 @@
 static void
 init_boardid_index(ibdev_cache_info_t *ibd_info)
 {
-	int	i;
-	int	fd;
-	char	hca_hwpn[64];
-	char	*hwpnp;
-
+	int		i;
+	int		fd;
+	char		hca_hwpsid[16];
+	char		hca_hwpn[64];
+	char		*pn_psidp;
+	boolean_t	psid_valid, pn_valid;
 
 	if (pthread_mutex_lock(&uverbs_cache_mutex) != 0) {
 		fprintf(stderr, "failed: to acquire "
@@ -1429,23 +1250,54 @@
 		goto boardid_err;
 	}
 
-	if (get_hca_hwpn_str(ibd_info->ibd_name, fd, hca_hwpn)) {
-		close(fd);
-		goto boardid_err;
+	psid_valid = pn_valid = B_FALSE;
+	if (get_hca_psid_pn(ibd_info->ibd_name, fd,
+	    hca_hwpsid, hca_hwpn)) {
+		if (get_hca_hwpn_str(ibd_info->ibd_name, fd, hca_hwpn)) {
+			close(fd);
+			goto boardid_err;
+		} else {
+			if (hca_hwpn[0]) {
+				if ((pn_psidp = strchr(
+				    hca_hwpn, ' ')) != NULL)
+					*pn_psidp = '\0';
+				pn_valid = B_TRUE;
+			}
+		}
+	} else {
+		if (hca_hwpsid[0]) {
+			if ((pn_psidp = strchr(
+			    hca_hwpsid, ' ')) != NULL)
+				*pn_psidp = '\0';
+			psid_valid = B_TRUE;
+		} else if (hca_hwpn[0]) {
+			if ((pn_psidp = strchr(
+			    hca_hwpn, ' ')) != NULL)
+				*pn_psidp = '\0';
+			pn_valid = B_TRUE;
+		}
 	}
 	close(fd);
-	if ((hwpnp = strchr(hca_hwpn, ' ')) != NULL)
-		*hwpnp = '\0';
+
+	if (pn_valid == B_FALSE && psid_valid == B_FALSE)
+		goto boardid_err;
 
-	/*
-	 * Find part number, set the boardid_index,
-	 * Skip index 0, as it is for failure "unknown"
-	 * case.
-	 */
-	for (i = 1; i < MLX_MAX_ID; i++) {
-		if (strcmp((const char *)hca_hwpn,
-		    mlx_mdr[i].mlx_pn) == 0) {
-
+	for (i = 0; i < MLX_MAX_ID; i++) {
+		/*
+		 * Find PSID number, set the boardid_index,
+		 * Skip index 0, as it is for failure "unknown"
+		 * case
+		 */
+		if ((psid_valid == B_TRUE &&
+		    strncmp(mlx_mdr[i].mlx_psid,
+		    (const char *)hca_hwpsid,
+		    min(strlen(hca_hwpsid),
+		    strlen(mlx_mdr[i].mlx_psid))) == 0) ||
+		    (pn_valid == B_TRUE &&
+		    strncmp(mlx_mdr[i].mlx_pn,
+		    (const char *)hca_hwpn,
+		    min(strlen(hca_hwpn),
+		    strlen(mlx_mdr[i].mlx_pn))) == 0)) {
 			/* Set boardid_index */
 			ibd_info->ibd_boardid_index = i;
 			return;
@@ -1454,7 +1306,7 @@
 
 boardid_err:
 	/* Failure case, default to "unknown" */
-	ibd_info->ibd_boardid_index = 0;
+	ibd_info->ibd_boardid_index = -2;
 }
 
 static int
@@ -1494,15 +1346,21 @@
 			len = 1 + sprintf(buf, "%d", info->ibd_hw_rev);
 		} else if (strcmp(path, "hca_type") == 0) {
 			if (!(strncmp(info->ibd_name, "mlx4", 4)))
-				len = 1 + sprintf(buf, "%d", 0);
+				len = 1 + sprintf(buf, "MT%d",
+				    info->ibd_device_id);
 			else
 				len = 1 + sprintf(buf, "unavailable");
 		} else if (strcmp(path, "board_id") == 0) {
 			if (info->ibd_boardid_index == -1)
 				init_boardid_index(info);
 
-			len = 1 + sprintf(buf, "%s",
-			    mlx_mdr[info->ibd_boardid_index].mlx_psid);
+			if (info->ibd_boardid_index >= 0) {
+				len = 1 + sprintf(buf, "%s",
+				    mlx_mdr[info->ibd_boardid_index].mlx_psid);
+			} else {
+				len = 1 + sprintf(buf, "%s",
+				    "unknown");
+			}
 		}
 	}
 exit:
--- a/components/open-fabrics/qperf/patches/base.patch	Tue Sep 10 14:24:13 2013 -0700
+++ b/components/open-fabrics/qperf/patches/base.patch	Wed Sep 11 09:47:05 2013 -0700
@@ -78,14 +78,12 @@
      return 0;
  }
  
-@@ -617,14 +634,21 @@
+@@ -617,14 +634,19 @@
      for (i = 0; i < P_N; ++i)
          if (ParInfo[i].index != i)
              error(BUG, "initialize: ParInfo: out of order: %d", i);
 +#if (defined(__SVR4) && defined(__sun))
 +    solaris_init();
-+    Req.affinity = -1;		/* default no affinity */
-+    RReq.affinity = -1;
 +#else
      ProcStatFD = open("/proc/stat", 0);
      if (ProcStatFD < 0)
@@ -100,7 +98,7 @@
  /*
   * Look for a colon and skip past it and any spaces.
   */
-@@ -643,6 +667,7 @@
+@@ -643,6 +665,7 @@
          s++;
      return s;
  }
@@ -108,7 +106,7 @@
  
  
  /*
-@@ -1667,13 +1692,18 @@
+@@ -1667,13 +1690,18 @@
  {
      char count[STRSIZE];
      char speed[STRSIZE];
@@ -129,7 +127,7 @@
      if (!fp)
          error(0, "cannot open /proc/cpuinfo");
      cpu[0] = '\0';
-@@ -1732,6 +1762,7 @@
+@@ -1732,6 +1760,7 @@
  
      /* CPU speed */
      speed[0] = '\0';
@@ -137,7 +135,7 @@
      if (!mixed) {
          int n = strlen(cpu);
          if (n < 3 || cpu[n-2] != 'H' || cpu[n-1] != 'z') {
-@@ -1745,7 +1776,24 @@
+@@ -1745,7 +1774,24 @@
              }
          }
      }
@@ -162,7 +160,7 @@
      /* Number of CPUs */
      if (cpus == 1)
          count[0] = '\0';
-@@ -2615,9 +2663,17 @@
+@@ -2615,14 +2661,20 @@
  static void
  set_affinity(void)
  {
@@ -171,24 +169,19 @@
 +#endif
      int a = Req.affinity;
  
-+#if defined(__SVR4) && defined(__sun)
-+    if (a == -1)	/* no affinity by default */
-+	return;
-+    if (processor_bind(P_LWPID, P_MYID, a, NULL) != 0)
-+        error(SYS, "cannot set processor affinity (cpu %d)", a);
-+#else
      if (!a)
          return;
++#if defined(__SVR4) && defined(__sun)
++    if (processor_bind(P_LWPID, P_MYID, a - 1, NULL) != 0)
++#else
      CPU_ZERO(&set);
-@@ -2624,6 +2680,7 @@
      CPU_SET(a-1, &set);
      if (sched_setaffinity(0, sizeof(set), &set) < 0)
++#endif
          error(SYS, "cannot set processor affinity (cpu %d)", a-1);
-+#endif
  }
  
- 
-@@ -2771,9 +2828,36 @@
+@@ -2771,9 +2823,36 @@
  /*
   * Get various temporal parameters.
   */
@@ -225,7 +218,7 @@
      int n;
      char *p;
      char buf[BUFSIZE];
-@@ -2802,6 +2886,7 @@
+@@ -2802,6 +2881,7 @@
      while (n < T_N)
          timex[n++] = 0;
  }