usr/src/cmd/mdb/common/mdb/mdb_target_impl.h
changeset 14146 42d090a37218
parent 2712 f74a135872bc
equal deleted inserted replaced
14145:20c0ad5cefdf 14146:42d090a37218
    20  */
    20  */
    21 /*
    21 /*
    22  * Copyright 2006 Sun Microsystems, Inc.  All rights reserved.
    22  * Copyright 2006 Sun Microsystems, Inc.  All rights reserved.
    23  * Use is subject to license terms.
    23  * Use is subject to license terms.
    24  */
    24  */
       
    25 /*
       
    26  * Copyright (c) 2012, Joyent, Inc.  All rights reserved.
       
    27  */
    25 
    28 
    26 #ifndef	_MDB_TARGET_IMPL_H
    29 #ifndef	_MDB_TARGET_IMPL_H
    27 #define	_MDB_TARGET_IMPL_H
    30 #define	_MDB_TARGET_IMPL_H
    28 
       
    29 #pragma ident	"%Z%%M%	%I%	%E% SMI"
       
    30 
    31 
    31 #include <mdb/mdb_target.h>
    32 #include <mdb/mdb_target.h>
    32 #include <mdb/mdb_module.h>
    33 #include <mdb/mdb_module.h>
    33 #include <mdb/mdb_list.h>
    34 #include <mdb/mdb_list.h>
    34 #include <mdb/mdb_gelf.h>
    35 #include <mdb/mdb_gelf.h>
   248 #define	MDB_TGT_R_FPS		0x010	/* Single-precision floating-point */
   249 #define	MDB_TGT_R_FPS		0x010	/* Single-precision floating-point */
   249 #define	MDB_TGT_R_FPD		0x020	/* Double-precision floating-point */
   250 #define	MDB_TGT_R_FPD		0x020	/* Double-precision floating-point */
   250 #define	MDB_TGT_R_FPQ		0x040	/* Quad-precision floating-point */
   251 #define	MDB_TGT_R_FPQ		0x040	/* Quad-precision floating-point */
   251 #define	MDB_TGT_R_FPU		0x080	/* FPU control/status register */
   252 #define	MDB_TGT_R_FPU		0x080	/* FPU control/status register */
   252 #define	MDB_TGT_R_RDONLY	0x100	/* Register is read-only */
   253 #define	MDB_TGT_R_RDONLY	0x100	/* Register is read-only */
       
   254 #define	MDB_TGT_R_32		0x200	/* 32-bit version of register */
       
   255 #define	MDB_TGT_R_16		0x400	/* 16-bit version of register */
       
   256 #define	MDB_TGT_R_8H		0x800	/* upper half of a 16-bit reg */
       
   257 #define	MDB_TGT_R_8L		0x1000	/* lower half of a 16-bit reg */
   253 
   258 
   254 #define	MDB_TGT_R_IS_FP(f)	((f) & 0xf0) /* Test MDB_TGT_R_FP* bits */
   259 #define	MDB_TGT_R_IS_FP(f)	((f) & 0xf0) /* Test MDB_TGT_R_FP* bits */
   255 
   260 
   256 #define	MDB_TGT_R_NVAL(n, f)	((((ulong_t)(n)) << 16UL) | (f))
   261 #define	MDB_TGT_R_NVAL(n, f)	((((ulong_t)(n)) << 16UL) | (f))
   257 #define	MDB_TGT_R_NUM(v)	(((v) >> 16) & 0xffff)
   262 #define	MDB_TGT_R_NUM(v)	(((v) >> 16) & 0xffff)