equal
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inserted
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18 # |
18 # |
19 # CDDL HEADER END |
19 # CDDL HEADER END |
20 # |
20 # |
21 |
21 |
22 # |
22 # |
23 # Copyright (c) 2011, Oracle and/or its affiliates. All rights reserved. |
23 # Copyright (c) 2011, 2012, Oracle and/or its affiliates. All rights reserved. |
24 # |
24 # |
25 |
25 |
26 include ../../make-rules/shared-macros.mk |
26 include ../../make-rules/shared-macros.mk |
27 |
27 |
28 COMPONENT_NAME= logilab-common |
28 COMPONENT_NAME= logilab-common |
40 # common targets |
40 # common targets |
41 |
41 |
42 build: $(BUILD_32) |
42 build: $(BUILD_32) |
43 |
43 |
44 install: $(INSTALL_32) |
44 install: $(INSTALL_32) |
|
45 $(PYTHON.2.6.32) -m compileall $(PROTO_DIR)/usr/lib/python2.6/vendor-packages |
|
46 $(PYTHON.2.7.32) -m compileall $(PROTO_DIR)/usr/lib/python2.7/vendor-packages |
|
47 |
45 |
48 |
46 # Expected failures for test target: |
49 # Expected failures for test target: |
47 # 722 test cases, 17 errors, 5 failures, 56 skipped |
50 # 722 test cases, 17 errors, 5 failures, 56 skipped |
48 # 43 modules OK (7 failed) |
51 # 43 modules OK (7 failed) |
49 COMPONENT_TEST_DIR = $(COMPONENT_SRC) |
52 COMPONENT_TEST_DIR = $(COMPONENT_SRC) |