--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/components/gdb/patches/gdb.features.sparc64-fpu.xml.patch	Fri Nov 08 08:16:59 2013 -0800
@@ -0,0 +1,97 @@
+# XML representation of 64-bit SPARC floating-point registers.
+--- /dev/null	2013-10-05 19:42:45.000000000 -0700
++++ gdb-7.6/gdb/features/sparc64-fpu.xml	2013-08-28 00:21:33.000000000 -0700
+@@ -0,0 +1,93 @@
++<?xml version="1.0"?>
++<!-- Copyright (C) 2007-2013 Free Software Foundation, Inc.
++
++     Copying and distribution of this file, with or without modification,
++     are permitted in any medium without royalty provided the copyright
++     notice and this notice are preserved.  -->
++
++<!DOCTYPE feature SYSTEM "gdb-target.dtd">
++<feature name="org.gnu.gdb.sparc.fpu">
++  <reg name="f0" bitsize="32" type="ieee_single" regnum="32"/>
++  <reg name="f1" bitsize="32" type="ieee_single" regnum="33"/>
++  <reg name="f2" bitsize="32" type="ieee_single" regnum="34"/>
++  <reg name="f3" bitsize="32" type="ieee_single" regnum="35"/>
++  <reg name="f4" bitsize="32" type="ieee_single" regnum="36"/>
++  <reg name="f5" bitsize="32" type="ieee_single" regnum="37"/>
++  <reg name="f6" bitsize="32" type="ieee_single" regnum="38"/>
++  <reg name="f7" bitsize="32" type="ieee_single" regnum="39"/>
++  <reg name="f8" bitsize="32" type="ieee_single" regnum="40"/>
++  <reg name="f9" bitsize="32" type="ieee_single" regnum="41"/>
++  <reg name="f10" bitsize="32" type="ieee_single" regnum="42"/>
++  <reg name="f11" bitsize="32" type="ieee_single" regnum="43"/>
++  <reg name="f12" bitsize="32" type="ieee_single" regnum="44"/>
++  <reg name="f13" bitsize="32" type="ieee_single" regnum="45"/>
++  <reg name="f14" bitsize="32" type="ieee_single" regnum="46"/>
++  <reg name="f15" bitsize="32" type="ieee_single" regnum="47"/>
++  <reg name="f16" bitsize="32" type="ieee_single" regnum="48"/>
++  <reg name="f17" bitsize="32" type="ieee_single" regnum="49"/>
++  <reg name="f18" bitsize="32" type="ieee_single" regnum="50"/>
++  <reg name="f19" bitsize="32" type="ieee_single" regnum="51"/>
++  <reg name="f20" bitsize="32" type="ieee_single" regnum="52"/>
++  <reg name="f21" bitsize="32" type="ieee_single" regnum="53"/>
++  <reg name="f22" bitsize="32" type="ieee_single" regnum="54"/>
++  <reg name="f23" bitsize="32" type="ieee_single" regnum="55"/>
++  <reg name="f24" bitsize="32" type="ieee_single" regnum="56"/>
++  <reg name="f25" bitsize="32" type="ieee_single" regnum="57"/>
++  <reg name="f26" bitsize="32" type="ieee_single" regnum="58"/>
++  <reg name="f27" bitsize="32" type="ieee_single" regnum="59"/>
++  <reg name="f28" bitsize="32" type="ieee_single" regnum="60"/>
++  <reg name="f29" bitsize="32" type="ieee_single" regnum="61"/>
++  <reg name="f30" bitsize="32" type="ieee_single" regnum="62"/>
++  <reg name="f31" bitsize="32" type="ieee_single" regnum="63"/>
++
++  <reg name="d0" bitsize="64" type="ieee_double" regnum="32"/>
++  <reg name="d1" bitsize="64" type="ieee_double" regnum="34"/>
++  <reg name="d2" bitsize="64" type="ieee_double" regnum="36"/>
++  <reg name="d3" bitsize="64" type="ieee_double" regnum="38"/>
++  <reg name="d4" bitsize="64" type="ieee_double" regnum="40"/>
++  <reg name="d5" bitsize="64" type="ieee_double" regnum="42"/>
++  <reg name="d6" bitsize="64" type="ieee_double" regnum="44"/>
++  <reg name="d7" bitsize="64" type="ieee_double" regnum="46"/>
++  <reg name="d8" bitsize="64" type="ieee_double" regnum="48"/>
++  <reg name="d9" bitsize="64" type="ieee_double" regnum="50"/>
++  <reg name="d10" bitsize="64" type="ieee_double" regnum="52"/>
++  <reg name="d11" bitsize="64" type="ieee_double" regnum="54"/>
++  <reg name="d12" bitsize="64" type="ieee_double" regnum="56"/>
++  <reg name="d13" bitsize="64" type="ieee_double" regnum="58"/>
++  <reg name="d14" bitsize="64" type="ieee_double" regnum="60"/>
++  <reg name="d15" bitsize="64" type="ieee_double" regnum="62"/>
++  <reg name="d16" bitsize="64" type="ieee_double" regnum="64"/>
++  <reg name="d17" bitsize="64" type="ieee_double" regnum="66"/>
++  <reg name="d18" bitsize="64" type="ieee_double" regnum="68"/>
++  <reg name="d19" bitsize="64" type="ieee_double" regnum="70"/>
++  <reg name="d20" bitsize="64" type="ieee_double" regnum="72"/>
++  <reg name="d21" bitsize="64" type="ieee_double" regnum="74"/>
++  <reg name="d22" bitsize="64" type="ieee_double" regnum="76"/>
++  <reg name="d23" bitsize="64" type="ieee_double" regnum="78"/>
++  <reg name="d24" bitsize="64" type="ieee_double" regnum="80"/>
++  <reg name="d25" bitsize="64" type="ieee_double" regnum="82"/>
++  <reg name="d26" bitsize="64" type="ieee_double" regnum="84"/>
++  <reg name="d27" bitsize="64" type="ieee_double" regnum="86"/>
++  <reg name="d28" bitsize="64" type="ieee_double" regnum="88"/>
++  <reg name="d29" bitsize="64" type="ieee_double" regnum="90"/>
++  <reg name="d30" bitsize="64" type="ieee_double" regnum="92"/>
++  <reg name="d31" bitsize="64" type="ieee_double" regnum="94"/>
++
++  <reg name="q0" bitsize="128" type="ieee_double" regnum="32"/>
++  <reg name="q1" bitsize="128" type="ieee_double" regnum="36"/>
++  <reg name="q2" bitsize="128" type="ieee_double" regnum="40"/>
++  <reg name="q3" bitsize="128" type="ieee_double" regnum="44"/>
++  <reg name="q4" bitsize="128" type="ieee_double" regnum="48"/>
++  <reg name="q5" bitsize="128" type="ieee_double" regnum="52"/>
++  <reg name="q6" bitsize="128" type="ieee_double" regnum="56"/>
++  <reg name="q7" bitsize="128" type="ieee_double" regnum="62"/>
++  <reg name="q8" bitsize="128" type="ieee_double" regnum="66"/>
++  <reg name="q9" bitsize="128" type="ieee_double" regnum="70"/>
++  <reg name="q10" bitsize="128" type="ieee_double" regnum="74"/>
++  <reg name="q11" bitsize="128" type="ieee_double" regnum="78"/>
++  <reg name="q12" bitsize="128" type="ieee_double" regnum="80"/>
++  <reg name="q13" bitsize="128" type="ieee_double" regnum="80"/>
++  <reg name="q14" bitsize="128" type="ieee_double" regnum="80"/>
++  <reg name="q15" bitsize="128" type="ieee_double" regnum="80"/>
++</feature>
++