PSARC 2010/172 Renaming interrupt affinity interfaces
authorgongtian zhao - Sun Microsystems - Beijing China <Gongtian.Zhao@Sun.COM>
Mon, 07 Jun 2010 12:57:33 +0800
changeset 12564 c898fb4dec77
parent 12563 ddc1a353b09e
child 12565 a417cdfdba5f
PSARC 2010/172 Renaming interrupt affinity interfaces 6948283 Renaming of existing ddi interrupt re-target interfaces
usr/src/uts/common/io/mac/mac_datapath_setup.c
usr/src/uts/common/os/ddi_intr.c
usr/src/uts/common/os/ddi_intr_impl.c
usr/src/uts/common/sys/ddi_intr.h
usr/src/uts/common/sys/ddi_intr_impl.h
usr/src/uts/i86pc/io/pcplusmp/apic_introp.c
usr/src/uts/sun4/io/px/px_intr.c
usr/src/uts/sun4v/io/niumx/niumx.c
--- a/usr/src/uts/common/io/mac/mac_datapath_setup.c	Sun Jun 06 18:36:09 2010 -0700
+++ b/usr/src/uts/common/io/mac/mac_datapath_setup.c	Mon Jun 07 12:57:33 2010 +0800
@@ -1303,9 +1303,9 @@
 	if (cp == NULL || !cpu_is_online(cp))
 		return;
 
-	/* Drop the cpu_lock as ddi_intr_set_affinity() holds it */
+	/* Drop the cpu_lock as set_intr_affinity() holds it */
 	mutex_exit(&cpu_lock);
-	if (ddi_intr_set_affinity(mintr->mi_ddi_handle, cpuid) == DDI_SUCCESS)
+	if (set_intr_affinity(mintr->mi_ddi_handle, cpuid) == DDI_SUCCESS)
 		mac_srs->srs_cpu.mc_rx_intr_cpu = cpuid;
 	else
 		mac_srs->srs_cpu.mc_rx_intr_cpu = -1;
@@ -1343,11 +1343,11 @@
 			}
 			mintr = &ring->mr_info.mri_intr;
 			/*
-			 * Drop the cpu_lock as ddi_intr_set_affinity()
+			 * Drop the cpu_lock as set_intr_affinity()
 			 * holds it
 			 */
 			mutex_exit(&cpu_lock);
-			if (ddi_intr_set_affinity(mintr->mi_ddi_handle,
+			if (set_intr_affinity(mintr->mi_ddi_handle,
 			    cpuid) == DDI_SUCCESS) {
 				srs_cpu->mc_tx_retargeted_cpu[i] = cpuid;
 			} else {
@@ -1367,7 +1367,7 @@
 		if (MAC_RING_RETARGETABLE(ring)) {
 			mintr = &ring->mr_info.mri_intr;
 			mutex_exit(&cpu_lock);
-			if ((ddi_intr_set_affinity(mintr->mi_ddi_handle,
+			if ((set_intr_affinity(mintr->mi_ddi_handle,
 			    cpuid) == DDI_SUCCESS)) {
 				srs_cpu->mc_tx_retargeted_cpu[0] = cpuid;
 			} else {
--- a/usr/src/uts/common/os/ddi_intr.c	Sun Jun 06 18:36:09 2010 -0700
+++ b/usr/src/uts/common/os/ddi_intr.c	Mon Jun 07 12:57:33 2010 +0800
@@ -741,68 +741,6 @@
 	return (ret);
 }
 
-/*
- * Interrupt target get/set functions
- */
-int
-ddi_intr_get_affinity(ddi_intr_handle_t h, ddi_intr_target_t *tgt_p)
-{
-	ddi_intr_handle_impl_t	*hdlp = (ddi_intr_handle_impl_t *)h;
-	int			ret;
-
-	DDI_INTR_APIDBG((CE_CONT, "ddi_intr_get_affinity: hdlp = %p\n",
-	    (void *)hdlp));
-
-	if ((hdlp == NULL) || (tgt_p == NULL))
-		return (DDI_EINVAL);
-
-	rw_enter(&hdlp->ih_rwlock, RW_READER);
-	if (hdlp->ih_state != DDI_IHDL_STATE_ENABLE) {
-		rw_exit(&hdlp->ih_rwlock);
-		return (DDI_EINVAL);
-	}
-
-	ret = i_ddi_intr_ops(hdlp->ih_dip, hdlp->ih_dip,
-	    DDI_INTROP_GETTARGET, hdlp, (void *)tgt_p);
-
-	DDI_INTR_APIDBG((CE_CONT, "ddi_intr_get_affinity: target %x\n",
-	    *tgt_p));
-
-	if (ret == DDI_SUCCESS)
-		hdlp->ih_target = *tgt_p;
-
-	rw_exit(&hdlp->ih_rwlock);
-	return (ret);
-}
-
-int
-ddi_intr_set_affinity(ddi_intr_handle_t h, ddi_intr_target_t tgt)
-{
-	ddi_intr_handle_impl_t	*hdlp = (ddi_intr_handle_impl_t *)h;
-	int			ret;
-
-	DDI_INTR_APIDBG((CE_CONT, "ddi_intr_set_affinity: hdlp = %p "
-	    "target %x\n", (void *)hdlp, tgt));
-
-	if (hdlp == NULL)
-		return (DDI_EINVAL);
-
-	rw_enter(&hdlp->ih_rwlock, RW_WRITER);
-	if ((hdlp->ih_state != DDI_IHDL_STATE_ENABLE) ||
-	    !(hdlp->ih_cap & DDI_INTR_FLAG_RETARGETABLE)) {
-		rw_exit(&hdlp->ih_rwlock);
-		return (DDI_EINVAL);
-	}
-
-	ret = i_ddi_intr_ops(hdlp->ih_dip, hdlp->ih_dip,
-	    DDI_INTROP_SETTARGET, hdlp, &tgt);
-
-	if (ret == DDI_SUCCESS)
-		hdlp->ih_target = tgt;
-
-	rw_exit(&hdlp->ih_rwlock);
-	return (ret);
-}
 
 /*
  * Interrupt enable/disable/block_enable/block_disable handlers
--- a/usr/src/uts/common/os/ddi_intr_impl.c	Sun Jun 06 18:36:09 2010 -0700
+++ b/usr/src/uts/common/os/ddi_intr_impl.c	Mon Jun 07 12:57:33 2010 +0800
@@ -476,6 +476,69 @@
 	return (DDI_ENOTSUP);
 }
 
+/*
+ * Interrupt target get/set functions
+ */
+int
+get_intr_affinity(ddi_intr_handle_t h, processorid_t *tgt_p)
+{
+	ddi_intr_handle_impl_t	*hdlp = (ddi_intr_handle_impl_t *)h;
+	int			ret;
+
+	DDI_INTR_APIDBG((CE_CONT, "get_intr_affinity: hdlp = %p\n",
+	    (void *)hdlp));
+
+	if ((hdlp == NULL) || (tgt_p == NULL))
+		return (DDI_EINVAL);
+
+	rw_enter(&hdlp->ih_rwlock, RW_READER);
+	if (hdlp->ih_state != DDI_IHDL_STATE_ENABLE) {
+		rw_exit(&hdlp->ih_rwlock);
+		return (DDI_EINVAL);
+	}
+
+	ret = i_ddi_intr_ops(hdlp->ih_dip, hdlp->ih_dip,
+	    DDI_INTROP_GETTARGET, hdlp, (void *)tgt_p);
+
+	DDI_INTR_APIDBG((CE_CONT, "get_intr_affinity: target %x\n",
+	    *tgt_p));
+
+	if (ret == DDI_SUCCESS)
+		hdlp->ih_target = *tgt_p;
+
+	rw_exit(&hdlp->ih_rwlock);
+	return (ret);
+}
+
+int
+set_intr_affinity(ddi_intr_handle_t h, processorid_t tgt)
+{
+	ddi_intr_handle_impl_t	*hdlp = (ddi_intr_handle_impl_t *)h;
+	int			ret;
+
+	DDI_INTR_APIDBG((CE_CONT, "set_intr_affinity: hdlp = %p "
+	    "target %x\n", (void *)hdlp, tgt));
+
+	if (hdlp == NULL)
+		return (DDI_EINVAL);
+
+	rw_enter(&hdlp->ih_rwlock, RW_WRITER);
+	if ((hdlp->ih_state != DDI_IHDL_STATE_ENABLE) ||
+	    (hdlp->ih_type != DDI_INTR_TYPE_MSIX)) {
+		rw_exit(&hdlp->ih_rwlock);
+		return (DDI_EINVAL);
+	}
+
+	ret = i_ddi_intr_ops(hdlp->ih_dip, hdlp->ih_dip,
+	    DDI_INTROP_SETTARGET, hdlp, &tgt);
+
+	if (ret == DDI_SUCCESS)
+		hdlp->ih_target = tgt;
+
+	rw_exit(&hdlp->ih_rwlock);
+	return (ret);
+}
+
 #if defined(__i386) || defined(__amd64)
 ddi_acc_handle_t
 i_ddi_get_pci_config_handle(dev_info_t *dip)
--- a/usr/src/uts/common/sys/ddi_intr.h	Sun Jun 06 18:36:09 2010 -0700
+++ b/usr/src/uts/common/sys/ddi_intr.h	Mon Jun 07 12:57:33 2010 +0800
@@ -19,8 +19,7 @@
  * CDDL HEADER END
  */
 /*
- * Copyright 2009 Sun Microsystems, Inc.  All rights reserved.
- * Use is subject to license terms.
+ * Copyright (c) 2005, 2010, Oracle and/or its affiliates. All rights reserved.
  */
 
 #ifndef	_SYS_DDI_INTR_H
@@ -87,7 +86,6 @@
 #define	DDI_INTR_FLAG_PENDING	0x0020	/* (RO) int pending supported */
 #define	DDI_INTR_FLAG_BLOCK	0x0100	/* (RO) requires block enable */
 #define	DDI_INTR_FLAG_MSI64	0x0200	/* (RO) MSI/X supports 64 bit addr */
-#define	DDI_INTR_FLAG_RETARGETABLE	0x0400	/* (RO) retargetable */
 
 /*
  * Macro to be used while passing interrupt priority
@@ -102,11 +100,6 @@
 typedef struct __ddi_softint_handle *ddi_softint_handle_t;
 
 /*
- * Typedef for interrupt target
- */
-typedef	processorid_t ddi_intr_target_t;
-
-/*
  * Definition for behavior flag which is used with ddi_intr_alloc(9f).
  */
 #define	DDI_INTR_ALLOC_NORMAL	0	/* Non-strict alloc */
@@ -183,11 +176,6 @@
 	    ddi_intr_handle_t *dup);
 int	ddi_intr_remove_handler(ddi_intr_handle_t h);
 
-/*
- * Interrupt get/set affinity functions
- */
-int	ddi_intr_get_affinity(ddi_intr_handle_t h, ddi_intr_target_t *tgt_p);
-int	ddi_intr_set_affinity(ddi_intr_handle_t h, ddi_intr_target_t tgt);
 
 /*
  * Interrupt enable/disable/block_enable/block_disable functions
--- a/usr/src/uts/common/sys/ddi_intr_impl.h	Sun Jun 06 18:36:09 2010 -0700
+++ b/usr/src/uts/common/sys/ddi_intr_impl.h	Mon Jun 07 12:57:33 2010 +0800
@@ -118,9 +118,9 @@
 	 * The ih_target field may not reflect the actual target that is
 	 * currently being used for the given interrupt. This field is just a
 	 * snapshot taken either during ddi_intr_add_handler() or
-	 * ddi_intr_get/set_affinity() calls.
+	 * get/set_intr_affinity() calls.
 	 */
-	ddi_intr_target_t	ih_target;	/* Target ID */
+	processorid_t 		ih_target;	/* Target ID */
 } ddi_intr_handle_impl_t;
 
 /* values for ih_state (strictly for interrupt handle) */
@@ -419,6 +419,12 @@
  */
 typedef enum {DDI_INTR_CTLOPS_NONE} ddi_intr_ctlop_t;
 
+/*
+ * Interrupt get/set affinity functions
+ */
+int	get_intr_affinity(ddi_intr_handle_t h, processorid_t *tgt_p);
+int	set_intr_affinity(ddi_intr_handle_t h, processorid_t tgt);
+
 /* The following are obsolete interfaces */
 ddi_intrspec_t	i_ddi_get_intrspec(dev_info_t *dip, dev_info_t *rdip,
 	    uint_t inumber);
--- a/usr/src/uts/i86pc/io/pcplusmp/apic_introp.c	Sun Jun 06 18:36:09 2010 -0700
+++ b/usr/src/uts/i86pc/io/pcplusmp/apic_introp.c	Mon Jun 07 12:57:33 2010 +0800
@@ -1031,8 +1031,6 @@
 		cap = DDI_INTR_FLAG_PENDING;
 		if (hdlp->ih_type == DDI_INTR_TYPE_FIXED)
 			cap |= DDI_INTR_FLAG_MASKABLE;
-		else if (hdlp->ih_type == DDI_INTR_TYPE_MSIX)
-			cap |= DDI_INTR_FLAG_RETARGETABLE;
 		*result = cap;
 		break;
 	case PSM_INTR_OP_GET_SHARED:
--- a/usr/src/uts/sun4/io/px/px_intr.c	Sun Jun 06 18:36:09 2010 -0700
+++ b/usr/src/uts/sun4/io/px/px_intr.c	Mon Jun 07 12:57:33 2010 +0800
@@ -19,8 +19,7 @@
  * CDDL HEADER END
  */
 /*
- * Copyright 2010 Sun Microsystems, Inc.  All rights reserved.
- * Use is subject to license terms.
+ * Copyright (c) 2005, 2010, Oracle and/or its affiliates. All rights reserved.
  */
 
 /*
@@ -581,8 +580,6 @@
 	switch (intr_op) {
 	case DDI_INTROP_GETCAP:
 		ret = pci_msi_get_cap(rdip, hdlp->ih_type, (int *)result);
-		if (ret == DDI_SUCCESS)
-			*(int *)result |= DDI_INTR_FLAG_RETARGETABLE;
 		break;
 	case DDI_INTROP_SETCAP:
 		DBG(DBG_INTROPS, dip, "px_msix_ops: SetCap is not supported\n");
--- a/usr/src/uts/sun4v/io/niumx/niumx.c	Sun Jun 06 18:36:09 2010 -0700
+++ b/usr/src/uts/sun4v/io/niumx/niumx.c	Mon Jun 07 12:57:33 2010 +0800
@@ -19,8 +19,7 @@
  * CDDL HEADER END
  */
 /*
- * Copyright 2010 Sun Microsystems, Inc.  All rights reserved.
- * Use is subject to license terms.
+ * Copyright (c) 2006, 2010, Oracle and/or its affiliates. All rights reserved.
  */
 
 
@@ -824,8 +823,7 @@
 		*(int *)result = DDI_INTR_TYPE_FIXED;
 		break;
 	case DDI_INTROP_GETCAP:
-		*(int *)result =  DDI_INTR_FLAG_LEVEL |
-		    DDI_INTR_FLAG_RETARGETABLE;
+		*(int *)result =  DDI_INTR_FLAG_LEVEL;
 		break;
 	case DDI_INTROP_SETCAP:
 		ret = DDI_ENOTSUP;