* Copyright (c) 2006, 2013, Oracle and/or its affiliates. All rights reserved.

efb_map_mem(

    register return_packet *const rp,

    register int const test)

	register int const pagesize = getpagesize();

	if (efb_get_pci_info() != 0) {

		gfx_vts_set_message(rp, 1, test, "get pci info failed");

		return (-1);

	}

	/*

	 * Map MMIO

	 */

	efb_info.efb_mmio_size = (efb_info.efb_mmio_size + pagesize - 1) /

	    pagesize * pagesize;

	if (efb_map_mmio() != 0) {

		gfx_vts_set_message(rp, 1, test, "map MMIO failed");

		return (-1);

	switch (efb_info.efb_device) {

	case 20825:

	case 20830:

	case 23396:

		efb_info.efb_fb_size = REGR(RADEON_CONFIG_MEMSIZE);

		break;

	default:

		efb_info.efb_fb_size = REGR(R600_CONFIG_MEMSIZE);

		break;

	}

	efb_info.efb_fb_size = (efb_info.efb_fb_size + (pagesize - 1)) /

	    pagesize * pagesize;

	/*

	 * Map framebuffer

	 */

	if (efb_map_fb() != 0) {

		gfx_vts_set_message(rp, 1, test, "map framebuffer failed");

		return (-1);

	}

	return (0);

}

int

efb_get_pci_info(

    void)

{

	struct gfx_pci_cfg pciconfig;

	int i;

	uint_t bar;

	uint_t bar_hi;

	offset_t mem_base[6];

	offset_t io_base[6];

	int type[6];

	if (ioctl(efb_info.efb_fd, GFX_IOCTL_GET_PCI_CONFIG,

	    &pciconfig) != 0) {

		return (-1);

	}

	efb_info.efb_vendor = pciconfig.VendorID;

	efb_info.efb_device = pciconfig.DeviceID;

		type[i] = 0;

		mem_base[i] = 0;

		io_base[i] = 0;

	}

	for (i = 0; i < 6; i++) {

		bar = pciconfig.bar[i];

		if (bar != 0) {

			if (bar & PCI_MAP_IO) {

				io_base[i] = PCIGETIO(bar);

				type[i] = bar & PCI_MAP_IO_ATTR_MASK;

				type[i] = bar & PCI_MAP_MEMORY_ATTR_MASK;

				mem_base[i] = PCIGETMEMORY(bar);

				if (PCI_MAP_IS64BITMEM(bar)) {

					if (i == 5) {

						mem_base[i] = 0;

					} else {

						bar_hi = pciconfig.bar[i+1];

						mem_base[i] |=

						    ((offset_t)bar_hi << 32);

						++i;

					}

				}

	efb_info.efb_fb_addr = mem_base[0] & 0xfff00000;

	efb_info.efb_fb_size = 0;

	efb_info.efb_mmio_addr = mem_base[2] & 0xffff0000;

	efb_info.efb_mmio_size = 1 << EFB_REG_SIZE_LOG2;

	if (gfx_vts_debug_mask & VTS_DEBUG) {

		printf("efb_vendor = 0x%04x, efb_device = 0x%04x\n",

		    efb_info.efb_vendor, efb_info.efb_device);

		printf("efb_fb_addr 0x%llx, efb_fb_size 0x%lx\n",

		    (unsigned long long)efb_info.efb_fb_addr,

		    (unsigned long)efb_info.efb_fb_size);

		printf("efb_mmio_addr 0x%llx, efb_mmio_size 0x%lx\n",

		    (unsigned long long)efb_info.efb_mmio_addr,

		    (unsigned long)efb_info.efb_mmio_size);

	}

	return (0);

}

int

efb_map_mmio(

    void)

{

	register void *ptr;

	if (efb_info.efb_mmio_ptr == NULL) {

		ptr = mmap(NULL, efb_info.efb_mmio_size,

		    PROT_READ | PROT_WRITE, MAP_SHARED,

		    efb_info.efb_fd, efb_info.efb_mmio_addr);

		if (ptr == MAP_FAILED)

			return (-1);

	}

	efb_info.efb_mmio_ptr = (uchar_t *)ptr;

	if (gfx_vts_debug_mask & VTS_DEBUG)

		printf("efb_mmio_ptr = 0x%llx\n",

		    (unsigned long long)efb_info.efb_mmio_ptr);

	return (0);

efb_map_fb(

    void)

	register void *ptr;

	if (efb_info.efb_fb_ptr == NULL) {

		ptr = mmap(NULL, efb_info.efb_fb_size,

		    PROT_READ | PROT_WRITE, MAP_SHARED,

		    efb_info.efb_fd, efb_info.efb_fb_addr);

		if (ptr == MAP_FAILED)

			return (-1);

		efb_info.efb_fb_ptr = (uchar_t *)ptr;

	}

	if (gfx_vts_debug_mask & VTS_DEBUG)

		printf("efb_fb_ptr = 0x%llx\n",

		    (unsigned long long)efb_info.efb_fb_ptr);

	return (0);

}

int

efb_init_info(

    register return_packet *const rp,

    register int const test)

{

	register uint32_t crtc_h_total_disp;

	register uint32_t crtc_v_total_disp;

	register uint32_t crtc_gen_cntl;

	register uint32_t crtc_pitch;

	register uint_t width;

	register uint_t height;

	register uint_t depth;

	register uint_t pixelsize;

	register uint_t pitch;

	/* Get the gen cntl */

	crtc_gen_cntl = REGR(CRTC_GEN_CNTL);

	/* Get the horizontal total display end */

	crtc_h_total_disp = REGR(CRTC_H_TOTAL_DISP);

	/* Get the vertical total display end */

	crtc_v_total_disp = REGR(CRTC_V_TOTAL_DISP);

	/* Get the pitch */

	crtc_pitch = REGR(CRTC_PITCH);

	/* Compute the width. */

	width = (((crtc_h_total_disp & CRTC_H_TOTAL_DISP__CRTC_H_DISP_MASK) >>

	    CRTC_H_TOTAL_DISP__CRTC_H_DISP__SHIFT) + 1) * 8;

	/* Compute the height. */

	height = ((crtc_v_total_disp & CRTC_V_TOTAL_DISP__CRTC_V_DISP_MASK) >>

	    CRTC_V_TOTAL_DISP__CRTC_V_DISP__SHIFT) + 1;

	if (crtc_gen_cntl & CRTC_GEN_CNTL__CRTC_INTERLACE_EN_MASK)

		height *= 2;

	/* Compute the pitch */

	pitch = crtc_pitch & CRTC_PITCH__CRTC_PITCH_MASK;

	/* Compute the depth. */

	switch ((crtc_gen_cntl & CRTC_GEN_CNTL__CRTC_PIX_WIDTH_MASK) >>

	    CRTC_GEN_CNTL__CRTC_PIX_WIDTH__SHIFT) {

	case 2:

		depth = 8;

		pixelsize = 1;

		pitch *= 8;

		break;

	case 3:

		depth = 15;

		pixelsize = 2;

		pitch *= 16;

		break;

	case 4:

		depth = 16;

		pixelsize = 2;

		pitch *= 16;

		break;

	case 5:

		depth = 24;

		pixelsize = 3;

		pitch *= 24;

		break;

	case 6:

		depth = 32;

		pixelsize = 4;

		pitch *= 32;

		break;

	default:

		gfx_vts_set_message(rp, 1, test, "unsupported depth");

		return (-1);

	}

	efb_info.efb_width = width;

	efb_info.efb_height = height;

	efb_info.efb_depth = depth;

	efb_info.efb_pixelsize = pixelsize;

	efb_info.efb_linesize = pitch;

	if (gfx_vts_debug_mask & VTS_DEBUG) {

		printf("width=%d height=%d depth=%d pitch=%d\n",

		    efb_info.efb_width, efb_info.efb_height,

		    efb_info.efb_depth, efb_info.efb_linesize);

	}

	return (0);

}

int

efb_unmap_mem(

    register return_packet *const rp,

    register int const test)

{

	if (efb_unmap_fb() != 0) {

		gfx_vts_set_message(rp, 1, test, "unmap framebuffer failed");

		return (-1);

	}

	if (efb_unmap_mmio() != 0) {

		gfx_vts_set_message(rp, 1, test, "unmap MMIO failed");

		return (-1);

	}

	return (0);

}

int

efb_unmap_fb(

    void)

{

	register int status;

	if (efb_info.efb_fb_ptr == NULL)

		return (0);

	status = munmap((char *)efb_info.efb_fb_ptr, efb_info.efb_fb_size);

	efb_info.efb_fb_ptr = NULL;

	return (status);

efb_unmap_mmio(

    void)

	register int status;

	if (efb_info.efb_mmio_ptr == NULL)

		return (0);

	status = munmap((char *)efb_info.efb_mmio_ptr,

	    efb_info.efb_mmio_size);

	efb_info.efb_mmio_ptr = NULL;

	return (status);

efb_init_graphics(void)

	uint_t pitch_offset;

	uint_t pitch;

	uint_t offset;

	uint_t gmc_bpp;

	uint_t v;

	switch (efb_info.efb_depth) {

	case 8:

		gmc_bpp = GMC_DST_8BPP;

		break;

	case 15:

		gmc_bpp = GMC_DST_15BPP;

		break;

	case 16:

		gmc_bpp = GMC_DST_16BPP;

		break;

	case 24:

		gmc_bpp = GMC_DST_24BPP;

		break;

	case 32:

		gmc_bpp = GMC_DST_32BPP;

		break;

	}

	offset = REGR(CRTC_OFFSET) & 0x7ffffff;

	pitch = REGR(CRTC_PITCH) & 0x7ff;

	pitch = pitch * 8;	/* was in groups of 8 pixels */

	pitch_offset =

	    ((pitch * efb_info.efb_pixelsize / 64) << 22) |

	    (offset / 1024);

	/*

	 * Initialize GUI engine

	 */

	if (!efb_wait_idle())

		return (0);

	if (!efb_wait_fifo(5))

		return (0);

	REGW(DEFAULT_PITCH_OFFSET, pitch_offset);

	REGW(RADEON_DST_PITCH_OFFSET, pitch_offset);

	REGW(RADEON_SRC_PITCH_OFFSET, pitch_offset);

	REGW(DEFAULT_SC_BOTTOM_RIGHT,

	    (efb_info.efb_height << 16) | (efb_info.efb_width));

	v = (GMC_SRC_PITCH_OFFSET_DEFAULT |

	    GMC_DST_PITCH_OFFSET_LEAVE |

	    GMC_SRC_CLIP_DEFAULT |

	    GMC_DST_CLIP_DEFAULT |

	    GMC_BRUSH_SOLIDCOLOR |

	    gmc_bpp |

	    GMC_SRC_DSTCOLOR |

	    RADEON_ROP3_P |

	    GMC_WRITE_MASK_LEAVE);

	REGW(RADEON_DP_GUI_MASTER_CNTL, v);

#ifdef DEBUG

	printf("v=0x%x\n", v);

#endif

	return (1);

}

void

efb_save_palet(

    void)

{

	register uint_t coloron;

	register uint_t const save_palette_index =

	    REGR(RADEON_PALETTE_INDEX);

	REGW(RADEON_PALETTE_INDEX, 0);

	for (coloron = 0; coloron < 256; coloron++)

		efb_info.efb_palet[coloron] = REGR(RADEON_PALETTE_30_DATA);

	REGW(RADEON_PALETTE_INDEX, save_palette_index);

}

int

efb_set_palet(

    void)

{

	register uint_t coloron;

	register uint_t save_palette_index;

	uint_t new_red;

	uint_t new_green;

	uint_t new_blue;

	uint_t new_palet[256];

	switch (efb_info.efb_depth) {

	case 8:	/* 3, 3, 2 */

		for (coloron = 0; coloron < 256; coloron++) {

			new_red = ((coloron >> 5) & 0x7) * 1023 / 7;

			new_green = ((coloron >> 2) & 0x7) * 1023 / 7;

			new_blue = (coloron & 0x3) * 1023 / 3;

			new_palet[coloron] =

			    (new_red <<

			    PALETTE_30_DATA__PALETTE_DATA_R__SHIFT) |

			    (new_green <<

			    PALETTE_30_DATA__PALETTE_DATA_G__SHIFT) |

			    (new_blue <<

			    PALETTE_30_DATA__PALETTE_DATA_B__SHIFT);

		}

		break;

	case 15:	/* 5, 5, 5 */

		for (coloron = 0; coloron < 256; coloron++) {

			new_red = (coloron / 8) * 1023 / 31;

			new_green = (coloron / 8) * 1023 / 31;

			new_blue = (coloron / 8) * 1023 / 31;

			new_palet[coloron] =

			    (new_red <<

			    PALETTE_30_DATA__PALETTE_DATA_R__SHIFT) |

			    (new_green <<

			    PALETTE_30_DATA__PALETTE_DATA_G__SHIFT) |

			    (new_blue <<

			    PALETTE_30_DATA__PALETTE_DATA_B__SHIFT);

		}

		break;

	case 16:	/* 5, 6, 5 */

		for (coloron = 0; coloron < 256; coloron++) {

			new_red = (coloron / 8) * 1023 / 31;

			new_green = (coloron / 4) * 1023 / 63;

			new_blue = (coloron / 8) * 1023 / 31;

			new_palet[coloron] =

			    (new_red <<

			    PALETTE_30_DATA__PALETTE_DATA_R__SHIFT) |

			    (new_green <<

			    PALETTE_30_DATA__PALETTE_DATA_G__SHIFT) |

			    (new_blue <<

			    PALETTE_30_DATA__PALETTE_DATA_B__SHIFT);

		}

	default:	/* 8, 8, 8 */

		for (coloron = 0; coloron < 256; coloron++) {